Re: [PATCH 3/7] smc911x: add 16bit bus width support

[Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>]

On 22:21 Tue 14 Aug     , Sascha Hauer wrote:
> On Tue, Aug 14, 2012 at 07:32:16PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > ---
> >  drivers/net/smc911x.c |   20 ++++++++++++++++++--
> >  1 file changed, 18 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
> > index 2583235..c74ed52 100644
> > --- a/drivers/net/smc911x.c
> > +++ b/drivers/net/smc911x.c
> > @@ -47,6 +47,8 @@ struct smc911x_priv {
> >  	struct mii_device miidev;
> >  	void __iomem *base;
> >  
> > +	u32 width;
> > +
> >  	u32 (*reg_read)(struct smc911x_priv *priv, u32 reg);
> >  	void (*reg_write)(struct smc911x_priv *priv, u32 reg, u32 val);
> >  };
> > @@ -78,7 +80,11 @@ static inline u32 smc911x_reg_read(struct smc911x_priv *priv, u32 reg)
> >  
> >  static inline u32 __smc911x_reg_read(struct smc911x_priv *priv, u32 reg)
> >  {
> > -	return readl(priv->base + reg);
> > +	if (priv->width)
> > +		return readl(priv->base + reg);
> > +	else
> > +		return ((readw(priv->base + reg) & 0xFFFF) |
> > +			((readw(priv->base + reg + 2) & 0xFFFF) << 16));
> >  }
> 
> If you introduce function pointers for the read/write functions, then
> please use them to implement 16bit support.
this what this patch do

Best Regards,
J.

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