[PATCH 0/5] archosg9: improve support for tablet

[PATCH 0/5] archosg9: improve support for tablet

[Vicente]

This patch series solves/improves/implements:
 ttyOxxx are 0 based, so change ttyO1 to ttyO0
 change speed to 115200, there are some issues at Mbaud speed in linux
 make the archos environment more flexible: initrd and zImage names are overwritable
 added definition of PSR_I_BIT and some others, remaining PSR bits renamed to match the linux ones
 disable interrupts at barebox exit
 speed up initrd transfer
 add option to benchmark file transfers
 
Thank you all for your review work:
 Sascha Hauer
 Jean-Christophe
 Antony Pavlov 
 Teresa Gamez 
Which is greatly appreciated.

I also want to thank scholbert for the information posted in this forum thread:
http://forum.xda-developers.com/showpost.php?p=25919128&postcount=4

Vicente (5):
  ArchosG9: changed serial port and env
  ARM: add/rename PSR bits to match linux names
  ARM: ensure irqs are disabled at barebox exit
  uimage: improve transfer speed
  omap4_usbboot_fs: add benchmarking capabilities

 arch/arm/boards/archosg9/env/config       |  4 ++-
 arch/arm/boards/archosg9/env/init/usbboot |  9 ++---
 arch/arm/configs/archosg9_defconfig       |  2 +-
 arch/arm/cpu/cpu.c                        | 11 +++++++
 arch/arm/cpu/exceptions.S                 |  1 -
 arch/arm/cpu/interrupts.c                 |  6 ++--
 arch/arm/include/asm/ptrace.h             | 55 +++++++++++++++++--------------
 common/uimage.c                           |  2 +-
 scripts/Makefile                          |  2 +-
 scripts/omap4_usbboot.c                   | 32 ++++++++++++++++--
 10 files changed, 85 insertions(+), 39 deletions(-)

-- 
1.7.12.2


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[PATCH 1/5] ArchosG9: changed serial port and env

[Vicente]

Signed-off-by: Vicente <vicencb@gmail.com>
---
 arch/arm/boards/archosg9/env/config       | 4 +++-
 arch/arm/boards/archosg9/env/init/usbboot | 9 +++++----
 arch/arm/configs/archosg9_defconfig       | 2 +-
 3 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boards/archosg9/env/config b/arch/arm/boards/archosg9/env/config
index 38fc51c..8f3edb0 100644
--- a/arch/arm/boards/archosg9/env/config
+++ b/arch/arm/boards/archosg9/env/config
@@ -1 +1,3 @@
-global.linux.bootargs.base="earlyprintk=serial console=ttyO1,1000000n8 keep_bootcon pm_disable initcall_debug ignore_loglevel no_console_suspend=1 root=/dev/ram0 init=/linuxrc"
+global.bootm.image="${TARGET_ROOT}/boot/zImage"
+global.bootm.initrd="${TARGET_ROOT}/boot/initrd"
+global.linux.bootargs.base="console=ttyO0,115200n8 root=/dev/ram0"
diff --git a/arch/arm/boards/archosg9/env/init/usbboot b/arch/arm/boards/archosg9/env/init/usbboot
index 25536e2..83dd19a 100644
--- a/arch/arm/boards/archosg9/env/init/usbboot
+++ b/arch/arm/boards/archosg9/env/init/usbboot
@@ -1,5 +1,6 @@
-mkdir /usb
-mount -t omap4_usbbootfs omap4_usbboot /usb
+TARGET_ROOT="/mnt/usb"
+mkdir ${TARGET_ROOT}
+mount -t omap4_usbbootfs omap4_usbboot ${TARGET_ROOT}
 . /env/config
-. /usb/boot/config
-bootm -r /usb/boot/initrd /usb/boot/zImage
+. ${TARGET_ROOT}/boot/config
+bootm
diff --git a/arch/arm/configs/archosg9_defconfig b/arch/arm/configs/archosg9_defconfig
index e598258..2a20dd7 100644
--- a/arch/arm/configs/archosg9_defconfig
+++ b/arch/arm/configs/archosg9_defconfig
@@ -55,7 +55,7 @@ CONFIG_CMD_I2C=y
 CONFIG_DRIVER_SERIAL_OMAP4_USBBOOT=y
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
-CONFIG_BAUDRATE=1000000
+CONFIG_BAUDRATE=115200
 # CONFIG_SPI is not set
 CONFIG_I2C=y
 CONFIG_I2C_OMAP=y
-- 
1.7.12.2


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[PATCH 2/5] ARM: add/rename PSR bits to match linux names

[Vicente]

Signed-off-by: Vicente <vicencb@gmail.com>
---
 arch/arm/cpu/exceptions.S     |  1 -
 arch/arm/cpu/interrupts.c     |  6 ++---
 arch/arm/include/asm/ptrace.h | 55 +++++++++++++++++++++++--------------------
 3 files changed, 33 insertions(+), 29 deletions(-)

diff --git a/arch/arm/cpu/exceptions.S b/arch/arm/cpu/exceptions.S
index fe63a37..115c4e5 100644
--- a/arch/arm/cpu/exceptions.S
+++ b/arch/arm/cpu/exceptions.S
@@ -35,7 +35,6 @@
 #define S_R0		0
 
 #define MODE_SVC	0x13
-#define I_BIT		0x80
 
 /*
  * use bad_save_user_regs for abort/prefetch/undef/swi ...
diff --git a/arch/arm/cpu/interrupts.c b/arch/arm/cpu/interrupts.c
index 4ed562f..6e60adc 100644
--- a/arch/arm/cpu/interrupts.c
+++ b/arch/arm/cpu/interrupts.c
@@ -57,9 +57,9 @@ void show_regs (struct pt_regs *regs)
 	printf ("r3 : %08lx  r2 : %08lx  r1 : %08lx  r0 : %08lx\n",
 		regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
 	printf ("Flags: %c%c%c%c",
-		flags & CC_N_BIT ? 'N' : 'n',
-		flags & CC_Z_BIT ? 'Z' : 'z',
-		flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
+		flags & PSR_N_BIT ? 'N' : 'n',
+		flags & PSR_Z_BIT ? 'Z' : 'z',
+		flags & PSR_C_BIT ? 'C' : 'c', flags & PSR_V_BIT ? 'V' : 'v');
 	printf ("  IRQs %s  FIQs %s  Mode %s%s\n",
 		interrupts_enabled (regs) ? "on" : "off",
 		fast_interrupts_enabled (regs) ? "on" : "off",
diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h
index b384369..ac065ab 100644
--- a/arch/arm/include/asm/ptrace.h
+++ b/arch/arm/include/asm/ptrace.h
@@ -23,25 +23,30 @@
 /*
  * PSR bits
  */
-#define USR26_MODE	0x00
-#define FIQ26_MODE	0x01
-#define IRQ26_MODE	0x02
-#define SVC26_MODE	0x03
-#define USR_MODE	0x10
-#define FIQ_MODE	0x11
-#define IRQ_MODE	0x12
-#define SVC_MODE	0x13
-#define ABT_MODE	0x17
-#define UND_MODE	0x1b
-#define SYSTEM_MODE	0x1f
-#define MODE_MASK	0x1f
-#define T_BIT		0x20
-#define F_BIT		0x40
-#define I_BIT		0x80
-#define CC_V_BIT	(1 << 28)
-#define CC_C_BIT	(1 << 29)
-#define CC_Z_BIT	(1 << 30)
-#define CC_N_BIT	(1 << 31)
+#define USR26_MODE	0x00000000
+#define FIQ26_MODE	0x00000001
+#define IRQ26_MODE	0x00000002
+#define SVC26_MODE	0x00000003
+#define USR_MODE	0x00000010
+#define FIQ_MODE	0x00000011
+#define IRQ_MODE	0x00000012
+#define SVC_MODE	0x00000013
+#define ABT_MODE	0x00000017
+#define UND_MODE	0x0000001b
+#define SYSTEM_MODE	0x0000001f
+#define MODE32_BIT	0x00000010
+#define MODE_MASK	0x0000001f
+#define PSR_T_BIT	0x00000020
+#define PSR_F_BIT	0x00000040
+#define PSR_I_BIT	0x00000080
+#define PSR_A_BIT	0x00000100
+#define PSR_E_BIT	0x00000200
+#define PSR_J_BIT	0x01000000
+#define PSR_Q_BIT	0x08000000
+#define PSR_V_BIT	0x10000000
+#define PSR_C_BIT	0x20000000
+#define PSR_Z_BIT	0x40000000
+#define PSR_N_BIT	0x80000000
 #define PCMASK		0
 
 #ifndef __ASSEMBLY__
@@ -79,7 +84,7 @@ struct pt_regs {
 
 #ifdef CONFIG_ARM_THUMB
 #define thumb_mode(regs) \
-	(((regs)->ARM_cpsr & T_BIT))
+	(((regs)->ARM_cpsr & PSR_T_BIT))
 #else
 #define thumb_mode(regs) (0)
 #endif
@@ -88,13 +93,13 @@ struct pt_regs {
 	((regs)->ARM_cpsr & MODE_MASK)
 
 #define interrupts_enabled(regs) \
-	(!((regs)->ARM_cpsr & I_BIT))
+	(!((regs)->ARM_cpsr & PSR_I_BIT))
 
 #define fast_interrupts_enabled(regs) \
-	(!((regs)->ARM_cpsr & F_BIT))
+	(!((regs)->ARM_cpsr & PSR_F_BIT))
 
 #define condition_codes(regs) \
-	((regs)->ARM_cpsr & (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT))
+	((regs)->ARM_cpsr & (PSR_V_BIT|PSR_C_BIT|PSR_Z_BIT|PSR_N_BIT))
 
 /* Are the current registers suitable for user mode?
  * (used to maintain security in signal handlers)
@@ -102,13 +107,13 @@ struct pt_regs {
 static inline int valid_user_regs(struct pt_regs *regs)
 {
 	if ((regs->ARM_cpsr & 0xf) == 0 &&
-	    (regs->ARM_cpsr & (F_BIT|I_BIT)) == 0)
+	    (regs->ARM_cpsr & (PSR_F_BIT|PSR_I_BIT)) == 0)
 		return 1;
 
 	/*
 	 * Force CPSR to something logical...
 	 */
-	regs->ARM_cpsr &= (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT|0x10);
+	regs->ARM_cpsr &= (PSR_V_BIT|PSR_C_BIT|PSR_Z_BIT|PSR_N_BIT|0x10);
 
 	return 0;
 }
-- 
1.7.12.2


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[PATCH 3/5] ARM: ensure irqs are disabled at barebox exit

[Vicente]

Signed-off-by: Vicente <vicencb@gmail.com>
---
 arch/arm/cpu/cpu.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c
index 51da3b5..2bfd3ed 100644
--- a/arch/arm/cpu/cpu.c
+++ b/arch/arm/cpu/cpu.c
@@ -31,6 +31,7 @@
 #include <asm/system_info.h>
 #include <asm/cputype.h>
 #include <asm/cache.h>
+#include <asm/ptrace.h>
 
 /**
  * Enable processor's instruction cache
@@ -78,6 +79,16 @@ void arch_shutdown(void)
 	mmu_disable();
 #endif
 	flush_icache();
+	/*
+	 * barebox normally does not use interrupts, but some functionalities
+	 * (eg. OMAP4_USBBOOT) require them enabled. So be sure interrupts are
+	 * disabled before exiting.
+	 */
+#if __LINUX_ARM_ARCH__ >= 6
+	__asm__ __volatile__("cpsid i");
+#else
+	__asm__ __volatile__("msr cpsr_c, %0" : : "I"(PSR_I_BIT | SVC_MODE));
+#endif
 }
 
 #ifdef CONFIG_THUMB2_BAREBOX
-- 
1.7.12.2


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[PATCH 4/5] uimage: improve transfer speed

[Vicente]

Signed-off-by: Vicente <vicencb@gmail.com>
---
 common/uimage.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/uimage.c b/common/uimage.c
index c72db41..b58dff1 100644
--- a/common/uimage.c
+++ b/common/uimage.c
@@ -373,7 +373,7 @@ static int uimage_sdram_flush(void *buf, unsigned int len)
 	return len;
 }
 
-#define BUFSIZ	(PAGE_SIZE * 2)
+#define BUFSIZ	(PAGE_SIZE * 32)
 
 struct resource *file_to_sdram(const char *filename, unsigned long adr)
 {
-- 
1.7.12.2


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[PATCH 5/5] omap4_usbboot_fs: add benchmarking capabilities

[Vicente]

Signed-off-by: Vicente <vicencb@gmail.com>
---
 scripts/Makefile        |  2 +-
 scripts/omap4_usbboot.c | 32 ++++++++++++++++++++++++++++++--
 2 files changed, 31 insertions(+), 3 deletions(-)

diff --git a/scripts/Makefile b/scripts/Makefile
index 08b325c..f3e797c 100644
--- a/scripts/Makefile
+++ b/scripts/Makefile
@@ -13,7 +13,7 @@ hostprogs-$(CONFIG_ARCH_OMAP)    += omap_signGP mk-am35xx-spi-image
 hostprogs-$(CONFIG_ARCH_S5PCxx)  += s5p_cksum
 hostprogs-$(CONFIG_ARCH_DAVINCI) += mkublheader
 
-HOSTLOADLIBES_omap4_usbboot = -lpthread
+HOSTLOADLIBES_omap4_usbboot = -lpthread -lrt
 omap4_usbboot-objs               := usb_linux.o omap4_usbboot.o
 hostprogs-$(CONFIG_OMAP4_USBBOOT)+= omap4_usbboot
 
diff --git a/scripts/omap4_usbboot.c b/scripts/omap4_usbboot.c
index a276c29..e142c8a 100644
--- a/scripts/omap4_usbboot.c
+++ b/scripts/omap4_usbboot.c
@@ -20,9 +20,11 @@
 #include <sys/mman.h>
 #include <pthread.h>
 #include <termios.h>
-
+#include <time.h>
 #include "usb.h"
 
+#undef BENCHMARK
+
 #define USBBOOT_FS_MAGIC     0x5562464D
 #define USBBOOT_FS_CMD_OPEN  0x46530000
 #define USBBOOT_FS_CMD_CLOSE 0x46530001
@@ -166,6 +168,10 @@ int read_asic_id(struct usb_handle *usb)
 struct file_data {
 	size_t size;
 	void *data;
+#ifdef BENCHMARK
+	size_t readden;
+	struct timespec opened;
+#endif
 };
 
 int process_file(
@@ -175,7 +181,10 @@ int process_file(
 	struct stat s;
 	int fd, ret;
 	char fname[256];
-
+#ifdef BENCHMARK
+	struct timespec closed;
+	double ts;
+#endif
 	if (usb_read(usb, &i, 4) != 4) {
 		host_print("USB error\n");
 		exit(1);
@@ -229,6 +238,10 @@ int process_file(
 		close(fd);
 		fd_vector[i].size = size = s.st_size;
 		fd = i;
+#ifdef BENCHMARK
+		fd_vector[i].readden = 0;
+		clock_gettime(CLOCK_REALTIME, &fd_vector[i].opened);
+#endif
 		goto open_ok;
 
 open_error_2:
@@ -266,6 +279,18 @@ open_ok:
 		}
 		munmap(fd_vector[i].data, fd_vector[i].size);
 		fd_vector[i].data = NULL;
+#ifdef BENCHMARK
+		if (fd_vector[i].readden) {
+			clock_gettime(CLOCK_REALTIME, &closed);
+			ts  = closed.tv_nsec - fd_vector[i].opened.tv_nsec;
+			ts /= 1.e9;
+			ts += closed.tv_sec  - fd_vector[i].opened.tv_sec ;
+			host_print("Transferred %lu bytes"
+				"in %.2f seconds at %.2f MBps\n",
+				fd_vector[i].readden, ts,
+				fd_vector[i].readden/ts/1048576.0);
+		}
+#endif
 		break;
 	case USBBOOT_FS_CMD_READ:
 		if (usb_read(usb, &i, 4) != 4) {
@@ -308,6 +333,9 @@ open_ok:
 			host_print("could not send file to target\n");
 			exit(1);
 		}
+#ifdef BENCHMARK
+		fd_vector[i].readden += size;
+#endif
 		break;
 	case USBBOOT_FS_CMD_END:
 	default:
-- 
1.7.12.2


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Re: [PATCH 0/5] archosg9: improve support for tablet

[Jean-Christophe PLAGNIOL-VILLARD]

HI,

	can you use your REAL NAME please

Best Regards,
J.
On 16:03 Sat 13 Oct     , Vicente wrote:
> 
> This patch series solves/improves/implements:
>  ttyOxxx are 0 based, so change ttyO1 to ttyO0
>  change speed to 115200, there are some issues at Mbaud speed in linux
>  make the archos environment more flexible: initrd and zImage names are overwritable
>  added definition of PSR_I_BIT and some others, remaining PSR bits renamed to match the linux ones
>  disable interrupts at barebox exit
>  speed up initrd transfer
>  add option to benchmark file transfers
>  
> Thank you all for your review work:
>  Sascha Hauer
>  Jean-Christophe
>  Antony Pavlov 
>  Teresa Gamez 
> Which is greatly appreciated.
> 
> I also want to thank scholbert for the information posted in this forum thread:
> http://forum.xda-developers.com/showpost.php?p=25919128&postcount=4
> 
> Vicente (5):
>   ArchosG9: changed serial port and env
>   ARM: add/rename PSR bits to match linux names
>   ARM: ensure irqs are disabled at barebox exit
>   uimage: improve transfer speed
>   omap4_usbboot_fs: add benchmarking capabilities
> 
>  arch/arm/boards/archosg9/env/config       |  4 ++-
>  arch/arm/boards/archosg9/env/init/usbboot |  9 ++---
>  arch/arm/configs/archosg9_defconfig       |  2 +-
>  arch/arm/cpu/cpu.c                        | 11 +++++++
>  arch/arm/cpu/exceptions.S                 |  1 -
>  arch/arm/cpu/interrupts.c                 |  6 ++--
>  arch/arm/include/asm/ptrace.h             | 55 +++++++++++++++++--------------
>  common/uimage.c                           |  2 +-
>  scripts/Makefile                          |  2 +-
>  scripts/omap4_usbboot.c                   | 32 ++++++++++++++++--
>  10 files changed, 85 insertions(+), 39 deletions(-)
> 
> -- 
> 1.7.12.2
> 
> 
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox

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Re: [PATCH 0/5] archosg9: improve support for tablet

[vj]

On Sat, Oct 13, 2012 at 4:19 PM, Jean-Christophe PLAGNIOL-VILLARD
<plagnioj@jcrosoft.com> wrote:
> HI,
>
>         can you use your REAL NAME please
>
> Best Regards,
> J.

This project is my first time I'm using git to send e-mails. The first
e-mails were sent (as default) with
my nickname (vj).
Then I realized that was incorrect and changed it to my real name: Vicente.

On the other hand there are the e-mails directly sent from gmail that
uses my nickname vj. I prefer
not changing this because it's my personal e-mail and has other uses
besides posting to mailing lists.
Maybe I should use another, more professional, e-mail address.

Best Regards,
  Vicente Jaime Bergas Villalonga.

> On 16:03 Sat 13 Oct     , Vicente wrote:
>>
>> This patch series solves/improves/implements:
>>  ttyOxxx are 0 based, so change ttyO1 to ttyO0
>>  change speed to 115200, there are some issues at Mbaud speed in linux
>>  make the archos environment more flexible: initrd and zImage names are overwritable
>>  added definition of PSR_I_BIT and some others, remaining PSR bits renamed to match the linux ones
>>  disable interrupts at barebox exit
>>  speed up initrd transfer
>>  add option to benchmark file transfers
>>
>> Thank you all for your review work:
>>  Sascha Hauer
>>  Jean-Christophe
>>  Antony Pavlov
>>  Teresa Gamez
>> Which is greatly appreciated.
>>
>> I also want to thank scholbert for the information posted in this forum thread:
>> http://forum.xda-developers.com/showpost.php?p=25919128&postcount=4
>>
>> Vicente (5):
>>   ArchosG9: changed serial port and env
>>   ARM: add/rename PSR bits to match linux names
>>   ARM: ensure irqs are disabled at barebox exit
>>   uimage: improve transfer speed
>>   omap4_usbboot_fs: add benchmarking capabilities
>>
>>  arch/arm/boards/archosg9/env/config       |  4 ++-
>>  arch/arm/boards/archosg9/env/init/usbboot |  9 ++---
>>  arch/arm/configs/archosg9_defconfig       |  2 +-
>>  arch/arm/cpu/cpu.c                        | 11 +++++++
>>  arch/arm/cpu/exceptions.S                 |  1 -
>>  arch/arm/cpu/interrupts.c                 |  6 ++--
>>  arch/arm/include/asm/ptrace.h             | 55 +++++++++++++++++--------------
>>  common/uimage.c                           |  2 +-
>>  scripts/Makefile                          |  2 +-
>>  scripts/omap4_usbboot.c                   | 32 ++++++++++++++++--
>>  10 files changed, 85 insertions(+), 39 deletions(-)
>>
>> --
>> 1.7.12.2
>>
>>
>> _______________________________________________
>> barebox mailing list
>> barebox@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/barebox

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Re: [PATCH 2/5] ARM: add/rename PSR bits to match linux names

[Sascha Hauer]

On Sat, Oct 13, 2012 at 04:03:24PM +0200, Vicente wrote:
> 
> Signed-off-by: Vicente <vicencb@gmail.com>
> ---
>  arch/arm/cpu/exceptions.S     |  1 -
>  arch/arm/cpu/interrupts.c     |  6 ++---
>  arch/arm/include/asm/ptrace.h | 55 +++++++++++++++++++++++--------------------
>  3 files changed, 33 insertions(+), 29 deletions(-)
> 
>  /* Are the current registers suitable for user mode?
>   * (used to maintain security in signal handlers)
> @@ -102,13 +107,13 @@ struct pt_regs {
>  static inline int valid_user_regs(struct pt_regs *regs)
>  {
>  	if ((regs->ARM_cpsr & 0xf) == 0 &&
> -	    (regs->ARM_cpsr & (F_BIT|I_BIT)) == 0)
> +	    (regs->ARM_cpsr & (PSR_F_BIT|PSR_I_BIT)) == 0)
>  		return 1;
>  
>  	/*
>  	 * Force CPSR to something logical...
>  	 */
> -	regs->ARM_cpsr &= (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT|0x10);
> +	regs->ARM_cpsr &= (PSR_V_BIT|PSR_C_BIT|PSR_Z_BIT|PSR_N_BIT|0x10);

Since you are changing these lines anyway, could you add a whitespace
left and right to the operators to match our coding style?

Sascha


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Re: [PATCH 5/5] omap4_usbboot_fs: add benchmarking capabilities

[Sascha Hauer]

On Sat, Oct 13, 2012 at 04:03:27PM +0200, Vicente wrote:
> @@ -166,6 +168,10 @@ int read_asic_id(struct usb_handle *usb)
>  struct file_data {
>  	size_t size;
>  	void *data;
> +#ifdef BENCHMARK
> +	size_t readden;
> +	struct timespec opened;
> +#endif

I don't think it's a good idea to add such debug stuff to the
repository. In the end the code gets harder to maintain with
such ifdeffery and there's not much gain in it.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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Re: [SPAM] Re: [PATCH 0/5] archosg9: improve support for tablet

[Jean-Christophe PLAGNIOL-VILLARD]

On 16:35 Sat 13 Oct     , vj wrote:
> On Sat, Oct 13, 2012 at 4:19 PM, Jean-Christophe PLAGNIOL-VILLARD
> <plagnioj@jcrosoft.com> wrote:
> > HI,
> >
> >         can you use your REAL NAME please
> >
> > Best Regards,
> > J.
> 
> This project is my first time I'm using git to send e-mails. The first
> e-mails were sent (as default) with
> my nickname (vj).
> Then I realized that was incorrect and changed it to my real name: Vicente.
> 
> On the other hand there are the e-mails directly sent from gmail that
> uses my nickname vj. I prefer
> not changing this because it's my personal e-mail and has other uses
> besides posting to mailing lists.
> Maybe I should use another, more professional, e-mail address.
the e-mail we don't care we about your ame given + familly in the Author of
the commit

Best Regards,
J.

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Re: [PATCH 3/5] ARM: ensure irqs are disabled at barebox exit

[Sascha Hauer]

On Sat, Oct 13, 2012 at 04:03:25PM +0200, Vicente wrote:
> 
> Signed-off-by: Vicente <vicencb@gmail.com>
> ---
>  arch/arm/cpu/cpu.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c
> index 51da3b5..2bfd3ed 100644
> --- a/arch/arm/cpu/cpu.c
> +++ b/arch/arm/cpu/cpu.c
> @@ -31,6 +31,7 @@
>  #include <asm/system_info.h>
>  #include <asm/cputype.h>
>  #include <asm/cache.h>
> +#include <asm/ptrace.h>
>  
>  /**
>   * Enable processor's instruction cache
> @@ -78,6 +79,16 @@ void arch_shutdown(void)
>  	mmu_disable();
>  #endif
>  	flush_icache();
> +	/*
> +	 * barebox normally does not use interrupts, but some functionalities
> +	 * (eg. OMAP4_USBBOOT) require them enabled. So be sure interrupts are
> +	 * disabled before exiting.
> +	 */
> +#if __LINUX_ARM_ARCH__ >= 6
> +	__asm__ __volatile__("cpsid i");
> +#else
> +	__asm__ __volatile__("msr cpsr_c, %0" : : "I"(PSR_I_BIT | SVC_MODE));
> +#endif

This won't work with multi ARM architecture support and also does not
compile in Thumb2 mode. So I suggest to do:

diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c
index 25a0893..1328f0e 100644
--- a/arch/arm/cpu/cpu.c
+++ b/arch/arm/cpu/cpu.c
@@ -87,6 +87,23 @@ void arch_shutdown(void)
 		: "r0", "r1", "r2", "r3", "r6", "r10", "r12", "lr", "cc", "memory"
 	);
 #endif
+
+	/*
+	 * barebox normally does not use interrupts, but some functionalities
+	 * (eg. OMAP4_USBBOOT) require them enabled. So be sure interrupts are
+	 * disabled before exiting.
+	 */
+	if (cpu_architecture() >= CPU_ARCH_ARMv6) {
+#if __LINUX_ARM_ARCH__ >= 6
+		__asm__ __volatile__("cpsid i");
+#endif
+	} else {
+		uint32_t r;
+
+		__asm__ __volatile__("mrs %0, cpsr":"=r"(r));
+		r |= PSR_I_BIT;
+		__asm__ __volatile__("msr cpsr, %0" : : "r"(r));
+	}
 }
 
 #ifdef CONFIG_THUMB2_BAREBOX

Or the following which is simpler as it doesn't use the cpsid
instruction which is only available on >= ARMv6:


diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c
index 25a0893..bfad49d 100644
--- a/arch/arm/cpu/cpu.c
+++ b/arch/arm/cpu/cpu.c
@@ -73,6 +73,8 @@ int icache_status(void)
  */
 void arch_shutdown(void)
 {
+	uint32_t r;
+
 #ifdef CONFIG_MMU
 	/* nearly the same as below, but this could also disable
 	 * second level cache.
@@ -87,6 +89,15 @@ void arch_shutdown(void)
 		: "r0", "r1", "r2", "r3", "r6", "r10", "r12", "lr", "cc", "memory"
 	);
 #endif
+
+	/*
+	 * barebox normally does not use interrupts, but some functionalities
+	 * (eg. OMAP4_USBBOOT) require them enabled. So be sure interrupts are
+	 * disabled before exiting.
+	 */
+	__asm__ __volatile__("mrs %0, cpsr":"=r"(r));
+	r |= PSR_I_BIT;
+	__asm__ __volatile__("msr cpsr, %0" : : "r"(r));
 }
 
 #ifdef CONFIG_THUMB2_BAREBOX

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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