From: Sascha Hauer <s.hauer@pengutronix.de>
To: Vicente <vicencb@gmail.com>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH 3/5] ARM: ensure irqs are disabled at barebox exit
Date: Sun, 14 Oct 2012 10:57:33 +0200 [thread overview]
Message-ID: <20121014085733.GD27665@pengutronix.de> (raw)
In-Reply-To: <1350137007-10135-4-git-send-email-vicencb@gmail.com>
On Sat, Oct 13, 2012 at 04:03:25PM +0200, Vicente wrote:
>
> Signed-off-by: Vicente <vicencb@gmail.com>
> ---
> arch/arm/cpu/cpu.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c
> index 51da3b5..2bfd3ed 100644
> --- a/arch/arm/cpu/cpu.c
> +++ b/arch/arm/cpu/cpu.c
> @@ -31,6 +31,7 @@
> #include <asm/system_info.h>
> #include <asm/cputype.h>
> #include <asm/cache.h>
> +#include <asm/ptrace.h>
>
> /**
> * Enable processor's instruction cache
> @@ -78,6 +79,16 @@ void arch_shutdown(void)
> mmu_disable();
> #endif
> flush_icache();
> + /*
> + * barebox normally does not use interrupts, but some functionalities
> + * (eg. OMAP4_USBBOOT) require them enabled. So be sure interrupts are
> + * disabled before exiting.
> + */
> +#if __LINUX_ARM_ARCH__ >= 6
> + __asm__ __volatile__("cpsid i");
> +#else
> + __asm__ __volatile__("msr cpsr_c, %0" : : "I"(PSR_I_BIT | SVC_MODE));
> +#endif
This won't work with multi ARM architecture support and also does not
compile in Thumb2 mode. So I suggest to do:
diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c
index 25a0893..1328f0e 100644
--- a/arch/arm/cpu/cpu.c
+++ b/arch/arm/cpu/cpu.c
@@ -87,6 +87,23 @@ void arch_shutdown(void)
: "r0", "r1", "r2", "r3", "r6", "r10", "r12", "lr", "cc", "memory"
);
#endif
+
+ /*
+ * barebox normally does not use interrupts, but some functionalities
+ * (eg. OMAP4_USBBOOT) require them enabled. So be sure interrupts are
+ * disabled before exiting.
+ */
+ if (cpu_architecture() >= CPU_ARCH_ARMv6) {
+#if __LINUX_ARM_ARCH__ >= 6
+ __asm__ __volatile__("cpsid i");
+#endif
+ } else {
+ uint32_t r;
+
+ __asm__ __volatile__("mrs %0, cpsr":"=r"(r));
+ r |= PSR_I_BIT;
+ __asm__ __volatile__("msr cpsr, %0" : : "r"(r));
+ }
}
#ifdef CONFIG_THUMB2_BAREBOX
Or the following which is simpler as it doesn't use the cpsid
instruction which is only available on >= ARMv6:
diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c
index 25a0893..bfad49d 100644
--- a/arch/arm/cpu/cpu.c
+++ b/arch/arm/cpu/cpu.c
@@ -73,6 +73,8 @@ int icache_status(void)
*/
void arch_shutdown(void)
{
+ uint32_t r;
+
#ifdef CONFIG_MMU
/* nearly the same as below, but this could also disable
* second level cache.
@@ -87,6 +89,15 @@ void arch_shutdown(void)
: "r0", "r1", "r2", "r3", "r6", "r10", "r12", "lr", "cc", "memory"
);
#endif
+
+ /*
+ * barebox normally does not use interrupts, but some functionalities
+ * (eg. OMAP4_USBBOOT) require them enabled. So be sure interrupts are
+ * disabled before exiting.
+ */
+ __asm__ __volatile__("mrs %0, cpsr":"=r"(r));
+ r |= PSR_I_BIT;
+ __asm__ __volatile__("msr cpsr, %0" : : "r"(r));
}
#ifdef CONFIG_THUMB2_BAREBOX
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
next prev parent reply other threads:[~2012-10-14 8:57 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-13 14:03 [PATCH 0/5] archosg9: improve support for tablet Vicente
2012-10-13 14:03 ` [PATCH 1/5] ArchosG9: changed serial port and env Vicente
2012-10-13 14:03 ` [PATCH 2/5] ARM: add/rename PSR bits to match linux names Vicente
2012-10-13 18:25 ` Sascha Hauer
2012-10-13 14:03 ` [PATCH 3/5] ARM: ensure irqs are disabled at barebox exit Vicente
2012-10-14 8:57 ` Sascha Hauer [this message]
2012-10-13 14:03 ` [PATCH 4/5] uimage: improve transfer speed Vicente
2012-10-13 14:03 ` [PATCH 5/5] omap4_usbboot_fs: add benchmarking capabilities Vicente
2012-10-13 18:27 ` Sascha Hauer
2012-10-13 14:19 ` [PATCH 0/5] archosg9: improve support for tablet Jean-Christophe PLAGNIOL-VILLARD
2012-10-13 14:35 ` vj
2012-10-14 8:12 ` [SPAM] " Jean-Christophe PLAGNIOL-VILLARD
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20121014085733.GD27665@pengutronix.de \
--to=s.hauer@pengutronix.de \
--cc=barebox@lists.infradead.org \
--cc=vicencb@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox