* [PATCH 1/5] pinctrl: at91: provide gpio names
[not found] <20121120212326.GO4398@game.jcrosoft.org>
@ 2012-11-20 21:26 ` Jean-Christophe PLAGNIOL-VILLARD
2012-11-20 21:26 ` [PATCH 2/5] pinctrl: at91 add deglitch, debounce, pull down and schmitt trigger mux option support Jean-Christophe PLAGNIOL-VILLARD
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-11-20 21:26 UTC (permalink / raw)
To: barebox
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
drivers/pinctrl/pinctrl-at91.c | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index b9e2cbd..401fc96 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -1364,9 +1364,10 @@ static int __devinit at91_gpio_probe(struct platform_device *pdev)
struct gpio_chip *chip;
struct pinctrl_gpio_range *range;
int ret = 0;
- int irq;
+ int irq, i;
int alias_idx = of_alias_get_id(np, "gpio");
uint32_t ngpio;
+ char **names;
BUG_ON(alias_idx >= ARRAY_SIZE(gpio_chips));
if (gpio_chips[alias_idx]) {
@@ -1436,6 +1437,18 @@ static int __devinit at91_gpio_probe(struct platform_device *pdev)
chip->ngpio = ngpio;
}
+ names = devm_kzalloc(&pdev->dev, sizeof(char*) * chip->ngpio, GFP_KERNEL);
+
+ if (!names) {
+ ret = -ENOMEM;
+ goto clk_err;
+ }
+
+ for (i = 0; i < chip->ngpio; i++)
+ names[i] = kasprintf(GFP_KERNEL, "pio%c%d", alias_idx + 'A', i);
+
+ chip->names = (const char*const*)names;
+
range = &at91_chip->range;
range->name = chip->label;
range->id = alias_idx;
--
1.7.10.4
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 2/5] pinctrl: at91 add deglitch, debounce, pull down and schmitt trigger mux option support
2012-11-20 21:26 ` [PATCH 1/5] pinctrl: at91: provide gpio names Jean-Christophe PLAGNIOL-VILLARD
@ 2012-11-20 21:26 ` Jean-Christophe PLAGNIOL-VILLARD
2012-11-20 21:26 ` [PATCH 3/5] ARM: at91sam9: add macb pinctrl support Jean-Christophe PLAGNIOL-VILLARD
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-11-20 21:26 UTC (permalink / raw)
To: barebox
add :
set_deglitch: enable/disable deglitch
set_debounce: enable/disable debounce
set_pulldown: enable/disable pulldown
disable_schmitt_trig: disable schmitt trigger
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
.../bindings/pinctrl/atmel,at91-pinctrl.txt | 9 +-
drivers/pinctrl/pinctrl-at91.c | 111 ++++++++++++++++++++
2 files changed, 118 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
index 20a987e..3a26812 100644
--- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
@@ -84,8 +84,13 @@ Required properties for pin configuration node:
The PERIPH 0 means gpio.
Bits used for CONFIG:
-PULL_UP(1 << 0): indicate this pin need a pull up.
-MULTIDRIVE(1 << 1): indicate this pin need to be configured as multidrive.
+PULL_UP (1 << 0): indicate this pin need a pull up.
+MULTIDRIVE (1 << 1): indicate this pin need to be configured as multidrive.
+DEGLITCH (1 << 2): indicate this pin need deglitch.
+PULL_DOWN (1 << 3): indicate this pin need a pull down.
+DIS_SCHMIT (1 << 4): indicate this pin need to disable schmit trigger.
+DEBOUNCE (1 << 16): indicate this pin need debounce.
+DEBOUNCE_VAL (0x3fff << 17): debounce val.
NOTE:
Some requirements for using atmel,at91rm9200-pinctrl binding:
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 401fc96..0d7e6c3 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -59,6 +59,12 @@ static int gpio_banks;
#define PULL_UP (1 << 0)
#define MULTI_DRIVE (1 << 1)
+#define DEGLITCH (1 << 2)
+#define PULL_DOWN (1 << 3)
+#define DIS_SCHMIT (1 << 4)
+#define DEBOUNCE (1 << 16)
+#define DEBOUNCE_VAL_SHIFT 17
+#define DEBOUNCE_VAL (0x3fff << DEBOUNCE_VAL_SHIFT)
/**
* struct at91_pmx_func - describes AT91 pinmux functions
@@ -122,6 +128,14 @@ struct at91_pin_group {
* @mux_B_periph: mux as periph B
* @mux_C_periph: mux as periph C
* @mux_D_periph: mux as periph D
+ * @get_deglitch: get deglitch status
+ * @set_deglitch: enable/disable deglitch
+ * @get_debounce: get debounce status
+ * @set_debounce: enable/disable debounce
+ * @get_pulldown: get pulldown status
+ * @set_pulldown: enable/disable pulldown
+ * @get_schmitt_trig: get schmitt trigger status
+ * @disable_schmitt_trig: disable schmitt trigger
* @irq_type: return irq type
*/
struct at91_pinctrl_mux_ops {
@@ -130,6 +144,14 @@ struct at91_pinctrl_mux_ops {
void (*mux_B_periph)(void __iomem *pio, unsigned mask);
void (*mux_C_periph)(void __iomem *pio, unsigned mask);
void (*mux_D_periph)(void __iomem *pio, unsigned mask);
+ bool (*get_deglitch)(void __iomem *pio, unsigned pin);
+ void (*set_deglitch)(void __iomem *pio, unsigned mask, bool in_on);
+ bool (*get_debounce)(void __iomem *pio, unsigned pin, u32 *div);
+ void (*set_debounce)(void __iomem *pio, unsigned mask, bool in_on, u32 div);
+ bool (*get_pulldown)(void __iomem *pio, unsigned pin);
+ void (*set_pulldown)(void __iomem *pio, unsigned mask, bool in_on);
+ bool (*get_schmitt_trig)(void __iomem *pio, unsigned pin);
+ void (*disable_schmitt_trig)(void __iomem *pio, unsigned mask);
/* irq */
int (*irq_type)(struct irq_data *d, unsigned type);
};
@@ -386,10 +408,68 @@ static enum at91_mux at91_mux_get_periph(void __iomem *pio, unsigned mask)
return select + 1;
}
+static bool at91_mux_get_deglitch(void __iomem *pio, unsigned pin)
+{
+ return (__raw_readl(pio + PIO_IFSR) >> pin) & 0x1;
+}
+
+static void at91_mux_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)
+{
+ __raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
+}
+
+static void at91_mux_pio3_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)
+{
+ if (is_on)
+ __raw_writel(mask, pio + PIO_IFSCDR);
+ at91_mux_set_deglitch(pio, mask, is_on);
+}
+
+static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div)
+{
+ *div = __raw_readl(pio + PIO_SCDR);
+
+ return (__raw_readl(pio + PIO_IFSCSR) >> pin) & 0x1;
+}
+
+static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask,
+ bool is_on, u32 div)
+{
+ if (is_on) {
+ __raw_writel(mask, pio + PIO_IFSCER);
+ __raw_writel(div & PIO_SCDR_DIV, pio + PIO_SCDR);
+ __raw_writel(mask, pio + PIO_IFER);
+ } else {
+ __raw_writel(mask, pio + PIO_IFDR);
+ }
+}
+
+static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin)
+{
+ return (__raw_readl(pio + PIO_PPDSR) >> pin) & 0x1;
+}
+
+static void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool is_on)
+{
+ __raw_writel(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR));
+}
+
+static void at91_mux_pio3_disable_schmitt_trig(void __iomem *pio, unsigned mask)
+{
+ __raw_writel(__raw_readl(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT);
+}
+
+static bool at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin)
+{
+ return (__raw_readl(pio + PIO_SCHMITT) >> pin) & 0x1;
+}
+
static struct at91_pinctrl_mux_ops at91rm9200_ops = {
.get_periph = at91_mux_get_periph,
.mux_A_periph = at91_mux_set_A_periph,
.mux_B_periph = at91_mux_set_B_periph,
+ .get_deglitch = at91_mux_get_deglitch,
+ .set_deglitch = at91_mux_set_deglitch,
.irq_type = gpio_irq_type,
};
@@ -399,6 +479,14 @@ static struct at91_pinctrl_mux_ops at91sam9x5_ops = {
.mux_B_periph = at91_mux_pio3_set_B_periph,
.mux_C_periph = at91_mux_pio3_set_C_periph,
.mux_D_periph = at91_mux_pio3_set_D_periph,
+ .get_deglitch = at91_mux_get_deglitch,
+ .set_deglitch = at91_mux_pio3_set_deglitch,
+ .get_debounce = at91_mux_pio3_get_debounce,
+ .set_debounce = at91_mux_pio3_set_debounce,
+ .get_pulldown = at91_mux_pio3_get_pulldown,
+ .set_pulldown = at91_mux_pio3_set_pulldown,
+ .get_schmitt_trig = at91_mux_pio3_get_schmitt_trig,
+ .disable_schmitt_trig = at91_mux_pio3_disable_schmitt_trig,
.irq_type = alt_gpio_irq_type,
};
@@ -624,6 +712,7 @@ static int at91_pinconf_get(struct pinctrl_dev *pctldev,
struct at91_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
void __iomem *pio;
unsigned pin;
+ int div;
dev_dbg(info->dev, "%s:%d, pin_id=%d, config=0x%lx", __func__, __LINE__, pin_id, *config);
pio = pin_to_controller(info, pin_to_bank(pin_id));
@@ -635,6 +724,15 @@ static int at91_pinconf_get(struct pinctrl_dev *pctldev,
if (at91_mux_get_pullup(pio, pin))
*config |= PULL_UP;
+ if (info->ops->get_deglitch && info->ops->get_deglitch(pio, pin))
+ *config |= DEGLITCH;
+ if (info->ops->get_debounce && info->ops->get_debounce(pio, pin, &div))
+ *config |= DEBOUNCE | (div << DEBOUNCE_VAL_SHIFT);
+ if (info->ops->get_pulldown && info->ops->get_pulldown(pio, pin))
+ *config |= PULL_DOWN;
+ if (info->ops->get_schmitt_trig && info->ops->get_schmitt_trig(pio, pin))
+ *config |= DIS_SCHMIT;
+
return 0;
}
@@ -649,8 +747,21 @@ static int at91_pinconf_set(struct pinctrl_dev *pctldev,
pio = pin_to_controller(info, pin_to_bank(pin_id));
mask = pin_to_mask(pin_id % MAX_NB_GPIO_PER_BANK);
+ if (config & PULL_UP && config & PULL_DOWN)
+ return -EINVAL;
+
at91_mux_set_pullup(pio, mask, config & PULL_UP);
at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE);
+ if (info->ops->set_deglitch)
+ info->ops->set_deglitch(pio, mask, config & DEGLITCH);
+ if (info->ops->set_debounce)
+ info->ops->set_debounce(pio, mask, config & DEBOUNCE,
+ (config & DEBOUNCE_VAL) >> DEBOUNCE_VAL_SHIFT);
+ if (info->ops->set_pulldown)
+ info->ops->set_pulldown(pio, mask, config & PULL_DOWN);
+ if (info->ops->disable_schmitt_trig && config & DIS_SCHMIT)
+ info->ops->disable_schmitt_trig(pio, mask);
+
return 0;
}
--
1.7.10.4
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 3/5] ARM: at91sam9: add macb pinctrl support
2012-11-20 21:26 ` [PATCH 1/5] pinctrl: at91: provide gpio names Jean-Christophe PLAGNIOL-VILLARD
2012-11-20 21:26 ` [PATCH 2/5] pinctrl: at91 add deglitch, debounce, pull down and schmitt trigger mux option support Jean-Christophe PLAGNIOL-VILLARD
@ 2012-11-20 21:26 ` Jean-Christophe PLAGNIOL-VILLARD
2012-11-20 21:26 ` [PATCH 4/5] ARM: at91: fix usart/uart namimg in pinctrl Jean-Christophe PLAGNIOL-VILLARD
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-11-20 21:26 UTC (permalink / raw)
To: barebox
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
arch/arm/boot/dts/at91sam9260.dtsi | 42 ++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/at91sam9263.dtsi | 30 ++++++++++++++++++++++++++
arch/arm/boot/dts/at91sam9g45.dtsi | 30 ++++++++++++++++++++++++++
arch/arm/boot/dts/at91sam9x25.dtsi | 21 ++++++++++++++++++
arch/arm/boot/dts/at91sam9x5.dtsi | 30 ++++++++++++++++++++++++++
5 files changed, 153 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 9a24ffb..36f55e3 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -216,6 +216,46 @@
};
};
+ macb {
+ pinctrl_macb_rmii: macb_rmii-0 {
+ atmel,pins =
+ <0 12 0x1 0x0 /* PA12 periph A */
+ 0 13 0x1 0x0 /* PA13 periph A */
+ 0 14 0x1 0x0 /* PA14 periph A */
+ 0 15 0x1 0x0 /* PA15 periph A */
+ 0 16 0x1 0x0 /* PA16 periph A */
+ 0 17 0x1 0x0 /* PA17 periph A */
+ 0 18 0x1 0x0 /* PA18 periph A */
+ 0 19 0x1 0x0 /* PA19 periph A */
+ 0 20 0x1 0x0 /* PA20 periph A */
+ 0 21 0x1 0x0>; /* PA21 periph A */
+ };
+
+ pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
+ atmel,pins =
+ <0 22 0x2 0x0 /* PA22 periph B */
+ 0 23 0x2 0x0 /* PA23 periph B */
+ 0 24 0x2 0x0 /* PA24 periph B */
+ 0 25 0x2 0x0 /* PA25 periph B */
+ 0 26 0x2 0x0 /* PA26 periph B */
+ 0 27 0x2 0x0 /* PA27 periph B */
+ 0 28 0x2 0x0 /* PA28 periph B */
+ 0 29 0x2 0x0>; /* PA29 periph B */
+ };
+
+ pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
+ atmel,pins =
+ <0 10 0x2 0x0 /* PA10 periph B */
+ 0 11 0x2 0x0 /* PA11 periph B */
+ 0 24 0x2 0x0 /* PA24 periph B */
+ 0 25 0x2 0x0 /* PA25 periph B */
+ 0 26 0x2 0x0 /* PA26 periph B */
+ 0 27 0x2 0x0 /* PA27 periph B */
+ 0 28 0x2 0x0 /* PA28 periph B */
+ 0 29 0x2 0x0>; /* PA29 periph B */
+ };
+ };
+
pioA: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
@@ -326,6 +366,8 @@
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xfffc4000 0x100>;
interrupts = <21 4 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_macb_rmii>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 251ccec..148b89a 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -163,6 +163,34 @@
};
};
+ macb {
+ pinctrl_macb_rmii: macb_rmii-0 {
+ atmel,pins =
+ <2 25 0x2 0x0 /* PC25 periph B */
+ 4 21 0x1 0x0 /* PE21 periph A */
+ 4 23 0x1 0x0 /* PE23 periph A */
+ 4 24 0x1 0x0 /* PE24 periph A */
+ 4 25 0x1 0x0 /* PE25 periph A */
+ 4 26 0x1 0x0 /* PE26 periph A */
+ 4 27 0x1 0x0 /* PE27 periph A */
+ 4 28 0x1 0x0 /* PE28 periph A */
+ 4 29 0x1 0x0 /* PE29 periph A */
+ 4 30 0x1 0x0>; /* PE30 periph A */
+ };
+
+ pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
+ atmel,pins =
+ <2 20 0x2 0x0 /* PC20 periph B */
+ 2 21 0x2 0x0 /* PC21 periph B */
+ 2 22 0x2 0x0 /* PC22 periph B */
+ 2 23 0x2 0x0 /* PC23 periph B */
+ 2 24 0x2 0x0 /* PC24 periph B */
+ 2 25 0x2 0x0 /* PC25 periph B */
+ 2 27 0x2 0x0 /* PC27 periph B */
+ 4 22 0x2 0x0>; /* PE22 periph B */
+ };
+ };
+
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x200>;
@@ -260,6 +288,8 @@
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xfffbc000 0x100>;
interrupts = <21 4 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_macb_rmii>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index c340f66..0ad84b6 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -196,6 +196,34 @@
};
};
+ macb {
+ pinctrl_macb_rmii: macb_rmii-0 {
+ atmel,pins =
+ <0 10 0x1 0x0 /* PA10 periph A */
+ 0 11 0x1 0x0 /* PA11 periph A */
+ 0 12 0x1 0x0 /* PA12 periph A */
+ 0 13 0x1 0x0 /* PA13 periph A */
+ 0 14 0x1 0x0 /* PA14 periph A */
+ 0 15 0x1 0x0 /* PA15 periph A */
+ 0 16 0x1 0x0 /* PA16 periph A */
+ 0 17 0x1 0x0 /* PA17 periph A */
+ 0 18 0x1 0x0 /* PA18 periph A */
+ 0 19 0x1 0x0>; /* PA19 periph A */
+ };
+
+ pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
+ atmel,pins =
+ <0 6 0x2 0x0 /* PA6 periph B */
+ 0 7 0x2 0x0 /* PA7 periph B */
+ 0 8 0x2 0x0 /* PA8 periph B */
+ 0 9 0x2 0x0 /* PA9 periph B */
+ 0 27 0x2 0x0 /* PA27 periph B */
+ 0 28 0x2 0x0 /* PA28 periph B */
+ 0 29 0x2 0x0 /* PA29 periph B */
+ 0 30 0x2 0x0>; /* PA30 periph B */
+ };
+ };
+
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x200>;
@@ -304,6 +332,8 @@
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xfffbc000 0x100>;
interrupts = <25 4 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_macb_rmii>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/at91sam9x25.dtsi b/arch/arm/boot/dts/at91sam9x25.dtsi
index 956c65f..54eb33b 100644
--- a/arch/arm/boot/dts/at91sam9x25.dtsi
+++ b/arch/arm/boot/dts/at91sam9x25.dtsi
@@ -22,6 +22,27 @@
0x80000000 0xfffd0000 0xb83fffff /* pioC */
0x003fffff 0x003f8000 0x00000000 /* pioD */
>;
+
+ macb1 {
+ pinctrl_macb1_rmii: macb1_rmii-0 {
+ atmel,pins =
+ <2 16 0x2 0x0 /* PC16 periph B */
+ 2 18 0x2 0x0 /* PC18 periph B */
+ 2 19 0x2 0x0 /* PC19 periph B */
+ 2 20 0x2 0x0 /* PC20 periph B */
+ 2 21 0x2 0x0 /* PC21 periph B */
+ 2 27 0x2 0x0 /* PC27 periph B */
+ 2 28 0x2 0x0 /* PC28 periph B */
+ 2 29 0x2 0x0 /* PC29 periph B */
+ 2 30 0x2 0x0 /* PC30 periph B */
+ 2 31 0x2 0x0>; /* PC31 periph B */
+ };
+ };
+ };
+
+ macb1: ethernet@f8030000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_macb1_rmii>;
};
};
};
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 6a40b77..9fd7159 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -206,6 +206,34 @@
};
};
+ macb0 {
+ pinctrl_macb0_rmii: macb0_rmii-0 {
+ atmel,pins =
+ <1 0 0x1 0x0 /* PB0 periph A */
+ 1 1 0x1 0x0 /* PB1 periph A */
+ 1 2 0x1 0x0 /* PB2 periph A */
+ 1 3 0x1 0x0 /* PB3 periph A */
+ 1 4 0x1 0x0 /* PB4 periph A */
+ 1 5 0x1 0x0 /* PB5 periph A */
+ 1 6 0x1 0x0 /* PB6 periph A */
+ 1 7 0x1 0x0 /* PB7 periph A */
+ 1 9 0x1 0x0 /* PB9 periph A */
+ 1 10 0x1 0x0>; /* PB10 periph A */
+ };
+
+ pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
+ atmel,pins =
+ <1 8 0x1 0x0 /* PA8 periph A */
+ 1 11 0x1 0x0 /* PA11 periph A */
+ 1 12 0x1 0x0 /* PA12 periph A */
+ 1 13 0x1 0x0 /* PA13 periph A */
+ 1 14 0x1 0x0 /* PA14 periph A */
+ 1 15 0x1 0x0 /* PA15 periph A */
+ 1 16 0x1 0x0 /* PA16 periph A */
+ 1 17 0x1 0x0>; /* PA17 periph A */
+ };
+ };
+
pioA: gpio@fffff400 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
@@ -295,6 +323,8 @@
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xf802c000 0x100>;
interrupts = <24 4 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_macb0_rmii>;
status = "disabled";
};
--
1.7.10.4
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 4/5] ARM: at91: fix usart/uart namimg in pinctrl
2012-11-20 21:26 ` [PATCH 1/5] pinctrl: at91: provide gpio names Jean-Christophe PLAGNIOL-VILLARD
2012-11-20 21:26 ` [PATCH 2/5] pinctrl: at91 add deglitch, debounce, pull down and schmitt trigger mux option support Jean-Christophe PLAGNIOL-VILLARD
2012-11-20 21:26 ` [PATCH 3/5] ARM: at91sam9: add macb pinctrl support Jean-Christophe PLAGNIOL-VILLARD
@ 2012-11-20 21:26 ` Jean-Christophe PLAGNIOL-VILLARD
2012-11-20 21:26 ` [PATCH 5/5] ARM: at91: dt: at91sam9260: split rts and cts pinctrl not Jean-Christophe PLAGNIOL-VILLARD
2012-11-20 21:35 ` [PATCH 1/5] pinctrl: at91: provide gpio names Jean-Christophe PLAGNIOL-VILLARD
4 siblings, 0 replies; 6+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-11-20 21:26 UTC (permalink / raw)
To: barebox
USART are the full pin uart
DBGU the debug Unit
UART the two pin uart
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
arch/arm/boot/dts/at91sam9260.dtsi | 58 +++++++++++++--------------
arch/arm/boot/dts/at91sam9263.dtsi | 24 +++++------
arch/arm/boot/dts/at91sam9263ek.dts | 2 +-
arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 10 ++---
arch/arm/boot/dts/at91sam9g45.dtsi | 30 +++++++-------
arch/arm/boot/dts/at91sam9m10g45ek.dts | 2 +-
arch/arm/boot/dts/at91sam9n12.dtsi | 38 +++++++++---------
arch/arm/boot/dts/at91sam9x5.dtsi | 36 ++++++++---------
8 files changed, 100 insertions(+), 100 deletions(-)
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 36f55e3..40bf329 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -21,8 +21,8 @@
serial2 = &usart1;
serial3 = &usart2;
serial4 = &usart3;
- serial5 = &usart4;
- serial6 = &usart5;
+ serial5 = &uart0;
+ serial6 = &uart1;
gpio0 = &pioA;
gpio1 = &pioB;
gpio2 = &pioC;
@@ -120,88 +120,88 @@
};
};
- uart0 {
- pinctrl_uart0: uart0-0 {
+ usart0 {
+ pinctrl_usart0: usart0-0 {
atmel,pins =
<1 4 0x1 0x0 /* PB4 periph A */
1 5 0x1 0x0>; /* PB5 periph A */
};
- pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
+ pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
atmel,pins =
<1 26 0x1 0x0 /* PB26 periph A */
1 27 0x1 0x0>; /* PB27 periph A */
};
- pinctrl_uart0_dtr_dsr: uart0_dtr_dsr-0 {
+ pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
atmel,pins =
<1 24 0x1 0x0 /* PB24 periph A */
1 22 0x1 0x0>; /* PB22 periph A */
};
- pinctrl_uart0_dcd: uart0_dcd-0 {
+ pinctrl_usart0_dcd: usart0_dcd-0 {
atmel,pins =
<1 23 0x1 0x0>; /* PB23 periph A */
};
- pinctrl_uart0_ri: uart0_ri-0 {
+ pinctrl_usart0_ri: usart0_ri-0 {
atmel,pins =
<1 25 0x1 0x0>; /* PB25 periph A */
};
};
- uart1 {
- pinctrl_uart1: uart1-0 {
+ usart1 {
+ pinctrl_usart1: usart1-0 {
atmel,pins =
<2 6 0x1 0x1 /* PB6 periph A with pullup */
2 7 0x1 0x0>; /* PB7 periph A */
};
- pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
+ pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
atmel,pins =
<1 28 0x1 0x0 /* PB28 periph A */
1 29 0x1 0x0>; /* PB29 periph A */
};
};
- uart2 {
- pinctrl_uart2: uart2-0 {
+ usart2 {
+ pinctrl_usart2: usart2-0 {
atmel,pins =
<1 8 0x1 0x1 /* PB8 periph A with pullup */
1 9 0x1 0x0>; /* PB9 periph A */
};
- pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
+ pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
atmel,pins =
<0 4 0x1 0x0 /* PA4 periph A */
0 5 0x1 0x0>; /* PA5 periph A */
};
};
- uart3 {
- pinctrl_uart3: uart3-0 {
+ usart3 {
+ pinctrl_usart3: usart3-0 {
atmel,pins =
<2 10 0x1 0x1 /* PB10 periph A with pullup */
2 11 0x1 0x0>; /* PB11 periph A */
};
- pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
+ pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
atmel,pins =
<3 8 0x2 0x0 /* PB8 periph B */
3 10 0x2 0x0>; /* PB10 periph B */
};
};
- uart4 {
- pinctrl_uart4: uart4-0 {
+ uart0 {
+ pinctrl_uart0: uart0-0 {
atmel,pins =
<0 31 0x2 0x1 /* PA31 periph B with pullup */
0 30 0x2 0x0>; /* PA30 periph B */
};
};
- uart5 {
- pinctrl_uart5: uart5-0 {
+ uart1 {
+ pinctrl_uart1: uart1-0 {
atmel,pins =
<2 12 0x1 0x1 /* PB12 periph A with pullup */
2 13 0x1 0x0>; /* PB13 periph A */
@@ -303,7 +303,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart0>;
+ pinctrl-0 = <&pinctrl_usart0>;
status = "disabled";
};
@@ -314,7 +314,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
+ pinctrl-0 = <&pinctrl_usart1>;
status = "disabled";
};
@@ -325,7 +325,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
+ pinctrl-0 = <&pinctrl_usart2>;
status = "disabled";
};
@@ -336,29 +336,29 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart3>;
+ pinctrl-0 = <&pinctrl_usart3>;
status = "disabled";
};
- usart4: serial@fffd4000 {
+ uart0: serial@fffd4000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffd4000 0x200>;
interrupts = <24 4 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart4>;
+ pinctrl-0 = <&pinctrl_uart0>;
status = "disabled";
};
- usart5: serial@fffd8000 {
+ uart1: serial@fffd8000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffd8000 0x200>;
interrupts = <25 4 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart5>;
+ pinctrl-0 = <&pinctrl_uart1>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 148b89a..cf4b59f 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -113,42 +113,42 @@
};
};
- uart0 {
- pinctrl_uart0: uart0-0 {
+ usart0 {
+ pinctrl_usart0: usart0-0 {
atmel,pins =
<0 26 0x1 0x1 /* PA26 periph A with pullup */
0 27 0x1 0x0>; /* PA27 periph A */
};
- pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
+ pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
atmel,pins =
<0 28 0x1 0x0 /* PA28 periph A */
0 29 0x1 0x0>; /* PA29 periph A */
};
};
- uart1 {
- pinctrl_uart1: uart1-0 {
+ usart1 {
+ pinctrl_usart1: usart1-0 {
atmel,pins =
<3 0 0x1 0x1 /* PD0 periph A with pullup */
3 1 0x1 0x0>; /* PD1 periph A */
};
- pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
+ pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
atmel,pins =
<3 7 0x2 0x0 /* PD7 periph B */
3 8 0x2 0x0>; /* PD8 periph B */
};
};
- uart2 {
- pinctrl_uart2: uart2-0 {
+ usart2 {
+ pinctrl_usart2: usart2-0 {
atmel,pins =
<3 2 0x1 0x1 /* PD2 periph A with pullup */
3 3 0x1 0x0>; /* PD3 periph A */
};
- pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
+ pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
atmel,pins =
<3 5 0x2 0x0 /* PD5 periph B */
4 6 0x2 0x0>; /* PD6 periph B */
@@ -258,7 +258,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart0>;
+ pinctrl-0 = <&pinctrl_usart0>;
status = "disabled";
};
@@ -269,7 +269,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
+ pinctrl-0 = <&pinctrl_usart1>;
status = "disabled";
};
@@ -280,7 +280,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
+ pinctrl-0 = <&pinctrl_usart2>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts
index 7cfe9d5..3434373 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -38,7 +38,7 @@
};
usart0: serial@fff8c000 {
- pinctrl-0 = <&pinctrl_uart0 &pinctrl_uart0_rts_cts>;
+ pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index e33ab0a..04f048f 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -36,11 +36,11 @@
usart0: serial@fffb0000 {
pinctrl-0 =
- <&pinctrl_uart0
- &pinctrl_uart0_rts_cts
- &pinctrl_uart0_dtr_dsr
- &pinctrl_uart0_dcd
- &pinctrl_uart0_ri>;
+ <&pinctrl_usart0
+ &pinctrl_usart0_rts_cts
+ &pinctrl_usart0_dtr_dsr
+ &pinctrl_usart0_dcd
+ &pinctrl_usart0_ri>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 0ad84b6..56ce896 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -132,14 +132,14 @@
};
};
- uart0 {
- pinctrl_uart0: uart0-0 {
+ usart0 {
+ pinctrl_usart0: usart0-0 {
atmel,pins =
<1 19 0x1 0x1 /* PB19 periph A with pullup */
1 18 0x1 0x0>; /* PB18 periph A */
};
- pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
+ pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
atmel,pins =
<1 17 0x2 0x0 /* PB17 periph B */
1 15 0x2 0x0>; /* PB15 periph B */
@@ -147,41 +147,41 @@
};
uart1 {
- pinctrl_uart1: uart1-0 {
+ pinctrl_usart1: usart1-0 {
atmel,pins =
<1 4 0x1 0x1 /* PB4 periph A with pullup */
1 5 0x1 0x0>; /* PB5 periph A */
};
- pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
+ pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
atmel,pins =
<3 16 0x1 0x0 /* PD16 periph A */
3 17 0x1 0x0>; /* PD17 periph A */
};
};
- uart2 {
- pinctrl_uart2: uart2-0 {
+ usart2 {
+ pinctrl_usart2: usart2-0 {
atmel,pins =
<1 6 0x1 0x1 /* PB6 periph A with pullup */
1 7 0x1 0x0>; /* PB7 periph A */
};
- pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
+ pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
atmel,pins =
<2 9 0x2 0x0 /* PC9 periph B */
2 11 0x2 0x0>; /* PC11 periph B */
};
};
- uart3 {
- pinctrl_uart3: uart3-0 {
+ usart3 {
+ pinctrl_usart3: usart3-0 {
atmel,pins =
<1 8 0x1 0x1 /* PB9 periph A with pullup */
1 9 0x1 0x0>; /* PB8 periph A */
};
- pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
+ pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
atmel,pins =
<0 23 0x2 0x0 /* PA23 periph B */
0 24 0x2 0x0>; /* PA24 periph B */
@@ -291,7 +291,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart0>;
+ pinctrl-0 = <&pinctrl_usart0>;
status = "disabled";
};
@@ -302,7 +302,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
+ pinctrl-0 = <&pinctrl_usart1>;
status = "disabled";
};
@@ -313,7 +313,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
+ pinctrl-0 = <&pinctrl_usart2>;
status = "disabled";
};
@@ -324,7 +324,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart3>;
+ pinctrl-0 = <&pinctrl_usart3>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 6aa28b9..0d9674b 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -39,7 +39,7 @@
};
usart1: serial@fff90000 {
- pinctrl-0 = <&pinctrl_uart0 &pinctrl_uart1_rts_cts>;
+ pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 7b644c5..10547bc 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -125,66 +125,66 @@
};
};
- uart0 {
- pinctrl_uart0: uart0-0 {
+ usart0 {
+ pinctrl_usart0: usart0-0 {
atmel,pins =
<0 1 0x1 0x1 /* PA1 periph A with pullup */
0 0 0x1 0x0>; /* PA0 periph A */
};
- pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
+ pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
atmel,pins =
<0 2 0x1 0x0 /* PA2 periph A */
0 3 0x1 0x0>; /* PA3 periph A */
};
};
- uart1 {
- pinctrl_uart1: uart1-0 {
+ usart1 {
+ pinctrl_usart1: usart1-0 {
atmel,pins =
<0 6 0x1 0x1 /* PA6 periph A with pullup */
0 5 0x1 0x0>; /* PA5 periph A */
};
};
- uart2 {
- pinctrl_uart2: uart2-0 {
+ usart2 {
+ pinctrl_usart2: usart2-0 {
atmel,pins =
<0 8 0x1 0x1 /* PA8 periph A with pullup */
0 7 0x1 0x0>; /* PA7 periph A */
};
- pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
+ pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
atmel,pins =
<1 0 0x2 0x0 /* PB0 periph B */
1 1 0x2 0x0>; /* PB1 periph B */
};
};
- uart3 {
- pinctrl_uart3: uart3-0 {
+ usart3 {
+ pinctrl_usart3: usart3-0 {
atmel,pins =
<2 23 0x2 0x1 /* PC23 periph B with pullup */
2 22 0x2 0x0>; /* PC22 periph B */
};
- pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
+ pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
atmel,pins =
<2 24 0x2 0x0 /* PC24 periph B */
2 25 0x2 0x0>; /* PC25 periph B */
};
};
- usart0 {
- pinctrl_usart0: usart0-0 {
+ uart0 {
+ pinctrl_uart0: uart0-0 {
atmel,pins =
<2 9 0x3 0x1 /* PC9 periph C with pullup */
2 8 0x3 0x0>; /* PC8 periph C */
};
};
- usart1 {
- pinctrl_usart1: usart1-0 {
+ uart1 {
+ pinctrl_uart1: uart1-0 {
atmel,pins =
<2 16 0x3 0x1 /* PC17 periph C with pullup */
2 17 0x3 0x0>; /* PC16 periph C */
@@ -256,7 +256,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart0>;
+ pinctrl-0 = <&pinctrl_usart0>;
status = "disabled";
};
@@ -267,7 +267,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
+ pinctrl-0 = <&pinctrl_usart1>;
status = "disabled";
};
@@ -278,7 +278,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
+ pinctrl-0 = <&pinctrl_usart2>;
status = "disabled";
};
@@ -289,7 +289,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart3>;
+ pinctrl-0 = <&pinctrl_usart3>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 9fd7159..9dac006 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -126,36 +126,36 @@
};
};
- uart0 {
- pinctrl_uart0: uart0-0 {
+ usart0 {
+ pinctrl_usart0: usart0-0 {
atmel,pins =
<0 0 0x1 0x1 /* PA0 periph A with pullup */
0 1 0x1 0x0>; /* PA1 periph A */
};
- pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
+ pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
atmel,pins =
<0 2 0x1 0x0 /* PA2 periph A */
0 3 0x1 0x0>; /* PA3 periph A */
};
};
- uart1 {
- pinctrl_uart1: uart1-0 {
+ usart1 {
+ pinctrl_usart1: usart1-0 {
atmel,pins =
<0 5 0x1 0x1 /* PA5 periph A with pullup */
0 6 0x1 0x0>; /* PA6 periph A */
};
- pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
+ pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
atmel,pins =
<3 27 0x3 0x0 /* PC27 periph C */
3 28 0x3 0x0>; /* PC28 periph C */
};
};
- uart2 {
- pinctrl_uart2: uart2-0 {
+ usart2 {
+ pinctrl_usart2: usart2-0 {
atmel,pins =
<0 7 0x1 0x1 /* PA7 periph A with pullup */
0 8 0x1 0x0>; /* PA8 periph A */
@@ -168,30 +168,30 @@
};
};
- uart3 {
- pinctrl_uart3: uart3-0 {
+ usart3 {
+ pinctrl_uart3: usart3-0 {
atmel,pins =
<3 23 0x2 0x1 /* PC22 periph B with pullup */
3 23 0x2 0x0>; /* PC23 periph B */
};
- pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
+ pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
atmel,pins =
<3 24 0x2 0x0 /* PC24 periph B */
3 25 0x2 0x0>; /* PC25 periph B */
};
};
- usart0 {
- pinctrl_usart0: usart0-0 {
+ uart0 {
+ pinctrl_uart0: uart0-0 {
atmel,pins =
<3 8 0x3 0x0 /* PC8 periph C */
3 9 0x3 0x1>; /* PC9 periph C with pullup */
};
};
- usart1 {
- pinctrl_usart1: usart1-0 {
+ uart1 {
+ pinctrl_uart1: uart1-0 {
atmel,pins =
<3 16 0x3 0x0 /* PC16 periph C */
3 17 0x3 0x1>; /* PC17 periph C with pullup */
@@ -293,7 +293,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart0>;
+ pinctrl-0 = <&pinctrl_usart0>;
status = "disabled";
};
@@ -304,7 +304,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
+ pinctrl-0 = <&pinctrl_usart1>;
status = "disabled";
};
@@ -315,7 +315,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
+ pinctrl-0 = <&pinctrl_usart2>;
status = "disabled";
};
--
1.7.10.4
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 5/5] ARM: at91: dt: at91sam9260: split rts and cts pinctrl not
2012-11-20 21:26 ` [PATCH 1/5] pinctrl: at91: provide gpio names Jean-Christophe PLAGNIOL-VILLARD
` (2 preceding siblings ...)
2012-11-20 21:26 ` [PATCH 4/5] ARM: at91: fix usart/uart namimg in pinctrl Jean-Christophe PLAGNIOL-VILLARD
@ 2012-11-20 21:26 ` Jean-Christophe PLAGNIOL-VILLARD
2012-11-20 21:35 ` [PATCH 1/5] pinctrl: at91: provide gpio names Jean-Christophe PLAGNIOL-VILLARD
4 siblings, 0 replies; 6+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-11-20 21:26 UTC (permalink / raw)
To: barebox
as we just use the rts and not the rts & cts for rs485
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
arch/arm/boot/dts/at91sam9260.dtsi | 40 +++++++++++++++++++--------
arch/arm/boot/dts/at91sam9263.dtsi | 30 ++++++++++++++------
arch/arm/boot/dts/at91sam9263ek.dts | 5 +++-
arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 3 +-
arch/arm/boot/dts/at91sam9g45.dtsi | 40 +++++++++++++++++++--------
arch/arm/boot/dts/at91sam9m10g45ek.dts | 5 +++-
arch/arm/boot/dts/at91sam9n12.dtsi | 30 ++++++++++++++------
arch/arm/boot/dts/at91sam9x5.dtsi | 40 +++++++++++++++++++--------
8 files changed, 136 insertions(+), 57 deletions(-)
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 40bf329..a5d9460 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -127,10 +127,14 @@
1 5 0x1 0x0>; /* PB5 periph A */
};
- pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
+ pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
- <1 26 0x1 0x0 /* PB26 periph A */
- 1 27 0x1 0x0>; /* PB27 periph A */
+ <1 26 0x1 0x0>; /* PB26 periph A */
+ };
+
+ pinctrl_usart0_cts: usart0_cts-0 {
+ atmel,pins =
+ <1 27 0x1 0x0>; /* PB27 periph A */
};
pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
@@ -157,10 +161,14 @@
2 7 0x1 0x0>; /* PB7 periph A */
};
- pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
+ pinctrl_usart1_rts: usart1_rts-0 {
+ atmel,pins =
+ <1 28 0x1 0x0>; /* PB28 periph A */
+ };
+
+ pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
- <1 28 0x1 0x0 /* PB28 periph A */
- 1 29 0x1 0x0>; /* PB29 periph A */
+ <1 29 0x1 0x0>; /* PB29 periph A */
};
};
@@ -171,10 +179,14 @@
1 9 0x1 0x0>; /* PB9 periph A */
};
- pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
+ pinctrl_usart2_rts: usart2_rts-0 {
atmel,pins =
- <0 4 0x1 0x0 /* PA4 periph A */
- 0 5 0x1 0x0>; /* PA5 periph A */
+ <0 4 0x1 0x0>; /* PA4 periph A */
+ };
+
+ pinctrl_usart2_cts: usart2_cts-0 {
+ atmel,pins =
+ <0 5 0x1 0x0>; /* PA5 periph A */
};
};
@@ -185,10 +197,14 @@
2 11 0x1 0x0>; /* PB11 periph A */
};
- pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
+ pinctrl_usart3_rts: usart3_rts-0 {
+ atmel,pins =
+ <3 8 0x2 0x0>; /* PB8 periph B */
+ };
+
+ pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
- <3 8 0x2 0x0 /* PB8 periph B */
- 3 10 0x2 0x0>; /* PB10 periph B */
+ <3 10 0x2 0x0>; /* PB10 periph B */
};
};
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index cf4b59f..a14aa3d 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -120,10 +120,14 @@
0 27 0x1 0x0>; /* PA27 periph A */
};
- pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
+ pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
- <0 28 0x1 0x0 /* PA28 periph A */
- 0 29 0x1 0x0>; /* PA29 periph A */
+ <0 28 0x1 0x0>; /* PA28 periph A */
+ };
+
+ pinctrl_usart0_cts: usart0_cts-0 {
+ atmel,pins =
+ <0 29 0x1 0x0>; /* PA29 periph A */
};
};
@@ -134,10 +138,14 @@
3 1 0x1 0x0>; /* PD1 periph A */
};
- pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
+ pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins =
- <3 7 0x2 0x0 /* PD7 periph B */
- 3 8 0x2 0x0>; /* PD8 periph B */
+ <3 7 0x2 0x0>; /* PD7 periph B */
+ };
+
+ pinctrl_usart1_cts: usart1_cts-0 {
+ atmel,pins =
+ <3 8 0x2 0x0>; /* PD8 periph B */
};
};
@@ -148,10 +156,14 @@
3 3 0x1 0x0>; /* PD3 periph A */
};
- pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
+ pinctrl_usart2_rts: usart2_rts-0 {
+ atmel,pins =
+ <3 5 0x2 0x0>; /* PD5 periph B */
+ };
+
+ pinctrl_usart2_cts: usart2_cts-0 {
atmel,pins =
- <3 5 0x2 0x0 /* PD5 periph B */
- 4 6 0x2 0x0>; /* PD6 periph B */
+ <4 6 0x2 0x0>; /* PD6 periph B */
};
};
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts
index 3434373..e6a57a3 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -38,7 +38,10 @@
};
usart0: serial@fff8c000 {
- pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
+ pinctrl-0 = <
+ &pinctrl_usart0
+ &pinctrl_usart0_rts
+ &pinctrl_usart0_cts>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index 04f048f..59244d9 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -37,7 +37,8 @@
usart0: serial@fffb0000 {
pinctrl-0 =
<&pinctrl_usart0
- &pinctrl_usart0_rts_cts
+ &pinctrl_usart0_rts
+ &pinctrl_usart0_cts
&pinctrl_usart0_dtr_dsr
&pinctrl_usart0_dcd
&pinctrl_usart0_ri>;
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 56ce896..dc9a4ee 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -139,10 +139,14 @@
1 18 0x1 0x0>; /* PB18 periph A */
};
- pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
+ pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
- <1 17 0x2 0x0 /* PB17 periph B */
- 1 15 0x2 0x0>; /* PB15 periph B */
+ <1 17 0x2 0x0>; /* PB17 periph B */
+ };
+
+ pinctrl_usart0_cts: usart0_cts-0 {
+ atmel,pins =
+ <1 15 0x2 0x0>; /* PB15 periph B */
};
};
@@ -153,10 +157,14 @@
1 5 0x1 0x0>; /* PB5 periph A */
};
- pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
+ pinctrl_usart1_rts: usart1_rts-0 {
+ atmel,pins =
+ <3 16 0x1 0x0>; /* PD16 periph A */
+ };
+
+ pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
- <3 16 0x1 0x0 /* PD16 periph A */
- 3 17 0x1 0x0>; /* PD17 periph A */
+ <3 17 0x1 0x0>; /* PD17 periph A */
};
};
@@ -167,10 +175,14 @@
1 7 0x1 0x0>; /* PB7 periph A */
};
- pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
+ pinctrl_usart2_rts: usart2_rts-0 {
atmel,pins =
- <2 9 0x2 0x0 /* PC9 periph B */
- 2 11 0x2 0x0>; /* PC11 periph B */
+ <2 9 0x2 0x0>; /* PC9 periph B */
+ };
+
+ pinctrl_usart2_cts: usart2_cts-0 {
+ atmel,pins =
+ <2 11 0x2 0x0>; /* PC11 periph B */
};
};
@@ -181,10 +193,14 @@
1 9 0x1 0x0>; /* PB8 periph A */
};
- pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
+ pinctrl_usart3_rts: usart3_rts-0 {
+ atmel,pins =
+ <0 23 0x2 0x0>; /* PA23 periph B */
+ };
+
+ pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
- <0 23 0x2 0x0 /* PA23 periph B */
- 0 24 0x2 0x0>; /* PA24 periph B */
+ <0 24 0x2 0x0>; /* PA24 periph B */
};
};
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 0d9674b..afd5867 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -39,7 +39,10 @@
};
usart1: serial@fff90000 {
- pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
+ pinctrl-0 =
+ <&pinctrl_usart1
+ &pinctrl_usart1_rts
+ &pinctrl_usart1_cts>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 10547bc..1667937 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -132,10 +132,14 @@
0 0 0x1 0x0>; /* PA0 periph A */
};
- pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
+ pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
- <0 2 0x1 0x0 /* PA2 periph A */
- 0 3 0x1 0x0>; /* PA3 periph A */
+ <0 2 0x1 0x0>; /* PA2 periph A */
+ };
+
+ pinctrl_usart0_cts: usart0_cts-0 {
+ atmel,pins =
+ <0 3 0x1 0x0>; /* PA3 periph A */
};
};
@@ -154,10 +158,14 @@
0 7 0x1 0x0>; /* PA7 periph A */
};
- pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
+ pinctrl_usart2_rts: usart2_rts-0 {
atmel,pins =
- <1 0 0x2 0x0 /* PB0 periph B */
- 1 1 0x2 0x0>; /* PB1 periph B */
+ <1 0 0x2 0x0>; /* PB0 periph B */
+ };
+
+ pinctrl_usart2_cts: usart2_cts-0 {
+ atmel,pins =
+ <1 1 0x2 0x0>; /* PB1 periph B */
};
};
@@ -168,10 +176,14 @@
2 22 0x2 0x0>; /* PC22 periph B */
};
- pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
+ pinctrl_usart3_rts: usart3_rts-0 {
+ atmel,pins =
+ <2 24 0x2 0x0>; /* PC24 periph B */
+ };
+
+ pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
- <2 24 0x2 0x0 /* PC24 periph B */
- 2 25 0x2 0x0>; /* PC25 periph B */
+ <2 25 0x2 0x0>; /* PC25 periph B */
};
};
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 9dac006..3642ab1 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -133,10 +133,14 @@
0 1 0x1 0x0>; /* PA1 periph A */
};
- pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
+ pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
- <0 2 0x1 0x0 /* PA2 periph A */
- 0 3 0x1 0x0>; /* PA3 periph A */
+ <0 2 0x1 0x0>; /* PA2 periph A */
+ };
+
+ pinctrl_usart0_cts: usart0_cts-0 {
+ atmel,pins =
+ <0 3 0x1 0x0>; /* PA3 periph A */
};
};
@@ -147,10 +151,14 @@
0 6 0x1 0x0>; /* PA6 periph A */
};
- pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
+ pinctrl_usart1_rts: usart1_rts-0 {
+ atmel,pins =
+ <3 27 0x3 0x0>; /* PC27 periph C */
+ };
+
+ pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
- <3 27 0x3 0x0 /* PC27 periph C */
- 3 28 0x3 0x0>; /* PC28 periph C */
+ <3 28 0x3 0x0>; /* PC28 periph C */
};
};
@@ -161,10 +169,14 @@
0 8 0x1 0x0>; /* PA8 periph A */
};
- pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
+ pinctrl_uart2_rts: uart2_rts-0 {
atmel,pins =
- <0 0 0x2 0x0 /* PB0 periph B */
- 0 1 0x2 0x0>; /* PB1 periph B */
+ <0 0 0x2 0x0>; /* PB0 periph B */
+ };
+
+ pinctrl_uart2_cts: uart2_cts-0 {
+ atmel,pins =
+ <0 1 0x2 0x0>; /* PB1 periph B */
};
};
@@ -175,10 +187,14 @@
3 23 0x2 0x0>; /* PC23 periph B */
};
- pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
+ pinctrl_usart3_rts: usart3_rts-0 {
+ atmel,pins =
+ <3 24 0x2 0x0>; /* PC24 periph B */
+ };
+
+ pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
- <3 24 0x2 0x0 /* PC24 periph B */
- 3 25 0x2 0x0>; /* PC25 periph B */
+ <3 25 0x2 0x0>; /* PC25 periph B */
};
};
--
1.7.10.4
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/5] pinctrl: at91: provide gpio names
2012-11-20 21:26 ` [PATCH 1/5] pinctrl: at91: provide gpio names Jean-Christophe PLAGNIOL-VILLARD
` (3 preceding siblings ...)
2012-11-20 21:26 ` [PATCH 5/5] ARM: at91: dt: at91sam9260: split rts and cts pinctrl not Jean-Christophe PLAGNIOL-VILLARD
@ 2012-11-20 21:35 ` Jean-Christophe PLAGNIOL-VILLARD
4 siblings, 0 replies; 6+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-11-20 21:35 UTC (permalink / raw)
To: barebox
HI,
wrong ml
sorry
Best Regards,
J.
On 22:26 Tue 20 Nov , Jean-Christophe PLAGNIOL-VILLARD wrote:
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> ---
> drivers/pinctrl/pinctrl-at91.c | 15 ++++++++++++++-
> 1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
> index b9e2cbd..401fc96 100644
> --- a/drivers/pinctrl/pinctrl-at91.c
> +++ b/drivers/pinctrl/pinctrl-at91.c
> @@ -1364,9 +1364,10 @@ static int __devinit at91_gpio_probe(struct platform_device *pdev)
> struct gpio_chip *chip;
> struct pinctrl_gpio_range *range;
> int ret = 0;
> - int irq;
> + int irq, i;
> int alias_idx = of_alias_get_id(np, "gpio");
> uint32_t ngpio;
> + char **names;
>
> BUG_ON(alias_idx >= ARRAY_SIZE(gpio_chips));
> if (gpio_chips[alias_idx]) {
> @@ -1436,6 +1437,18 @@ static int __devinit at91_gpio_probe(struct platform_device *pdev)
> chip->ngpio = ngpio;
> }
>
> + names = devm_kzalloc(&pdev->dev, sizeof(char*) * chip->ngpio, GFP_KERNEL);
> +
> + if (!names) {
> + ret = -ENOMEM;
> + goto clk_err;
> + }
> +
> + for (i = 0; i < chip->ngpio; i++)
> + names[i] = kasprintf(GFP_KERNEL, "pio%c%d", alias_idx + 'A', i);
> +
> + chip->names = (const char*const*)names;
> +
> range = &at91_chip->range;
> range->name = chip->label;
> range->id = alias_idx;
> --
> 1.7.10.4
>
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^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2012-11-20 21:37 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2012-11-20 21:26 ` [PATCH 1/5] pinctrl: at91: provide gpio names Jean-Christophe PLAGNIOL-VILLARD
2012-11-20 21:26 ` [PATCH 2/5] pinctrl: at91 add deglitch, debounce, pull down and schmitt trigger mux option support Jean-Christophe PLAGNIOL-VILLARD
2012-11-20 21:26 ` [PATCH 3/5] ARM: at91sam9: add macb pinctrl support Jean-Christophe PLAGNIOL-VILLARD
2012-11-20 21:26 ` [PATCH 4/5] ARM: at91: fix usart/uart namimg in pinctrl Jean-Christophe PLAGNIOL-VILLARD
2012-11-20 21:26 ` [PATCH 5/5] ARM: at91: dt: at91sam9260: split rts and cts pinctrl not Jean-Christophe PLAGNIOL-VILLARD
2012-11-20 21:35 ` [PATCH 1/5] pinctrl: at91: provide gpio names Jean-Christophe PLAGNIOL-VILLARD
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