From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mail-bk0-f46.google.com ([209.85.214.46]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TzTcU-0008Im-Im for barebox@lists.infradead.org; Sun, 27 Jan 2013 14:54:08 +0000 Received: by mail-bk0-f46.google.com with SMTP id j5so929498bkw.33 for ; Sun, 27 Jan 2013 06:54:04 -0800 (PST) Date: Sun, 27 Jan 2013 15:54:35 +0100 From: Alexander Aring Message-ID: <20130127145433.GA1217@x61s.8.8.8.8> References: <1359283623-1782-1-git-send-email-s.hauer@pengutronix.de> <1359283623-1782-30-git-send-email-s.hauer@pengutronix.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1359283623-1782-30-git-send-email-s.hauer@pengutronix.de> List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: barebox-bounces@lists.infradead.org Errors-To: barebox-bounces+u.kleine-koenig=pengutronix.de@lists.infradead.org Subject: Re: [PATCH 29/34] ARM: Factor out early mmu code To: Sascha Hauer Cc: barebox@lists.infradead.org Hi, On Sun, Jan 27, 2013 at 11:46:58AM +0100, Sascha Hauer wrote: > Move early mmu code to a separate file so that it can be > used from the pbl and the regular image. Disabling the mmu > can be dropped since the regular mmu code is now able to > pickup an enabled mmu. > > Signed-off-by: Sascha Hauer > --- > arch/arm/cpu/Makefile | 4 +-- > arch/arm/cpu/mmu-early.c | 53 ++++++++++++++++++++++++++++++++++ > arch/arm/cpu/mmu-early.h | 6 ++++ > arch/arm/cpu/start-pbl.c | 72 ---------------------------------------------- > 4 files changed, 61 insertions(+), 74 deletions(-) > create mode 100644 arch/arm/cpu/mmu-early.c > create mode 100644 arch/arm/cpu/mmu-early.h > > diff --git a/arch/arm/cpu/Makefile b/arch/arm/cpu/Makefile > index 4b0259c..44410ee 100644 > --- a/arch/arm/cpu/Makefile > +++ b/arch/arm/cpu/Makefile > @@ -8,8 +8,8 @@ obj-y += start.o setupc.o > # > obj-$(CONFIG_CMD_ARM_CPUINFO) += cpuinfo.o > obj-$(CONFIG_CMD_ARM_MMUINFO) += mmuinfo.o > -obj-$(CONFIG_MMU) += mmu.o cache.o > -pbl-$(CONFIG_MMU) += cache.o > +obj-$(CONFIG_MMU) += mmu.o cache.o mmu-early.o > +pbl-$(CONFIG_MMU) += cache.o mmu-early.o > obj-$(CONFIG_CPU_32v4T) += cache-armv4.o > pbl-$(CONFIG_CPU_32v4T) += cache-armv4.o > obj-$(CONFIG_CPU_32v5) += cache-armv5.o > diff --git a/arch/arm/cpu/mmu-early.c b/arch/arm/cpu/mmu-early.c > new file mode 100644 > index 0000000..b8b30df > --- /dev/null > +++ b/arch/arm/cpu/mmu-early.c > @@ -0,0 +1,53 @@ > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include "mmu.h" > + > +static uint32_t *ttb; > + > +static void create_sections(unsigned long addr, int size_m, unsigned int flags) > +{ > + int i; > + > + addr >>= 20; > + > + for (i = size_m; i > 0; i--, addr++) > + ttb[addr] = (addr << 20) | flags; > +} > + > +static void map_cachable(unsigned long start, unsigned long size) > +{ > + start &= ~(SZ_1M - 1); > + size = (size + (SZ_1M - 1)) & ~(SZ_1M - 1); Maybe we can use ALIGN macro from common.h here? Only a small change, but it's easier to understand code. I can send a patch for this, if you like that idea. Similar we can create a macro ALIGN_DOWN for start. Regards Alex > + > + create_sections(start, size >> 20, PMD_SECT_AP_WRITE | > + PMD_SECT_AP_READ | PMD_TYPE_SECT | PMD_SECT_WB); > +} > + > +void mmu_early_enable(uint32_t membase, uint32_t memsize, uint32_t _ttb) > +{ > + int i; > + > + ttb = (uint32_t *)_ttb; > + > + arm_set_cache_functions(); > + > + /* Set the ttb register */ > + asm volatile ("mcr p15,0,%0,c2,c0,0" : : "r"(ttb) /*:*/); > + > + /* Set the Domain Access Control Register */ > + i = 0x3; > + asm volatile ("mcr p15,0,%0,c3,c0,0" : : "r"(i) /*:*/); > + > + create_sections(0, 4096, PMD_SECT_AP_WRITE | > + PMD_SECT_AP_READ | PMD_TYPE_SECT); > + > + map_cachable(membase, memsize); > + > + __mmu_cache_on(); > +} > diff --git a/arch/arm/cpu/mmu-early.h b/arch/arm/cpu/mmu-early.h > new file mode 100644 > index 0000000..af21f52 > --- /dev/null > +++ b/arch/arm/cpu/mmu-early.h > @@ -0,0 +1,6 @@ > +#ifndef __ARM_CPU_MMU_EARLY_H > +#define __ARM_CPU_MMU_EARLY_H > + > +void mmu_early_enable(uint32_t membase, uint32_t memsize, uint32_t ttb); > + > +#endif /* __ARM_CPU_MMU_EARLY_H */ > diff --git a/arch/arm/cpu/start-pbl.c b/arch/arm/cpu/start-pbl.c > index 6610be6..96a9dcf 100644 > --- a/arch/arm/cpu/start-pbl.c > +++ b/arch/arm/cpu/start-pbl.c > @@ -57,64 +57,6 @@ extern void *input_data_end; > #include "../../../lib/decompress_inflate.c" > #endif > > -static unsigned long *ttb; > - > -static void create_sections(unsigned long addr, int size_m, unsigned int flags) > -{ > - int i; > - > - addr >>= 20; > - > - for (i = size_m; i > 0; i--, addr++) > - ttb[addr] = (addr << 20) | flags; > -} > - > -static void map_cachable(unsigned long start, unsigned long size) > -{ > - start &= ~(SZ_1M - 1); > - size = (size + (SZ_1M - 1)) & ~(SZ_1M - 1); > - > - create_sections(start, size >> 20, PMD_SECT_AP_WRITE | > - PMD_SECT_AP_READ | PMD_TYPE_SECT | PMD_SECT_WB); > -} > - > -static void mmu_enable(unsigned long compressed_start, unsigned int len) > -{ > - int i; > - > - /* Set the ttb register */ > - asm volatile ("mcr p15,0,%0,c2,c0,0" : : "r"(ttb) /*:*/); > - > - /* Set the Domain Access Control Register */ > - i = 0x3; > - asm volatile ("mcr p15,0,%0,c3,c0,0" : : "r"(i) /*:*/); > - > - create_sections(0, 4096, PMD_SECT_AP_WRITE | > - PMD_SECT_AP_READ | PMD_TYPE_SECT); > - /* > - * Setup all regions we need cacheable, namely: > - * - the stack > - * - the decompressor code > - * - the compressed image > - * - the uncompressed image > - * - the early malloc space > - */ > - map_cachable(STACK_BASE, STACK_SIZE); > - map_cachable((unsigned long)&_text, > - (unsigned long)&_end - (unsigned long)&_text); > - map_cachable((unsigned long)compressed_start, len); > - map_cachable(TEXT_BASE, len * 4); > - map_cachable(free_mem_ptr, free_mem_end_ptr - free_mem_ptr); > - > - __mmu_cache_on(); > -} > - > -static void mmu_disable(void) > -{ > - __mmu_cache_flush(); > - __mmu_cache_off(); > -} > - > static void noinline errorfn(char *error) > { > while (1); > @@ -122,25 +64,11 @@ static void noinline errorfn(char *error) > > static void barebox_uncompress(void *compressed_start, unsigned int len) > { > - /* > - * remap_cached currently does not work rendering the feature > - * of enabling the MMU in the PBL useless. disable for now. > - */ > - int use_mmu = 0; > - > - ttb = (void *)((free_mem_ptr - 0x4000) & ~0x3fff); > - > - if (use_mmu) > - mmu_enable((unsigned long)compressed_start, len); > - > decompress((void *)compressed_start, > len, > NULL, NULL, > (void *)TEXT_BASE, NULL, errorfn); > > - if (use_mmu) > - mmu_disable(); > - > flush_icache(); > } > > -- > 1.7.10.4 > > > _______________________________________________ > barebox mailing list > barebox@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/barebox _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox