Re: [PATCH v2 3/5] ARM: zynq: add clk support for zynq7000

[Steffen Trumtrar <s.trumtrar@pengutronix.de>]

On Tue, Mar 19, 2013 at 08:29:54AM -0500, Josh Cartwright wrote:
> On Tue, Mar 19, 2013 at 10:21:58AM +0100, Steffen Trumtrar wrote:
> > This adds support for the clocktree on zynq7000 SoCs.
> > The patch is based on clocks.c from the larger patch
> > 	ARM: zynq: add suppport for Zynq 7000 SoC
> > by Josh Cartwright.
> > 
> > The driver in that patch is converted to a platform_driver and code to
> > enable plls was added.
> > 
> > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> > ---
> [..]
> > +
> > +static int zynq_clock_probe(struct device_d *dev)
> > +{
> > +	void __iomem *slcr_base;
> > +	unsigned long ps_clk_rate = 33333330;
> 
> My version of the patchset had this ^ configurable, since it's possible
> a different osc could be used on the board.  Any reason why you've
> hardcoded this instead?
> 

Hm, not really any good reason. But the plan is to get this from the
devicetree instead. I didn't get around to actually doing that.
Do your boards have another osc or would a hardcoded value suffice for
the moment?

str

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox