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Date: Wed, 5 Jun 2013 08:52:39 +0200
From: Sascha Hauer <s.hauer@pengutronix.de>
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Subject: Re: [PATCH V2] ARM i.MX6: set imx6 silicon revision
To: "S. Fricke" <sfricke@data-modul.com>
Cc: barebox@lists.infradead.org

On Tue, Jun 04, 2013 at 03:07:57PM +0200, S. Fricke wrote:
> From: "S. Fricke" <sfricke@data-modul.com>
> 
> This is mainly a backport of the imx6_revision function of
> arch/arm/mach-imx/mach-imx6q.c in the linux kernel sources.
> 
> Signed-off-by: S. Fricke <sfricke@data-modul.com>

Applied, thanks

Sascha

> ---
>  arch/arm/mach-imx/imx6.c | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
> index 5c20aa1..1d69ec8 100644
> --- a/arch/arm/mach-imx/imx6.c
> +++ b/arch/arm/mach-imx/imx6.c
> @@ -16,8 +16,11 @@
>  #include <io.h>
>  #include <sizes.h>
>  #include <mach/generic.h>
> +#include <mach/revision.h>
>  #include <mach/imx6-regs.h>
>  
> +#define SI_REV 0x260
> +
>  void imx6_init_lowlevel(void)
>  {
>  	void __iomem *aips1 = (void *)MX6_AIPS1_ON_BASE_ADDR;
> @@ -55,8 +58,31 @@ void imx6_init_lowlevel(void)
>  
>  static int imx6_init(void)
>  {
> +	u32 rev;
> +	u32 mx6_silicon_revision;
> +
>  	imx6_boot_save_loc((void *)MX6_SRC_BASE_ADDR);
>  
> +	rev = readl(MX6_ANATOP_BASE_ADDR + SI_REV);
> +	switch (rev & 0xff) {
> +	case 0x00:
> +		mx6_silicon_revision = IMX_CHIP_REV_1_0;
> +		break;
> +
> +	case 0x01:
> +		mx6_silicon_revision = IMX_CHIP_REV_1_1;
> +		break;
> +
> +	case 0x02:
> +		mx6_silicon_revision = IMX_CHIP_REV_1_2;
> +		break;
> +
> +	default:
> +		mx6_silicon_revision = IMX_CHIP_REV_UNKNOWN;
> +	}
> +
> +	imx_set_silicon_revision("i.MX6", mx6_silicon_revision);
> +
>  	if (of_get_root_node())
>  		return 0;
>  
> -- 
> 1.8.3
> 
> 
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

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