[PATCH] ARM i.MX6: Gate clocks to graphics processing units

[PATCH] ARM i.MX6: Gate clocks to graphics processing units

[Philipp Zabel]

This patch gates the clocks to GPU, IPU, and VPU units by default,
significantly reducing the VDDSOC power draw while barebox is running.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
 arch/arm/mach-imx/clk-imx6.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-imx/clk-imx6.c b/arch/arm/mach-imx/clk-imx6.c
index c32b6cc..ac86074 100644
--- a/arch/arm/mach-imx/clk-imx6.c
+++ b/arch/arm/mach-imx/clk-imx6.c
@@ -307,12 +307,12 @@ static int imx6_ccm_probe(struct device_d *dev)
 	clkdev_add_physbase(clks[enfc_podf], MX6_GPMI_BASE_ADDR, NULL);
 
 	writel(0xffffffff, ccm_base + CCGR0);
-	writel(0xffffffff, ccm_base + CCGR1);
+	writel(0xf0ffffff, ccm_base + CCGR1); /* gate GPU3D, GPU2D */
 	writel(0xffffffff, ccm_base + CCGR2);
-	writel(0xffffffff, ccm_base + CCGR3);
+	writel(0x3fff0000, ccm_base + CCGR3); /* gate OpenVG, LDB, IPU1, IPU2 */
 	writel(0xffffffff, ccm_base + CCGR4);
 	writel(0xffffffff, ccm_base + CCGR5);
-	writel(0xffffffff, ccm_base + CCGR6);
+	writel(0xffff3fff, ccm_base + CCGR6); /* gate VPU */
 	writel(0xffffffff, ccm_base + CCGR7);
 
 	clk_enable(clks[pll6_enet]);
-- 
1.9.0.rc3


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Re: [PATCH] ARM i.MX6: Gate clocks to graphics processing units

[Sascha Hauer]

On Fri, Feb 21, 2014 at 06:37:57PM +0100, Philipp Zabel wrote:
> This patch gates the clocks to GPU, IPU, and VPU units by default,
> significantly reducing the VDDSOC power draw while barebox is running.
> 
> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

Ok. I hope we remember to revert this change when we add the 3d driver
to barebox ;)

Sascha

> ---
>  arch/arm/mach-imx/clk-imx6.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/clk-imx6.c b/arch/arm/mach-imx/clk-imx6.c
> index c32b6cc..ac86074 100644
> --- a/arch/arm/mach-imx/clk-imx6.c
> +++ b/arch/arm/mach-imx/clk-imx6.c
> @@ -307,12 +307,12 @@ static int imx6_ccm_probe(struct device_d *dev)
>  	clkdev_add_physbase(clks[enfc_podf], MX6_GPMI_BASE_ADDR, NULL);
>  
>  	writel(0xffffffff, ccm_base + CCGR0);
> -	writel(0xffffffff, ccm_base + CCGR1);
> +	writel(0xf0ffffff, ccm_base + CCGR1); /* gate GPU3D, GPU2D */
>  	writel(0xffffffff, ccm_base + CCGR2);
> -	writel(0xffffffff, ccm_base + CCGR3);
> +	writel(0x3fff0000, ccm_base + CCGR3); /* gate OpenVG, LDB, IPU1, IPU2 */
>  	writel(0xffffffff, ccm_base + CCGR4);
>  	writel(0xffffffff, ccm_base + CCGR5);
> -	writel(0xffffffff, ccm_base + CCGR6);
> +	writel(0xffff3fff, ccm_base + CCGR6); /* gate VPU */
>  	writel(0xffffffff, ccm_base + CCGR7);
>  
>  	clk_enable(clks[pll6_enet]);
> -- 
> 1.9.0.rc3
> 
> 
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

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