From: Sascha Hauer <s.hauer@pengutronix.de>
To: Matteo Fortini <matteo.fortini@gmail.com>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH V2] sama5d3x: fix AT91_SMC_CS offset stride
Date: Mon, 2 Jun 2014 08:55:40 +0200 [thread overview]
Message-ID: <20140602065540.GR15686@pengutronix.de> (raw)
In-Reply-To: <assp.0226f60ff0.1401367479-16179-1-git-send-email-matteo.fortini@gmail.com>
On Thu, May 29, 2014 at 02:44:39PM +0200, Matteo Fortini wrote:
> As stated in section 29.19.32 of SAMA5D3 Series datasheet, to move
> from CS(n) to CS(n+1) the stride is 0x14 and not 0x10 as in the
> other AT91 CPUs
>
> Signed-off-by: Matteo Fortini <matteo.fortini@gmail.com>
> ---
> arch/arm/mach-at91/sam9_smc.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
> index a137da4..6dd3797 100644
> --- a/arch/arm/mach-at91/sam9_smc.c
> +++ b/arch/arm/mach-at91/sam9_smc.c
> @@ -12,11 +12,13 @@
> #include <init.h>
> #include <io.h>
> #include <mach/hardware.h>
> +#include <mach/cpu.h>
> #include <mach/io.h>
>
> #include <mach/at91sam9_smc.h>
>
> -#define AT91_SMC_CS(id, n) (smc_base_addr[id] + ((n) * 0x10))
> +#define AT91_SMC_CS_STRIDE ((at91_soc_initdata.type == AT91_SOC_SAMA5D3)?0x14:0x10)
We follow the kernel Coding Style, so operators need whitespaces left
and right of them, so cond ? 0x14 : 0x10. Fixed this while applying.
Sascha
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prev parent reply other threads:[~2014-06-02 6:56 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-29 12:44 Matteo Fortini
2014-06-02 6:55 ` Sascha Hauer [this message]
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