From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZVDFX-0004en-81 for barebox@lists.infradead.org; Fri, 28 Aug 2015 06:34:56 +0000 Date: Fri, 28 Aug 2015 08:34:32 +0200 From: Sascha Hauer Message-ID: <20150828063432.GA18700@pengutronix.de> References: <1440714250-28080-1-git-send-email-antonynpavlov@gmail.com> <1440714250-28080-4-git-send-email-antonynpavlov@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1440714250-28080-4-git-send-email-antonynpavlov@gmail.com> List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "barebox" Errors-To: barebox-bounces+u.kleine-koenig=pengutronix.de@lists.infradead.org Subject: Re: [RFC 3/9] MIPS: add virt_to_phys() and phys_to_virt() To: Antony Pavlov Cc: barebox@lists.infradead.org, Peter Mamonov On Fri, Aug 28, 2015 at 01:24:04AM +0300, Antony Pavlov wrote: > N.B. phys_to_virt() translates phys address > to KSEG1 (uncached) address as barebox mips > has no cache support. What would it take to implement cache support for mips? The u-boot mips cache code seems quite straight forward. With cache support you could use several drivers as they are and wouldn't have to introduce physical/virtual translations. I'm afraid these translations will be broken quite soon as they get tested only on Mips. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox