* [PATCH 2/3] spi: i.MX: create SoC specific transfer functions
2015-08-31 15:12 [PATCH 1/3] spi: i.MX: use start mode control bit Sascha Hauer
@ 2015-08-31 15:12 ` Sascha Hauer
2015-08-31 15:12 ` [PATCH 3/3] spi: i.MX: optimize transfers for ECSPI v2.3 Sascha Hauer
1 sibling, 0 replies; 4+ messages in thread
From: Sascha Hauer @ 2015-08-31 15:12 UTC (permalink / raw)
To: Barebox List
There are SoC specific ways to optimize transfers. Make the way free
to implement these by creating SoC specific transfer functions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/spi/imx_spi.c | 45 +++++++++++++++++++++++++++++++--------------
1 file changed, 31 insertions(+), 14 deletions(-)
diff --git a/drivers/spi/imx_spi.c b/drivers/spi/imx_spi.c
index 81fa3b0..9a3f05c 100644
--- a/drivers/spi/imx_spi.c
+++ b/drivers/spi/imx_spi.c
@@ -39,11 +39,18 @@ struct imx_spi {
struct clk *clk;
unsigned int (*xchg_single)(struct imx_spi *imx, u32 data);
+ void (*do_transfer)(struct spi_device *spi);
void (*chipselect)(struct spi_device *spi, int active);
+
+ const void *tx_buf;
+ void *rx_buf;
+ int xfer_len;
+ int bits_per_word;
};
struct spi_imx_devtype_data {
unsigned int (*xchg_single)(struct imx_spi *imx, u32 data);
+ void (*do_transfer)(struct spi_device *spi);
void (*chipselect)(struct spi_device *spi, int active);
void (*init)(struct imx_spi *imx);
};
@@ -332,38 +339,39 @@ static u32 imx_xchg_single(struct spi_device *spi, u32 tx_val)
return imx_spi_maybe_reverse_bits(spi, rx_val);
}
-static void imx_spi_do_transfer(struct spi_device *spi, struct spi_transfer *t)
+static void imx_spi_do_transfer(struct spi_device *spi)
{
+ struct imx_spi *imx = container_of(spi->master, struct imx_spi, master);
unsigned i;
- if (spi->bits_per_word <= 8) {
- const u8 *tx_buf = t->tx_buf;
- u8 *rx_buf = t->rx_buf;
+ if (imx->bits_per_word <= 8) {
+ const u8 *tx_buf = imx->tx_buf;
+ u8 *rx_buf = imx->rx_buf;
u8 rx_val;
- for (i = 0; i < t->len; i++) {
+ for (i = 0; i < imx->xfer_len; i++) {
rx_val = imx_xchg_single(spi, tx_buf ? tx_buf[i] : 0);
if (rx_buf)
rx_buf[i] = rx_val;
}
- } else if (spi->bits_per_word <= 16) {
- const u16 *tx_buf = t->tx_buf;
- u16 *rx_buf = t->rx_buf;
+ } else if (imx->bits_per_word <= 16) {
+ const u16 *tx_buf = imx->tx_buf;
+ u16 *rx_buf = imx->rx_buf;
u16 rx_val;
- for (i = 0; i < t->len >> 1; i++) {
+ for (i = 0; i < imx->xfer_len >> 1; i++) {
rx_val = imx_xchg_single(spi, tx_buf ? tx_buf[i] : 0);
if (rx_buf)
rx_buf[i] = rx_val;
}
- } else if (spi->bits_per_word <= 32) {
- const u32 *tx_buf = t->tx_buf;
- u32 *rx_buf = t->rx_buf;
+ } else if (imx->bits_per_word <= 32) {
+ const u32 *tx_buf = imx->tx_buf;
+ u32 *rx_buf = imx->rx_buf;
u32 rx_val;
- for (i = 0; i < t->len >> 2; i++) {
+ for (i = 0; i < imx->xfer_len >> 2; i++) {
rx_val = imx_xchg_single(spi, tx_buf ? tx_buf[i] : 0);
if (rx_buf)
@@ -395,7 +403,12 @@ static int imx_spi_transfer(struct spi_device *spi, struct spi_message *mesg)
cs_change = t->cs_change;
- imx_spi_do_transfer(spi, t);
+ imx->tx_buf = t->tx_buf;
+ imx->rx_buf = t->rx_buf;
+ imx->xfer_len = t->len;
+ imx->bits_per_word = spi->bits_per_word;
+ imx->do_transfer(spi);
+
mesg->actual_length += t->len;
if (cs_change)
@@ -411,17 +424,20 @@ static int imx_spi_transfer(struct spi_device *spi, struct spi_message *mesg)
static __maybe_unused struct spi_imx_devtype_data spi_imx_devtype_data_0_0 = {
.chipselect = cspi_0_0_chipselect,
.xchg_single = cspi_0_0_xchg_single,
+ .do_transfer = imx_spi_do_transfer,
.init = cspi_0_0_init,
};
static __maybe_unused struct spi_imx_devtype_data spi_imx_devtype_data_0_7 = {
.chipselect = cspi_0_7_chipselect,
.xchg_single = cspi_0_7_xchg_single,
+ .do_transfer = imx_spi_do_transfer,
.init = cspi_0_7_init,
};
static __maybe_unused struct spi_imx_devtype_data spi_imx_devtype_data_2_3 = {
.chipselect = cspi_2_3_chipselect,
+ .do_transfer = imx_spi_do_transfer,
.xchg_single = cspi_2_3_xchg_single,
};
@@ -486,6 +502,7 @@ static int imx_spi_probe(struct device_d *dev)
imx->chipselect = devdata->chipselect;
imx->xchg_single = devdata->xchg_single;
+ imx->do_transfer = devdata->do_transfer;
imx->regs = dev_request_mem_region(dev, 0);
if (devdata->init)
--
2.5.0
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* [PATCH 3/3] spi: i.MX: optimize transfers for ECSPI v2.3
2015-08-31 15:12 [PATCH 1/3] spi: i.MX: use start mode control bit Sascha Hauer
2015-08-31 15:12 ` [PATCH 2/3] spi: i.MX: create SoC specific transfer functions Sascha Hauer
@ 2015-08-31 15:12 ` Sascha Hauer
2015-10-05 7:52 ` Sascha Hauer
1 sibling, 1 reply; 4+ messages in thread
From: Sascha Hauer @ 2015-08-31 15:12 UTC (permalink / raw)
To: Barebox List
Instead of writing one word to the txfifo and then wait until
one is received in the rxfifo we can write until the txfifos
are not full and read as long the rxfifos contain data. This
makes transfers for the m25p80 driver around 7 times faster
here.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/spi/imx_spi.c | 73 ++++++++++++++++++++++++++++++++++++++++++++++++++-
include/spi/imx-spi.h | 3 ++-
2 files changed, 74 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/imx_spi.c b/drivers/spi/imx_spi.c
index 9a3f05c..80dfc78 100644
--- a/drivers/spi/imx_spi.c
+++ b/drivers/spi/imx_spi.c
@@ -380,6 +380,77 @@ static void imx_spi_do_transfer(struct spi_device *spi)
}
}
+static int cspi_2_3_xchg_burst(struct spi_device *spi)
+{
+ struct imx_spi *imx = container_of(spi->master, struct imx_spi, master);
+ int now, txlen, rxlen;
+ u32 ctrl;
+ void __iomem *base = imx->regs;
+
+ now = min(imx->xfer_len, 512);
+ now >>= 2;
+
+ if (!now)
+ return 0;
+
+ txlen = rxlen = now;
+
+ ctrl = readl(base + CSPI_2_3_CTRL);
+ ctrl &= ~(0xfff << CSPI_2_3_CTRL_BL_OFFSET);
+ ctrl |= ((txlen * 32) - 1) << CSPI_2_3_CTRL_BL_OFFSET;
+ ctrl |= 1 << 3;
+ writel(ctrl, base + CSPI_2_3_CTRL);
+
+ while (txlen || rxlen) {
+ u32 status = readl(base + CSPI_2_3_STAT);
+
+ if (txlen && !(status & CSPI_2_3_STAT_TF)) {
+ if (imx->tx_buf) {
+ u32 data = swab32(*(u32 *)imx->tx_buf);
+ writel(data, base + CSPI_2_3_TXDATA);
+ imx->tx_buf += sizeof(u32);
+ } else {
+ writel(0, base + CSPI_2_3_TXDATA);
+ }
+ txlen--;
+ }
+
+ if (rxlen && (status & CSPI_2_3_STAT_RR)) {
+ u32 data = readl(base + CSPI_2_3_RXDATA);
+
+ if (imx->rx_buf) {
+ *(u32 *)imx->rx_buf = swab32(data);
+ imx->rx_buf += sizeof(u32);
+ }
+
+ rxlen--;
+ }
+ }
+
+ imx->xfer_len -= now * 4;
+
+ return now;
+}
+
+static void cspi_2_3_do_transfer(struct spi_device *spi)
+{
+ struct imx_spi *imx = container_of(spi->master, struct imx_spi, master);
+ u32 ctrl;
+
+ if (imx->bits_per_word == 8 || imx->bits_per_word == 16 || imx->bits_per_word == 32)
+ while (cspi_2_3_xchg_burst(spi) > 0);
+
+ if (!imx->xfer_len)
+ return;
+
+ ctrl = readl(imx->regs + CSPI_2_3_CTRL);
+ ctrl &= ~(0xfff << CSPI_2_3_CTRL_BL_OFFSET);
+ ctrl |= (spi->bits_per_word - 1) << CSPI_2_3_CTRL_BL_OFFSET;
+ writel(ctrl, imx->regs + CSPI_2_3_CTRL);
+
+ imx_spi_do_transfer(spi);
+}
+
static int imx_spi_transfer(struct spi_device *spi, struct spi_message *mesg)
{
struct imx_spi *imx = container_of(spi->master, struct imx_spi, master);
@@ -437,7 +508,7 @@ static __maybe_unused struct spi_imx_devtype_data spi_imx_devtype_data_0_7 = {
static __maybe_unused struct spi_imx_devtype_data spi_imx_devtype_data_2_3 = {
.chipselect = cspi_2_3_chipselect,
- .do_transfer = imx_spi_do_transfer,
+ .do_transfer = cspi_2_3_do_transfer,
.xchg_single = cspi_2_3_xchg_single,
};
diff --git a/include/spi/imx-spi.h b/include/spi/imx-spi.h
index 5c89634..221c665 100644
--- a/include/spi/imx-spi.h
+++ b/include/spi/imx-spi.h
@@ -79,6 +79,7 @@
#define CSPI_2_3_INT_RREN (1 << 3)
#define CSPI_2_3_STAT 0x18
-#define CSPI_2_3_STAT_RR (1 << 3)
+#define CSPI_2_3_STAT_TF (1 << 2)
+#define CSPI_2_3_STAT_RR (1 << 3)
#endif /* __SPI_IMX_SPI_H */
--
2.5.0
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