[PATCH v2 0/3] MIPS: ath79: skip pbl lowlevel init if running from RAM

[PATCH v2 0/3] MIPS: ath79: skip pbl lowlevel init if running from RAM

[Antony Pavlov]

Changes since v1:

  * fix commit messages (thanks to Dmitry Smagin);
  * assume that tplink-mr3020's ROM start address is 0xbf000000;
  * add 'Tested-by: Yegor Yefremov <yegorslists@googlemail.com>'.

Antony Pavlov (2):
  MIPS: black-swift: skip pbl lowlevel init if running from RAM
  MIPS: tplink-mr3020: skip pbl lowlevel init if running from RAM

Oleksij Rempel (1):
  MIPS: pbl: add pbl_blt macro

 arch/mips/boards/black-swift/include/board/board_pbl_start.h |  3 +++
 .../boards/tplink-mr3020/include/board/board_pbl_start.h     |  3 +++
 arch/mips/include/asm/pbl_macros.h                           | 12 ++++++++++++
 3 files changed, 18 insertions(+)

-- 
2.6.2


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[PATCH v2 1/3] MIPS: pbl: add pbl_blt macro

[Antony Pavlov]

From: Oleksij Rempel <linux@rempel-privat.de>

Barebox' PBL is able to initialize SoC's memory controller,
but it can be used only if PBL runs from ROM or on-chip SRAM.
MIPS architecture standard boot vector is 0xbfc00000
so on most MIPS SoCs all addresses higher than 0xbfc00000
belong to boot ROM or on-chip SRAM. Thus there's a
simple criterion to check if PBL runs from ROM: just
check if current PC is higher than 0xbfc00000.
Some MIPS boards have ROM start address lower than 0xbfc00000
so it's reasonable to make ROM start address checking board-dependant.

The pbl_blt macro checks if current pc is lower than
the first argument (ROM start address). If so then
next instruction executed is defined by the second argument
of the macro.

Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Tested-by: Yegor Yefremov <yegorslists@googlemail.com>
---
 arch/mips/include/asm/pbl_macros.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h
index c4ae6a2..dbe3410 100644
--- a/arch/mips/include/asm/pbl_macros.h
+++ b/arch/mips/include/asm/pbl_macros.h
@@ -60,6 +60,18 @@
 	.set	pop
 	.endm
 
+	.macro	pbl_blt addr label tmp
+	.set	push
+	.set	noreorder
+	move	\tmp, ra			# preserve ra beforehand
+	bal	253f
+	 nop
+253:
+	bltu	ra, \addr, \label
+	 move	ra, \tmp			# restore ra
+	.set	pop
+	.endm
+
 	.macro	pbl_sleep reg count
 	.set push
 	.set noreorder
-- 
2.6.2


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[PATCH v2 2/3] MIPS: black-swift: skip pbl lowlevel init if running from RAM

[Antony Pavlov]

Black Swift has 16 MiB flash boot ROM. The standard board's
bootloader (U-Boot_mod) remaps boot ROM to 0xbf000000.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Tested-by: Yegor Yefremov <yegorslists@googlemail.com>
---
 arch/mips/boards/black-swift/include/board/board_pbl_start.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/mips/boards/black-swift/include/board/board_pbl_start.h b/arch/mips/boards/black-swift/include/board/board_pbl_start.h
index f78e0d9..7394092 100644
--- a/arch/mips/boards/black-swift/include/board/board_pbl_start.h
+++ b/arch/mips/boards/black-swift/include/board/board_pbl_start.h
@@ -28,9 +28,12 @@
 
 	mips_disable_interrupts
 
+	pbl_blt 0xbf000000 skip_pll_ram_config t8
+
 	pbl_ar9331_pll
 	pbl_ar9331_ddr2_config
 
+skip_pll_ram_config:
 	pbl_ar9331_uart_enable
 	debug_ll_ar9331_init
 	mips_nmon
-- 
2.6.2


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[PATCH v2 3/3] MIPS: tplink-mr3020: skip pbl lowlevel init if running from RAM

[Antony Pavlov]

TP-Link MR3020 has 4 MiB flash boot ROM.
Usually boot ROM is mapped to 0xbfc00000.
However, as AR9331 allows to remap boot ROM to 0xbf000000
it's better to assume that boot ROM starts at 0xbf000000.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
 arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h b/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h
index 08204fe..d25f5aa 100644
--- a/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h
+++ b/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h
@@ -28,9 +28,12 @@
 
 	mips_disable_interrupts
 
+	pbl_blt 0xbf000000 skip_pll_ram_config t8
+
 	pbl_ar9331_pll
 	pbl_ar9331_ddr1_config
 
+skip_pll_ram_config:
 	pbl_ar9331_uart_enable
 	debug_ll_ar9331_init
 	mips_nmon
-- 
2.6.2


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Re: [PATCH v2 0/3] MIPS: ath79: skip pbl lowlevel init if running from RAM

[Sascha Hauer]

On Wed, Nov 11, 2015 at 11:35:39AM +0300, Antony Pavlov wrote:
> Changes since v1:
> 
>   * fix commit messages (thanks to Dmitry Smagin);
>   * assume that tplink-mr3020's ROM start address is 0xbf000000;
>   * add 'Tested-by: Yegor Yefremov <yegorslists@googlemail.com>'.
> 
> Antony Pavlov (2):
>   MIPS: black-swift: skip pbl lowlevel init if running from RAM
>   MIPS: tplink-mr3020: skip pbl lowlevel init if running from RAM
> 
> Oleksij Rempel (1):
>   MIPS: pbl: add pbl_blt macro
> 
>  arch/mips/boards/black-swift/include/board/board_pbl_start.h |  3 +++
>  .../boards/tplink-mr3020/include/board/board_pbl_start.h     |  3 +++
>  arch/mips/include/asm/pbl_macros.h                           | 12 ++++++++++++
>  3 files changed, 18 insertions(+)

Applied, thanks

Sascha

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