From: Sascha Hauer <s.hauer@pengutronix.de>
To: Raphael Poggi <poggi.raph@gmail.com>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH 04/12] arm: cpu: add arm64 specific code
Date: Fri, 3 Jun 2016 10:07:11 +0200 [thread overview]
Message-ID: <20160603080711.GV31666@pengutronix.de> (raw)
In-Reply-To: <1464854818-28653-5-git-send-email-poggi.raph@gmail.com>
On Thu, Jun 02, 2016 at 10:06:50AM +0200, Raphael Poggi wrote:
> This patch adds arm64 specific codes, which are:
> - exception support
> - cache support
> - rework Makefile to support arm64
>
> Signed-off-by: Raphael Poggi <poggi.raph@gmail.com>
> ---
> arch/arm/cpu/Makefile | 17 ++++-
> arch/arm/cpu/cache-armv8.S | 168 +++++++++++++++++++++++++++++++++++++++++++
> arch/arm/cpu/cache.c | 19 +++++
> arch/arm/cpu/exceptions_64.S | 127 ++++++++++++++++++++++++++++++++
> arch/arm/cpu/interrupts.c | 47 ++++++++++++
> arch/arm/cpu/lowlevel.S | 38 ++++++++++
> arch/arm/include/asm/cache.h | 9 +++
> 7 files changed, 423 insertions(+), 2 deletions(-)
> create mode 100644 arch/arm/cpu/cache-armv8.S
> create mode 100644 arch/arm/cpu/exceptions_64.S
>
> --- a/arch/arm/cpu/lowlevel.S
> +++ b/arch/arm/cpu/lowlevel.S
> @@ -3,6 +3,7 @@
> #include <asm/system.h>
>
> .section ".text_bare_init_","ax"
> +#if __LINUX_ARM_ARCH__ <= 7
> ENTRY(arm_cpu_lowlevel_init)
> /* set the cpu to SVC32 mode, mask irq and fiq */
> mrs r12, cpsr
> @@ -56,3 +57,40 @@ ENTRY(arm_cpu_lowlevel_init)
>
> mov pc, lr
> ENDPROC(arm_cpu_lowlevel_init)
> +#else
> +ENTRY(arm_cpu_lowlevel_init)
> + adr x0, vectors
> + mrs x1, CurrentEL
> + cmp x1, #0xC /* Check EL3 state */
> + b.eq 1f
> + cmp x1, #0x8 /* Check EL2 state */
> + b.eq 2f
> + cmp x1, #0x4 /* Check EL1 state */
> + b.eq 3f
> +
> +1:
> + msr vbar_el3, x0
> + mov x0, #1 /* Non-Secure EL0/1 */
> + orr x0, x0, #(1 << 10) /* 64-bit EL2 */
> + msr scr_el3, x0
> + msr cptr_el3, xzr
> + b done
> +
> +2:
> + msr vbar_el2, x0
> + mov x0, #0x33ff /* Enable FP/SIMD */
> + msr cptr_el2, x0
> + b done
> +
> +
> +3:
> + msr vbar_el1, x0
> + mov x0, #(3 << 20) /* Enable FP/SIMD */
> + msr cpacr_el1, x0
> + b done
> +
> +done:
> + ret
> +
> +ENDPROC(arm_cpu_lowlevel_init)
> +#endif
Better create a lowlevel64.S? The code is completely different anyway.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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next prev parent reply other threads:[~2016-06-03 8:07 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-02 8:06 [PATCH 0/12] Add basic support for arm64 Raphael Poggi
2016-06-02 8:06 ` [PATCH 01/12] arm: add armv8 Kconfig entries Raphael Poggi
2016-06-02 8:06 ` [PATCH 02/12] arm: Makefile: rework makefile to handle armv8 Raphael Poggi
2016-06-03 7:27 ` Sascha Hauer
2016-06-03 7:33 ` Raphaël Poggi
2016-06-02 8:06 ` [PATCH 03/12] arm: introduce lib64 for arm64 related stuff Raphael Poggi
2016-06-03 8:01 ` Sascha Hauer
2016-06-02 8:06 ` [PATCH 04/12] arm: cpu: add arm64 specific code Raphael Poggi
2016-06-03 8:07 ` Sascha Hauer [this message]
2016-06-02 8:06 ` [PATCH 05/12] arm: include: system: add arm64 helper functions Raphael Poggi
2016-06-02 8:06 ` [PATCH 06/12] arm: cpu: start: arm64 does not support relocation Raphael Poggi
2016-06-02 8:06 ` [PATCH 07/12] arm: include: bitops: arm64 use generic __fls Raphael Poggi
2016-06-02 8:06 ` [PATCH 08/12] arm: include: system_info: add armv8 identification Raphael Poggi
2016-06-02 8:06 ` [PATCH 09/12] arm: cpu: cpuinfo: add armv8 support Raphael Poggi
2016-06-02 8:06 ` [PATCH 10/12] arm: cpu: disable code portion in armv8 case Raphael Poggi
2016-06-02 8:06 ` [PATCH 11/12] arm: cpu: add basic arm64 mmu support Raphael Poggi
2016-06-03 8:30 ` Sascha Hauer
2016-06-02 8:06 ` [PATCH 12/12] arm: boards: add virt board Raphael Poggi
2016-06-03 8:50 ` Sascha Hauer
2016-06-07 7:13 ` Raphaël Poggi
2016-06-07 11:00 ` Antony Pavlov
2016-06-07 11:53 ` Raphaël Poggi
2016-06-07 12:59 ` Antony Pavlov
2016-06-07 13:16 ` Raphaël Poggi
2016-06-03 9:16 ` [PATCH 0/12] Add basic support for arm64 Sascha Hauer
2016-06-03 9:25 ` Raphaël Poggi
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