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From: Sascha Hauer <s.hauer@pengutronix.de>
To: Alexander Kurz <akurz@blala.de>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH] ARM: i.MX7: add AIPS base address defines
Date: Thu, 26 Jan 2017 08:16:40 +0100	[thread overview]
Message-ID: <20170126071640.owiwqt5eyr3wtzr7@pengutronix.de> (raw)
In-Reply-To: <1485343915-24850-1-git-send-email-akurz@blala.de>

On Wed, Jan 25, 2017 at 12:31:55PM +0100, Alexander Kurz wrote:
> Import the ARM IP bus base addresses from IMX7DRM 05/2016 AIPS Memory Map

In my reference manual the addresses are given directly as numbers. I
often wondered for the other i.MX SoCs what the advantage of such such
multi-stage defines is:

#define MX7_AIPS1_ARB_BASE_ADDR     0x30000000
#define MX7_ATZ1_BASE_ADDR          MX7_AIPS1_ARB_BASE_ADDR
#define MX7_AIPS1_OFF_BASE_ADDR     (MX7_ATZ1_BASE_ADDR + 0x200000)
#define MX7_GPIO1_BASE_ADDR         (MX7_AIPS1_OFF_BASE_ADDR)

I often enough ended up calculating the values by hand to get the
address to type into barebox md/mw commands or to see which address
is meant to look it up in the reference manual (for some defines which
do not have a clear name)

Are there any real advantages of these multi stage defines? Otherwise
I would suggest to use the absolute addresses directly.

Thanks for completing the list anyway, having to add them one by one
as needed can be annoying also.

Sascha

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  reply	other threads:[~2017-01-26  7:17 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-25 11:31 Alexander Kurz
2017-01-26  7:16 ` Sascha Hauer [this message]
2017-01-27 11:32   ` Alexander Kurz

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