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From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH 3/9] clk: i.MX: clk-gate2: Allow to pass flags
Date: Mon,  6 Feb 2017 07:50:51 +0100	[thread overview]
Message-ID: <20170206065057.19483-4-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20170206065057.19483-1-s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 drivers/clk/imx/clk-gate2.c | 11 ++++++-----
 drivers/clk/imx/clk.h       |  8 ++++----
 2 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c
index f952f3e3f..e7dcd87a7 100644
--- a/drivers/clk/imx/clk-gate2.c
+++ b/drivers/clk/imx/clk-gate2.c
@@ -88,7 +88,8 @@ static struct clk_ops clk_gate2_ops = {
 };
 
 struct clk *clk_gate2_alloc(const char *name, const char *parent,
-			    void __iomem *reg, u8 shift, u8 cgr_val)
+			    void __iomem *reg, u8 shift, u8 cgr_val,
+			    unsigned long flags)
 {
 	struct clk_gate2 *g = xzalloc(sizeof(*g));
 
@@ -100,7 +101,7 @@ struct clk *clk_gate2_alloc(const char *name, const char *parent,
 	g->clk.name = name;
 	g->clk.parent_names = &g->parent;
 	g->clk.num_parents = 1;
-	g->clk.flags = CLK_SET_RATE_PARENT;
+	g->clk.flags = CLK_SET_RATE_PARENT | flags;
 
 	return &g->clk;
 }
@@ -113,12 +114,12 @@ void clk_gate2_free(struct clk *clk)
 }
 
 struct clk *clk_gate2(const char *name, const char *parent, void __iomem *reg,
-		      u8 shift, u8 cgr_val)
+		      u8 shift, u8 cgr_val, unsigned long flags)
 {
 	struct clk *g;
 	int ret;
 
-	g = clk_gate2_alloc(name , parent, reg, shift, cgr_val);
+	g = clk_gate2_alloc(name , parent, reg, shift, cgr_val, flags);
 
 	ret = clk_register(g);
 	if (ret) {
@@ -135,7 +136,7 @@ struct clk *clk_gate2_inverted(const char *name, const char *parent,
 	struct clk *clk;
 	struct clk_gate2 *g;
 
-	clk = clk_gate2(name, parent, reg, shift, 0x3);
+	clk = clk_gate2(name, parent, reg, shift, 0x3, 0);
 	if (IS_ERR(clk))
 		return clk;
 
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 1610c48ec..4f80a3262 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -2,7 +2,7 @@
 #define __IMX_CLK_H
 
 struct clk *clk_gate2(const char *name, const char *parent, void __iomem *reg,
-		      u8 shift, u8 cgr_val);
+		      u8 shift, u8 cgr_val, unsigned long flags);
 
 static inline struct clk *imx_clk_divider(const char *name, const char *parent,
 		void __iomem *reg, u8 shift, u8 width)
@@ -77,13 +77,13 @@ static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent,
 static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
 		void __iomem *reg, u8 shift)
 {
-	return clk_gate2(name, parent, reg, shift, 0x3);
+	return clk_gate2(name, parent, reg, shift, 0x3, 0);
 }
 
 static inline struct clk *imx_clk_gate2_cgr(const char *name, const char *parent,
 					    void __iomem *reg, u8 shift, u8 cgr_val)
 {
-	return clk_gate2(name, parent, reg, shift, cgr_val);
+	return clk_gate2(name, parent, reg, shift, cgr_val, 0);
 }
 
 static inline struct clk *imx_clk_gate3(const char *name, const char *parent,
@@ -95,7 +95,7 @@ static inline struct clk *imx_clk_gate3(const char *name, const char *parent,
 static inline struct clk *imx_clk_gate4(const char *name, const char *parent,
 		void __iomem *reg, u8 shift)
 {
-	return clk_gate2(name, parent, reg, shift, 0x3);
+	return clk_gate2(name, parent, reg, shift, 0x3, 0);
 }
 
 struct clk *imx_clk_pllv1(const char *name, const char *parent,
-- 
2.11.0


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  parent reply	other threads:[~2017-02-06  6:53 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-06  6:50 i.MX7 Ethernet clock fixes Sascha Hauer
2017-02-06  6:50 ` [PATCH 1/9] clk: Keep enable count consistent over reparent Sascha Hauer
2017-02-06  6:50 ` [PATCH 2/9] clk: implement CLK_OPS_PARENT_ENABLE Sascha Hauer
2017-02-06  6:50 ` Sascha Hauer [this message]
2017-02-06  6:50 ` [PATCH 4/9] clk: i.MX: Pass CLK_OPS_PARENT_ENABLE where necessary Sascha Hauer
2017-02-06  6:50 ` [PATCH 5/9] clk: i.MX7: do clock reparenting when all clocks are initialized Sascha Hauer
2017-02-06  6:50 ` [PATCH 6/9] clk: Add support for shared gates Sascha Hauer
2017-02-06  6:50 ` [PATCH 7/9] clk: i.MX7: Fix ethernet clocks Sascha Hauer
2017-02-06  6:50 ` [PATCH 8/9] clk: i.MX7: do not register PLL bypass clocks as separate clocks Sascha Hauer
2017-02-06  6:50 ` [PATCH 9/9] clk: i.MX7: setup ethernet clocks Sascha Hauer

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