* [PATCH 1/4] mvebu: get initial position of register window from image header
2017-02-25 20:52 [PATCH 0/4] mvebu: Make 2nd-stage booting possible Uwe Kleine-König
@ 2017-02-25 20:52 ` Uwe Kleine-König
2017-02-25 20:52 ` [PATCH 2/4] filetype: Add image type for boot images used on Armada 370 and XP Uwe Kleine-König
` (3 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Uwe Kleine-König @ 2017-02-25 20:52 UTC (permalink / raw)
To: barebox
A problem when using 2nd stage booting on mvebu is that the first bootloader
already switched the register window location from 0xd0000000 to
0xf1000000 by writing to 0xd0000080. When the second bootloader also
tries to do this switch it writes to the wrong location resulting in an
exception and so a boot failure.
For this reason the base address of the register window is passed in the
barebox header and picked up from there by early code. In a further
patch bootm is taught to put the actual position of the window there for
the second bootloader to finally make second stage booting work.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-mvebu/common.c | 6 +--
.../arm/mach-mvebu/include/mach/barebox-arm-head.h | 54 ++++++++++++++++++++++
arch/arm/mach-mvebu/include/mach/common.h | 17 +++++++
4 files changed, 75 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/mach-mvebu/include/mach/barebox-arm-head.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3e8ccf7661c4..c61d1dc6a82e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -123,6 +123,7 @@ config ARCH_MVEBU
select GPIOLIB
select HAS_DEBUG_LL
select HAVE_DEFAULT_ENVIRONMENT_NEW
+ select HAVE_MACH_ARM_HEAD
select HAVE_PBL_MULTI_IMAGES
select HW_HAS_PCI
select MVEBU_MBUS
diff --git a/arch/arm/mach-mvebu/common.c b/arch/arm/mach-mvebu/common.c
index 7534d8dd019e..06bfb7261544 100644
--- a/arch/arm/mach-mvebu/common.c
+++ b/arch/arm/mach-mvebu/common.c
@@ -180,14 +180,14 @@ mem_initcall(mvebu_meminit);
* safely later on, as the remap register itself is within the
* internal registers.
*/
-#define MVEBU_BOOTUP_INT_REG_BASE 0xd0000000
#define MVEBU_BRIDGE_REG_BASE 0x20000
#define DEVICE_INTERNAL_BASE_ADDR (MVEBU_BRIDGE_REG_BASE + 0x80)
static void mvebu_remap_registers(void)
{
- writel(MVEBU_REMAP_INT_REG_BASE,
- IOMEM(MVEBU_BOOTUP_INT_REG_BASE) + DEVICE_INTERNAL_BASE_ADDR);
+ void __iomem *base = mvebu_get_initial_int_reg_base();
+
+ writel(MVEBU_REMAP_INT_REG_BASE, base + DEVICE_INTERNAL_BASE_ADDR);
}
void __naked __noreturn dove_barebox_entry(void *boarddata)
diff --git a/arch/arm/mach-mvebu/include/mach/barebox-arm-head.h b/arch/arm/mach-mvebu/include/mach/barebox-arm-head.h
new file mode 100644
index 000000000000..3035f40ddf3b
--- /dev/null
+++ b/arch/arm/mach-mvebu/include/mach/barebox-arm-head.h
@@ -0,0 +1,54 @@
+#include <linux/stringify.h>
+#include <mach/common.h>
+
+static inline void __barebox_arm_head(void)
+{
+ __asm__ __volatile__ (
+#ifdef CONFIG_THUMB2_BAREBOX
+ ".arm\n"
+ "adr r9, 1f + 1\n"
+ "bx r9\n"
+ ".thumb\n"
+ "1:\n"
+ "bl 2f\n"
+ ".rept 10\n"
+ "1: b 1b\n"
+ ".endr\n"
+#else
+ "b 2f\n"
+ "1: b 1b\n"
+ "1: b 1b\n"
+ "1: b 1b\n"
+ "1: b 1b\n"
+ "1: b 1b\n"
+ "1: b 1b\n"
+ "1: b 1b\n"
+#endif
+ ".asciz \"barebox\"\n"
+ ".word _text\n" /* text base. If copied there,
+ * barebox can skip relocation
+ */
+ ".word _barebox_image_size\n" /* image size to copy */
+
+ /*
+ * The following entry (at offset 0x30) is the only intended
+ * difference to the original arm __barebox_arm_head. This value
+ * holds the address of the internal register window when the
+ * image is started. If the window is not at the reset default
+ * position any more the caller can pass the actual value here.
+ */
+ ".word " __stringify(MVEBU_BOOTUP_INT_REG_BASE) "\n"
+ ".rept 7\n"
+ ".word 0x55555555\n"
+ ".endr\n"
+ "2:\n"
+ );
+}
+
+static inline void barebox_arm_head(void)
+{
+ __barebox_arm_head();
+ __asm__ __volatile__ (
+ "b barebox_arm_reset_vector\n"
+ );
+}
diff --git a/arch/arm/mach-mvebu/include/mach/common.h b/arch/arm/mach-mvebu/include/mach/common.h
index 3cc1bf71c0f7..529eb61cfd9a 100644
--- a/arch/arm/mach-mvebu/include/mach/common.h
+++ b/arch/arm/mach-mvebu/include/mach/common.h
@@ -18,6 +18,23 @@
#ifndef __MACH_COMMON_H__
#define __MACH_COMMON_H__
+#include <asm/sections.h>
+#include <asm/unaligned.h>
+
+#define MVEBU_BOOTUP_INT_REG_BASE 0xd0000000
#define MVEBU_REMAP_INT_REG_BASE 0xf1000000
+/* #including <asm/barebox-arm.h> yields a circle, so we need a forward decl */
+uint32_t get_runtime_offset(void);
+
+static inline void __iomem *mvebu_get_initial_int_reg_base(void)
+{
+#ifdef __PBL__
+ u32 base = __get_unaligned_le32(_text - get_runtime_offset() + 0x30);
+ return (void __force __iomem *)base;
+#else
+ return (void __force __iomem *)MVEBU_REMAP_INT_REG_BASE;
+#endif
+}
+
#endif
--
2.11.0
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^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 2/4] filetype: Add image type for boot images used on Armada 370 and XP
2017-02-25 20:52 [PATCH 0/4] mvebu: Make 2nd-stage booting possible Uwe Kleine-König
2017-02-25 20:52 ` [PATCH 1/4] mvebu: get initial position of register window from image header Uwe Kleine-König
@ 2017-02-25 20:52 ` Uwe Kleine-König
2017-02-25 20:52 ` [PATCH 3/4] kwbimage_v1: add support to boot a mvebu image Uwe Kleine-König
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Uwe Kleine-König @ 2017-02-25 20:52 UTC (permalink / raw)
To: barebox
---
common/filetype.c | 8 ++++++++
include/filetype.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/common/filetype.c b/common/filetype.c
index 8d7293347a15..323da026afdc 100644
--- a/common/filetype.c
+++ b/common/filetype.c
@@ -63,6 +63,7 @@ static const struct filetype_str filetype_str[] = {
[filetype_exe] = { "MS-DOS executable", "exe" },
[filetype_mxs_bootstream] = { "Freescale MXS bootstream", "mxsbs" },
[filetype_socfpga_xload] = { "SoCFPGA prebootloader image", "socfpga-xload" },
+ [filetype_kwbimage_v1] = { "MVEBU kwbimage (v1)", "kwb" },
};
const char *file_type_to_string(enum filetype f)
@@ -292,6 +293,13 @@ enum filetype file_detect_type(const void *_buf, size_t bufsize)
return filetype_mips_barebox;
if (buf[0] == be32_to_cpu(0x534F4659))
return filetype_bpk;
+ if ((buf8[0] == 0x5a || buf8[0] == 0x69 || buf8[0] == 0x78 ||
+ buf8[0] == 0x8b || buf8[0] == 0x9c) &&
+ buf8[0x1] == 0 && buf8[0x2] == 0 && buf8[0x3] == 0 &&
+ buf8[0x8] == 1 && buf8[0x18] == 0 && buf8[0x1b] == 0 &&
+ buf8[0x1c] == 0 && buf8[0x1d] == 0 &&
+ (buf8[0x1e] == 0 || buf8[0x1e] == 1))
+ return filetype_kwbimage_v1;
if (bufsize < 64)
return filetype_unknown;
diff --git a/include/filetype.h b/include/filetype.h
index 65bd6efb7bf9..709c1869f705 100644
--- a/include/filetype.h
+++ b/include/filetype.h
@@ -38,6 +38,7 @@ enum filetype {
filetype_xz_compressed,
filetype_mxs_bootstream,
filetype_socfpga_xload,
+ filetype_kwbimage_v1,
filetype_max,
};
--
2.11.0
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^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 3/4] kwbimage_v1: add support to boot a mvebu image
2017-02-25 20:52 [PATCH 0/4] mvebu: Make 2nd-stage booting possible Uwe Kleine-König
2017-02-25 20:52 ` [PATCH 1/4] mvebu: get initial position of register window from image header Uwe Kleine-König
2017-02-25 20:52 ` [PATCH 2/4] filetype: Add image type for boot images used on Armada 370 and XP Uwe Kleine-König
@ 2017-02-25 20:52 ` Uwe Kleine-König
2017-02-25 20:52 ` [PATCH 4/4] mvebu: netgear-rn2120: make use of mvebu_get_initial_int_reg_base Uwe Kleine-König
2017-02-28 6:59 ` [PATCH 0/4] mvebu: Make 2nd-stage booting possible Sascha Hauer
4 siblings, 0 replies; 7+ messages in thread
From: Uwe Kleine-König @ 2017-02-25 20:52 UTC (permalink / raw)
To: barebox
This just starts the main image of the mvebu image assuming that the
header images just setup the RAM. The position of the internal register
window is provided in the header as introduced in the previous commit.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
arch/arm/mach-mvebu/Makefile | 1 +
arch/arm/mach-mvebu/kwbootimage.c | 84 +++++++++++++++++++++++++++++++++++++++
2 files changed, 85 insertions(+)
create mode 100644 arch/arm/mach-mvebu/kwbootimage.c
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index 2cf0dfed4725..fb5c4e6bcd66 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -3,3 +3,4 @@ obj-$(CONFIG_ARCH_ARMADA_370) += armada-370-xp.o
obj-$(CONFIG_ARCH_ARMADA_XP) += armada-370-xp.o
obj-$(CONFIG_ARCH_DOVE) += dove.o
obj-$(CONFIG_ARCH_KIRKWOOD) += kirkwood.o
+obj-y += kwbootimage.o
diff --git a/arch/arm/mach-mvebu/kwbootimage.c b/arch/arm/mach-mvebu/kwbootimage.c
new file mode 100644
index 000000000000..8d364ceb7b31
--- /dev/null
+++ b/arch/arm/mach-mvebu/kwbootimage.c
@@ -0,0 +1,84 @@
+#include <bootm.h>
+#include <common.h>
+#include <fcntl.h>
+#include <filetype.h>
+#include <fs.h>
+#include <init.h>
+#include <libfile.h>
+#include <restart.h>
+#include <unistd.h>
+#include <asm/unaligned.h>
+#include <mach/common.h>
+
+static int do_bootm_kwbimage_v1(struct image_data *data)
+{
+ int fd, ret;
+ loff_t offset;
+ char header[0x20];
+ u32 image_size, image_source;
+ void (*barebox)(void);
+
+ fd = open(data->os_file, O_RDONLY);
+ if (fd < 0)
+ return fd;
+
+ ret = read_full(fd, header, 0x20);
+ if (ret < 0x20) {
+ pr_err("Failed to read header\n");
+ if (ret >= 0)
+ return -EINVAL;
+ return -errno;
+ }
+
+ image_size = header[4] | header[5] << 8 | header[6] << 16 | header[7] << 24;
+ image_source = header[0xc] | header[0xd] << 8 |
+ header[0xe] << 16 | header[0xf] << 24;
+
+ if (data->verbose)
+ pr_info("size: %u\noffset: %u\n", image_size, image_source);
+
+ offset = lseek(fd, image_source, SEEK_SET);
+ if (offset < 0) {
+ pr_err("Failed to seek to image (%lld, %d)\n", offset, errno);
+ return -errno;
+ }
+
+ barebox = xzalloc(image_size);
+
+ ret = read_full(fd, barebox, image_size);
+ if (ret < image_size) {
+ pr_err("Failed to read image\n");
+ if (ret >= 0)
+ ret = -EINVAL;
+ else
+ ret = -errno;
+ goto out_free;
+ }
+
+ if (is_barebox_arm_head((void *)barebox))
+ put_unaligned_le32(MVEBU_REMAP_INT_REG_BASE, barebox + 0x30);
+
+ shutdown_barebox();
+
+ barebox();
+
+ restart_machine();
+
+out_free:
+ free(barebox);
+ return ret;
+}
+
+static struct image_handler image_handler_kwbimage_v1_handler = {
+ .name = "MVEBU kwbimage v1",
+ .bootm = do_bootm_kwbimage_v1,
+ .filetype = filetype_kwbimage_v1,
+};
+
+static int mvebu_register_kwbimage_image_handler(void)
+{
+ register_image_handler(&image_handler_kwbimage_v1_handler);
+
+ return 0;
+}
+late_initcall(mvebu_register_kwbimage_image_handler);
--
2.11.0
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^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 4/4] mvebu: netgear-rn2120: make use of mvebu_get_initial_int_reg_base
2017-02-25 20:52 [PATCH 0/4] mvebu: Make 2nd-stage booting possible Uwe Kleine-König
` (2 preceding siblings ...)
2017-02-25 20:52 ` [PATCH 3/4] kwbimage_v1: add support to boot a mvebu image Uwe Kleine-König
@ 2017-02-25 20:52 ` Uwe Kleine-König
2017-02-28 6:59 ` [PATCH 0/4] mvebu: Make 2nd-stage booting possible Sascha Hauer
4 siblings, 0 replies; 7+ messages in thread
From: Uwe Kleine-König @ 2017-02-25 20:52 UTC (permalink / raw)
To: barebox
This is necessary to make second stage booting work when the register
window is already moved.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
arch/arm/boards/netgear-rn2120/lowlevel.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boards/netgear-rn2120/lowlevel.c b/arch/arm/boards/netgear-rn2120/lowlevel.c
index 5cde2b657bd5..59b9985ca9d8 100644
--- a/arch/arm/boards/netgear-rn2120/lowlevel.c
+++ b/arch/arm/boards/netgear-rn2120/lowlevel.c
@@ -16,12 +16,14 @@
#include <asm/barebox-arm-head.h>
#include <asm/io.h>
#include <mach/lowlevel.h>
+#include <mach/common.h>
extern char __dtb_armada_xp_rn2120_bb_start[];
ENTRY_FUNCTION(start_netgear_rn2120, r0, r1, r2)
{
void *fdt;
+ void __iomem *base = mvebu_get_initial_int_reg_base();
arm_cpu_lowlevel_init();
@@ -31,8 +33,8 @@ ENTRY_FUNCTION(start_netgear_rn2120, r0, r1, r2)
* SoC reset.
* This is effectively gpio_direction_output(42, 1);
*/
- writel((1 << 10) | readl((void *)0xd0018140), (void *)0xd0018140);
- writel(~(1 << 10) & readl((void *)0xd0018144), (void *)0xd0018144);
+ writel((1 << 10) | readl(base + 0x18140), base + 0x18140);
+ writel(~(1 << 10) & readl(base + 0x18144), base + 0x18144);
/*
* The vendor binary that initializes RAM doesn't program the SDRAM
@@ -41,13 +43,13 @@ ENTRY_FUNCTION(start_netgear_rn2120, r0, r1, r2)
*/
/* Win 1 Base Address Register: base=0x40000000 */
- writel(0x40000000, (void *)0xd0020188);
+ writel(0x40000000, base + 0x20188);
/* Win 1 Control Register: size=0x4000000, wincs=1, en=1*/
- writel(0x3fffffe5, (void *)0xd002018c);
+ writel(0x3fffffe5, base + 0x2018c);
/* Win 0 Base Address Register is already 0, base=0x00000000 */
/* Win 0 Control Register: size=0x4000000, wincs=0, en=1 */
- writel(0x3fffffe1, (void *)0xd0020184);
+ writel(0x3fffffe1, base + 0x20184);
fdt = __dtb_armada_xp_rn2120_bb_start -
get_runtime_offset();
--
2.11.0
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^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 0/4] mvebu: Make 2nd-stage booting possible
2017-02-25 20:52 [PATCH 0/4] mvebu: Make 2nd-stage booting possible Uwe Kleine-König
` (3 preceding siblings ...)
2017-02-25 20:52 ` [PATCH 4/4] mvebu: netgear-rn2120: make use of mvebu_get_initial_int_reg_base Uwe Kleine-König
@ 2017-02-28 6:59 ` Sascha Hauer
2017-02-28 16:06 ` Uwe Kleine-König
4 siblings, 1 reply; 7+ messages in thread
From: Sascha Hauer @ 2017-02-28 6:59 UTC (permalink / raw)
To: Uwe Kleine-König; +Cc: barebox
On Sat, Feb 25, 2017 at 09:52:38PM +0100, Uwe Kleine-König wrote:
> Hello,
>
> one specialty of mvebu is that it has a movable register window. Its
> base address is configured within this register range, so there is no
> way to find out the current position. The BootROM leaves this window at
> 0xd0000000, however it is beneficial to move it further to the end of
> the address range (usually 0xf1000000) to benefit from more continuous
> RAM. For this reason one of the first things that barebox does it to
> move the window accordingly. If however barebox is loaded as a second
> stage image this results in a crash as the register base address
> register is already moved.
>
> This series implements that the called image gets the base address from
> the barebox header. It defaults to 0xd0000000 which is right for the
> (unaware) BootROM and when barebox jumps into such an image the register
> position is passed accordingly.
This makes the 2nd stage images unnecessary, right? Can you remove them
from images/Makefile.mvebu?
Sascha
--
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^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 0/4] mvebu: Make 2nd-stage booting possible
2017-02-28 6:59 ` [PATCH 0/4] mvebu: Make 2nd-stage booting possible Sascha Hauer
@ 2017-02-28 16:06 ` Uwe Kleine-König
0 siblings, 0 replies; 7+ messages in thread
From: Uwe Kleine-König @ 2017-02-28 16:06 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox
On Tue, Feb 28, 2017 at 07:59:47AM +0100, Sascha Hauer wrote:
> On Sat, Feb 25, 2017 at 09:52:38PM +0100, Uwe Kleine-König wrote:
> > Hello,
> >
> > one specialty of mvebu is that it has a movable register window. Its
> > base address is configured within this register range, so there is no
> > way to find out the current position. The BootROM leaves this window at
> > 0xd0000000, however it is beneficial to move it further to the end of
> > the address range (usually 0xf1000000) to benefit from more continuous
> > RAM. For this reason one of the first things that barebox does it to
> > move the window accordingly. If however barebox is loaded as a second
> > stage image this results in a crash as the register base address
> > register is already moved.
> >
> > This series implements that the called image gets the base address from
> > the barebox header. It defaults to 0xd0000000 which is right for the
> > (unaware) BootROM and when barebox jumps into such an image the register
> > position is passed accordingly.
>
> This makes the 2nd stage images unnecessary, right? Can you remove them
> from images/Makefile.mvebu?
I thought about that already, too, but they are still necessary when you
convert from U-Boot to barebox or upgrade from an older barebox. So I
think keeping them for now makes sense.
Best regards
Uwe
--
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^ permalink raw reply [flat|nested] 7+ messages in thread