* [PATCH] ARM: phytec-som-imx6: the ethernet clocks get enabled by fec_imx
@ 2017-04-12 9:26 Michael Grzeschik
2017-05-03 12:00 ` Sascha Hauer
0 siblings, 1 reply; 2+ messages in thread
From: Michael Grzeschik @ 2017-04-12 9:26 UTC (permalink / raw)
To: barebox
All necessary clocks get already enabled through the fec_imx driver
configured by the devicetree.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
---
arch/arm/boards/phytec-som-imx6/board.c | 27 +--------------------------
1 file changed, 1 insertion(+), 26 deletions(-)
diff --git a/arch/arm/boards/phytec-som-imx6/board.c b/arch/arm/boards/phytec-som-imx6/board.c
index ed9453bdda..4d24a55f74 100644
--- a/arch/arm/boards/phytec-som-imx6/board.c
+++ b/arch/arm/boards/phytec-som-imx6/board.c
@@ -31,7 +31,6 @@
#include <mach/bbu.h>
#include <platform_data/eth-fec.h>
#include <mfd/imx6q-iomuxc-gpr.h>
-#include <linux/clk.h>
#include <linux/micrel_phy.h>
#include <globalvar.h>
@@ -97,32 +96,14 @@ int ksz8081_phy_fixup(struct phy_device *phydev)
return 0;
}
-static int imx6ul_setup_fec(void)
+static void imx6ul_setup_fec(void)
{
void __iomem *gprbase = IOMEM(MX6_IOMUXC_BASE_ADDR) + 0x4000;
uint32_t val;
- struct clk *clk;
phy_register_fixup_for_uid(PHY_ID_KSZ8081, MICREL_PHY_ID_MASK,
ksz8081_phy_fixup);
- clk = clk_lookup("enet_ptp");
- if (IS_ERR(clk))
- goto err;
-
- clk_enable(clk);
-
- clk = clk_lookup("enet_ref");
- if (IS_ERR(clk))
- goto err;
- clk_enable(clk);
-
- clk = clk_lookup("enet_ref_125m");
- if (IS_ERR(clk))
- goto err;
-
- clk_enable(clk);
-
val = readl(gprbase + IOMUXC_GPR1);
/* Use 50M anatop loopback REF_CLK1 for ENET1, clear gpr1[13], set gpr1[17]*/
val &= ~(1 << 13);
@@ -131,12 +112,6 @@ static int imx6ul_setup_fec(void)
val &= ~(1 << 14);
val |= (1 << 18);
writel(val, gprbase + IOMUXC_GPR1);
-
- return 0;
-err:
- pr_err("Setting up DFEC\n");
-
- return -EIO;
}
static int physom_imx6_devices_init(void)
--
2.11.0
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^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] ARM: phytec-som-imx6: the ethernet clocks get enabled by fec_imx
2017-04-12 9:26 [PATCH] ARM: phytec-som-imx6: the ethernet clocks get enabled by fec_imx Michael Grzeschik
@ 2017-05-03 12:00 ` Sascha Hauer
0 siblings, 0 replies; 2+ messages in thread
From: Sascha Hauer @ 2017-05-03 12:00 UTC (permalink / raw)
To: Michael Grzeschik; +Cc: barebox
On Wed, Apr 12, 2017 at 11:26:30AM +0200, Michael Grzeschik wrote:
> All necessary clocks get already enabled through the fec_imx driver
> configured by the devicetree.
>
> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
> ---
> arch/arm/boards/phytec-som-imx6/board.c | 27 +--------------------------
> 1 file changed, 1 insertion(+), 26 deletions(-)
Applied, thanks
Sascha
>
> diff --git a/arch/arm/boards/phytec-som-imx6/board.c b/arch/arm/boards/phytec-som-imx6/board.c
> index ed9453bdda..4d24a55f74 100644
> --- a/arch/arm/boards/phytec-som-imx6/board.c
> +++ b/arch/arm/boards/phytec-som-imx6/board.c
> @@ -31,7 +31,6 @@
> #include <mach/bbu.h>
> #include <platform_data/eth-fec.h>
> #include <mfd/imx6q-iomuxc-gpr.h>
> -#include <linux/clk.h>
> #include <linux/micrel_phy.h>
>
> #include <globalvar.h>
> @@ -97,32 +96,14 @@ int ksz8081_phy_fixup(struct phy_device *phydev)
> return 0;
> }
>
> -static int imx6ul_setup_fec(void)
> +static void imx6ul_setup_fec(void)
> {
> void __iomem *gprbase = IOMEM(MX6_IOMUXC_BASE_ADDR) + 0x4000;
> uint32_t val;
> - struct clk *clk;
>
> phy_register_fixup_for_uid(PHY_ID_KSZ8081, MICREL_PHY_ID_MASK,
> ksz8081_phy_fixup);
>
> - clk = clk_lookup("enet_ptp");
> - if (IS_ERR(clk))
> - goto err;
> -
> - clk_enable(clk);
> -
> - clk = clk_lookup("enet_ref");
> - if (IS_ERR(clk))
> - goto err;
> - clk_enable(clk);
> -
> - clk = clk_lookup("enet_ref_125m");
> - if (IS_ERR(clk))
> - goto err;
> -
> - clk_enable(clk);
> -
> val = readl(gprbase + IOMUXC_GPR1);
> /* Use 50M anatop loopback REF_CLK1 for ENET1, clear gpr1[13], set gpr1[17]*/
> val &= ~(1 << 13);
> @@ -131,12 +112,6 @@ static int imx6ul_setup_fec(void)
> val &= ~(1 << 14);
> val |= (1 << 18);
> writel(val, gprbase + IOMUXC_GPR1);
> -
> - return 0;
> -err:
> - pr_err("Setting up DFEC\n");
> -
> - return -EIO;
> }
>
> static int physom_imx6_devices_init(void)
> --
> 2.11.0
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
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2017-04-12 9:26 [PATCH] ARM: phytec-som-imx6: the ethernet clocks get enabled by fec_imx Michael Grzeschik
2017-05-03 12:00 ` Sascha Hauer
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