From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cyEY9-0002mH-IX for barebox@lists.infradead.org; Wed, 12 Apr 2017 09:26:55 +0000 Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7]) by metis.ext.pengutronix.de with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.84_2) (envelope-from ) id 1cyEXo-0002xx-7E for barebox@lists.infradead.org; Wed, 12 Apr 2017 11:26:32 +0200 Received: from mgr by dude.hi.pengutronix.de with local (Exim 4.88) (envelope-from ) id 1cyEXo-0005kN-00 for barebox@lists.infradead.org; Wed, 12 Apr 2017 11:26:31 +0200 From: Michael Grzeschik Date: Wed, 12 Apr 2017 11:26:30 +0200 Message-Id: <20170412092630.22040-1-m.grzeschik@pengutronix.de> List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "barebox" Errors-To: barebox-bounces+u.kleine-koenig=pengutronix.de@lists.infradead.org Subject: [PATCH] ARM: phytec-som-imx6: the ethernet clocks get enabled by fec_imx To: barebox@lists.infradead.org All necessary clocks get already enabled through the fec_imx driver configured by the devicetree. Signed-off-by: Michael Grzeschik --- arch/arm/boards/phytec-som-imx6/board.c | 27 +-------------------------- 1 file changed, 1 insertion(+), 26 deletions(-) diff --git a/arch/arm/boards/phytec-som-imx6/board.c b/arch/arm/boards/phytec-som-imx6/board.c index ed9453bdda..4d24a55f74 100644 --- a/arch/arm/boards/phytec-som-imx6/board.c +++ b/arch/arm/boards/phytec-som-imx6/board.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include @@ -97,32 +96,14 @@ int ksz8081_phy_fixup(struct phy_device *phydev) return 0; } -static int imx6ul_setup_fec(void) +static void imx6ul_setup_fec(void) { void __iomem *gprbase = IOMEM(MX6_IOMUXC_BASE_ADDR) + 0x4000; uint32_t val; - struct clk *clk; phy_register_fixup_for_uid(PHY_ID_KSZ8081, MICREL_PHY_ID_MASK, ksz8081_phy_fixup); - clk = clk_lookup("enet_ptp"); - if (IS_ERR(clk)) - goto err; - - clk_enable(clk); - - clk = clk_lookup("enet_ref"); - if (IS_ERR(clk)) - goto err; - clk_enable(clk); - - clk = clk_lookup("enet_ref_125m"); - if (IS_ERR(clk)) - goto err; - - clk_enable(clk); - val = readl(gprbase + IOMUXC_GPR1); /* Use 50M anatop loopback REF_CLK1 for ENET1, clear gpr1[13], set gpr1[17]*/ val &= ~(1 << 13); @@ -131,12 +112,6 @@ static int imx6ul_setup_fec(void) val &= ~(1 << 14); val |= (1 << 18); writel(val, gprbase + IOMUXC_GPR1); - - return 0; -err: - pr_err("Setting up DFEC\n"); - - return -EIO; } static int physom_imx6_devices_init(void) -- 2.11.0 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox