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* [PATCH 0/3] i.MX: fec: enable optional clocks in fec driver
@ 2017-05-05 15:49 Michael Grzeschik
  2017-05-05 15:49 ` [PATCH 1/3] i.MX: fec: also enable optional clocks Michael Grzeschik
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: Michael Grzeschik @ 2017-05-05 15:49 UTC (permalink / raw)
  To: barebox

All clocks necessary for the fec are described in the device trees. This
series enables them if found. After that change, all board files
explicitly enabling them can rely on the fec driver.

Michael Grzeschik (3):
  i.MX: fec: also enable optional clocks
  ARM: phytec-som-imx6: the ethernet clocks get enabled by fec_imx
  ARM: mx6sx-sabresdb: the ethernet clocks get enabled by fec_imx

 arch/arm/boards/freescale-mx6sx-sabresdb/board.c | 27 +---------------------
 arch/arm/boards/phytec-som-imx6/board.c          | 27 +---------------------
 drivers/net/fec_imx.c                            | 29 ++++++++++++++++++++++++
 drivers/net/fec_imx.h                            |  8 +++++++
 4 files changed, 39 insertions(+), 52 deletions(-)

-- 
2.11.0


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^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 1/3] i.MX: fec: also enable optional clocks
  2017-05-05 15:49 [PATCH 0/3] i.MX: fec: enable optional clocks in fec driver Michael Grzeschik
@ 2017-05-05 15:49 ` Michael Grzeschik
  2017-05-05 15:49 ` [PATCH 2/3] ARM: phytec-som-imx6: the ethernet clocks get enabled by fec_imx Michael Grzeschik
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 5+ messages in thread
From: Michael Grzeschik @ 2017-05-05 15:49 UTC (permalink / raw)
  To: barebox

This will also enable two more optional clocks. They can be found on
mx6ul, mx6sx and mx28.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
---
 drivers/net/fec_imx.c | 29 +++++++++++++++++++++++++++++
 drivers/net/fec_imx.h |  8 ++++++++
 2 files changed, 37 insertions(+)

diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c
index e2b25fe375..8cf7c4fbda 100644
--- a/drivers/net/fec_imx.c
+++ b/drivers/net/fec_imx.c
@@ -662,6 +662,14 @@ static int fec_clk_enable(struct fec_priv *fec)
 			return err;
 	}
 
+	for (i = 0; i < ARRAY_SIZE(fec->opt_clk); i++) {
+		if (!IS_ERR_OR_NULL(fec->opt_clk[i])) {
+			const int err = clk_enable(fec->opt_clk[i]);
+			if (err < 0)
+				return err;
+		}
+	}
+
 	return 0;
 }
 
@@ -673,6 +681,12 @@ static void fec_clk_disable(struct fec_priv *fec)
 		if (!IS_ERR_OR_NULL(fec->clk[i]))
 			clk_disable(fec->clk[i]);
 	}
+
+	for (i = 0; i < ARRAY_SIZE(fec->opt_clk); i++) {
+		if (!IS_ERR_OR_NULL(fec->opt_clk[i])) {
+			clk_disable(fec->opt_clk[i]);
+		}
+	}
 }
 
 static void fec_clk_put(struct fec_priv *fec)
@@ -683,6 +697,11 @@ static void fec_clk_put(struct fec_priv *fec)
 		if (!IS_ERR_OR_NULL(fec->clk[i]))
 			clk_put(fec->clk[i]);
 	}
+
+	for (i = 0; i < ARRAY_SIZE(fec->opt_clk); i++) {
+		if (!IS_ERR_OR_NULL(fec->opt_clk[i]))
+			clk_put(fec->opt_clk[i]);
+	}
 }
 
 static int fec_clk_get(struct fec_priv *fec)
@@ -691,6 +710,9 @@ static int fec_clk_get(struct fec_priv *fec)
 	static const char *clk_names[ARRAY_SIZE(fec->clk)] = {
 		"ipg", "ahb", "ptp"
 	};
+	static const char *opt_clk_names[ARRAY_SIZE(fec->opt_clk)] = {
+		"enet_clk_ref", "enet_out",
+	};
 
 	for (i = 0; i < ARRAY_SIZE(fec->clk); i++) {
 		fec->clk[i] = clk_get(fec->edev.parent, clk_names[i]);
@@ -701,6 +723,13 @@ static int fec_clk_get(struct fec_priv *fec)
 		}
 	}
 
+	for (i = 0; i < ARRAY_SIZE(fec->opt_clk); i++) {
+		fec->opt_clk[i] = clk_get(fec->edev.parent, opt_clk_names[i]);
+		if (IS_ERR(fec->opt_clk[i])) {
+			fec->opt_clk[i] = NULL;
+		}
+	}
+
 	return err;
 }
 
diff --git a/drivers/net/fec_imx.h b/drivers/net/fec_imx.h
index 85d51bad60..561de0890b 100644
--- a/drivers/net/fec_imx.h
+++ b/drivers/net/fec_imx.h
@@ -137,6 +137,13 @@ enum fec_clock {
 	FEC_CLK_NUM
 };
 
+enum fec_opt_clock {
+	FEC_OPT_CLK_REF,
+	FEC_OPT_CLK_OUT,
+
+	FEC_OPT_CLK_NUM
+};
+
 /**
  * @brief i.MX27-FEC private structure
  */
@@ -153,6 +160,7 @@ struct fec_priv {
 	struct mii_bus miibus;
 	void (*phy_init)(struct phy_device *dev);
 	struct clk *clk[FEC_CLK_NUM];
+	struct clk *opt_clk[FEC_OPT_CLK_NUM];
 	enum fec_type type;
 };
 
-- 
2.11.0


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^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 2/3] ARM: phytec-som-imx6: the ethernet clocks get enabled by fec_imx
  2017-05-05 15:49 [PATCH 0/3] i.MX: fec: enable optional clocks in fec driver Michael Grzeschik
  2017-05-05 15:49 ` [PATCH 1/3] i.MX: fec: also enable optional clocks Michael Grzeschik
@ 2017-05-05 15:49 ` Michael Grzeschik
  2017-05-05 15:49 ` [PATCH 3/3] ARM: mx6sx-sabresdb: " Michael Grzeschik
  2017-05-08 11:53 ` [PATCH 0/3] i.MX: fec: enable optional clocks in fec driver Sascha Hauer
  3 siblings, 0 replies; 5+ messages in thread
From: Michael Grzeschik @ 2017-05-05 15:49 UTC (permalink / raw)
  To: barebox

All necessary clocks get already enabled through the fec_imx driver
configured by the devicetree.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
---
 arch/arm/boards/phytec-som-imx6/board.c | 27 +--------------------------
 1 file changed, 1 insertion(+), 26 deletions(-)

diff --git a/arch/arm/boards/phytec-som-imx6/board.c b/arch/arm/boards/phytec-som-imx6/board.c
index ed9453bdda..4d24a55f74 100644
--- a/arch/arm/boards/phytec-som-imx6/board.c
+++ b/arch/arm/boards/phytec-som-imx6/board.c
@@ -31,7 +31,6 @@
 #include <mach/bbu.h>
 #include <platform_data/eth-fec.h>
 #include <mfd/imx6q-iomuxc-gpr.h>
-#include <linux/clk.h>
 #include <linux/micrel_phy.h>
 
 #include <globalvar.h>
@@ -97,32 +96,14 @@ int ksz8081_phy_fixup(struct phy_device *phydev)
 	return 0;
 }
 
-static int imx6ul_setup_fec(void)
+static void imx6ul_setup_fec(void)
 {
 	void __iomem *gprbase = IOMEM(MX6_IOMUXC_BASE_ADDR) + 0x4000;
 	uint32_t val;
-	struct clk *clk;
 
 	phy_register_fixup_for_uid(PHY_ID_KSZ8081, MICREL_PHY_ID_MASK,
 			ksz8081_phy_fixup);
 
-	clk = clk_lookup("enet_ptp");
-	if (IS_ERR(clk))
-		goto err;
-
-	clk_enable(clk);
-
-	clk = clk_lookup("enet_ref");
-	if (IS_ERR(clk))
-		goto err;
-	clk_enable(clk);
-
-	clk = clk_lookup("enet_ref_125m");
-	if (IS_ERR(clk))
-		goto err;
-
-	clk_enable(clk);
-
 	val = readl(gprbase + IOMUXC_GPR1);
 	/* Use 50M anatop loopback REF_CLK1 for ENET1, clear gpr1[13], set gpr1[17]*/
 	val &= ~(1 << 13);
@@ -131,12 +112,6 @@ static int imx6ul_setup_fec(void)
 	val &= ~(1 << 14);
 	val |= (1 << 18);
 	writel(val, gprbase + IOMUXC_GPR1);
-
-	return 0;
-err:
-	pr_err("Setting up DFEC\n");
-
-	return -EIO;
 }
 
 static int physom_imx6_devices_init(void)
-- 
2.11.0


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^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 3/3] ARM: mx6sx-sabresdb: the ethernet clocks get enabled by fec_imx
  2017-05-05 15:49 [PATCH 0/3] i.MX: fec: enable optional clocks in fec driver Michael Grzeschik
  2017-05-05 15:49 ` [PATCH 1/3] i.MX: fec: also enable optional clocks Michael Grzeschik
  2017-05-05 15:49 ` [PATCH 2/3] ARM: phytec-som-imx6: the ethernet clocks get enabled by fec_imx Michael Grzeschik
@ 2017-05-05 15:49 ` Michael Grzeschik
  2017-05-08 11:53 ` [PATCH 0/3] i.MX: fec: enable optional clocks in fec driver Sascha Hauer
  3 siblings, 0 replies; 5+ messages in thread
From: Michael Grzeschik @ 2017-05-05 15:49 UTC (permalink / raw)
  To: barebox

All necessary clocks get already enabled through the fec_imx driver
configured by the devicetree.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
---
 arch/arm/boards/freescale-mx6sx-sabresdb/board.c | 27 +-----------------------
 1 file changed, 1 insertion(+), 26 deletions(-)

diff --git a/arch/arm/boards/freescale-mx6sx-sabresdb/board.c b/arch/arm/boards/freescale-mx6sx-sabresdb/board.c
index ca22eba393..028b1dddbe 100644
--- a/arch/arm/boards/freescale-mx6sx-sabresdb/board.c
+++ b/arch/arm/boards/freescale-mx6sx-sabresdb/board.c
@@ -22,7 +22,6 @@
 #include <io.h>
 #include <mfd/imx6q-iomuxc-gpr.h>
 #include <generated/mach-types.h>
-#include <linux/clk.h>
 #include <i2c/i2c.h>
 
 #include <asm/armlinux.h>
@@ -181,11 +180,10 @@ int ar8031_phy_fixup(struct phy_device *phydev)
 #define PHY_ID_AR8031	0x004dd074
 #define AR_PHY_ID_MASK	0xffffffff
 
-static int imx6sx_sdb_setup_fec(void)
+static void imx6sx_sdb_setup_fec(void)
 {
 	void __iomem *gprbase = (void *)MX6_IOMUXC_BASE_ADDR + 0x4000;
 	uint32_t val;
-	struct clk *clk;
 
 	phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK,
 			ar8031_phy_fixup);
@@ -193,23 +191,6 @@ static int imx6sx_sdb_setup_fec(void)
 	/* Active high for ncp692 */
 	gpio_direction_output(IMX_GPIO_NR(4, 16), 1);
 
-	clk = clk_lookup("enet_ptp_25m");
-	if (IS_ERR(clk))
-		goto err;
-
-	clk_enable(clk);
-
-	clk = clk_lookup("enet_ref");
-	if (IS_ERR(clk))
-		goto err;
-	clk_enable(clk);
-
-	clk = clk_lookup("enet2_ref_125m");
-	if (IS_ERR(clk))
-		goto err;
-
-	clk_enable(clk);
-
 	val = readl(gprbase + IOMUXC_GPR1);
 	/* Use 125M anatop loopback REF_CLK1 for ENET1, clear gpr1[13], gpr1[17]*/
 	val &= ~(1 << 13);
@@ -226,12 +207,6 @@ static int imx6sx_sdb_setup_fec(void)
 	gpio_direction_output(IMX_GPIO_NR(2, 7), 0);
 	udelay(500);
 	gpio_set_value(IMX_GPIO_NR(2, 7), 1);
-
-	return 0;
-err:
-	pr_err("Setting up DFEC\n");
-
-	return -EIO;
 }
 
 static int imx6sx_sdb_coredevices_init(void)
-- 
2.11.0


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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 0/3] i.MX: fec: enable optional clocks in fec driver
  2017-05-05 15:49 [PATCH 0/3] i.MX: fec: enable optional clocks in fec driver Michael Grzeschik
                   ` (2 preceding siblings ...)
  2017-05-05 15:49 ` [PATCH 3/3] ARM: mx6sx-sabresdb: " Michael Grzeschik
@ 2017-05-08 11:53 ` Sascha Hauer
  3 siblings, 0 replies; 5+ messages in thread
From: Sascha Hauer @ 2017-05-08 11:53 UTC (permalink / raw)
  To: Michael Grzeschik; +Cc: barebox

On Fri, May 05, 2017 at 05:49:17PM +0200, Michael Grzeschik wrote:
> All clocks necessary for the fec are described in the device trees. This
> series enables them if found. After that change, all board files
> explicitly enabling them can rely on the fec driver.
> 
> Michael Grzeschik (3):
>   i.MX: fec: also enable optional clocks
>   ARM: phytec-som-imx6: the ethernet clocks get enabled by fec_imx
>   ARM: mx6sx-sabresdb: the ethernet clocks get enabled by fec_imx

Applied, thanks

Sascha

> 
>  arch/arm/boards/freescale-mx6sx-sabresdb/board.c | 27 +---------------------
>  arch/arm/boards/phytec-som-imx6/board.c          | 27 +---------------------
>  drivers/net/fec_imx.c                            | 29 ++++++++++++++++++++++++
>  drivers/net/fec_imx.h                            |  8 +++++++
>  4 files changed, 39 insertions(+), 52 deletions(-)
> 
> -- 
> 2.11.0
> 
> 
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

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^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2017-05-08 11:54 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-05-05 15:49 [PATCH 0/3] i.MX: fec: enable optional clocks in fec driver Michael Grzeschik
2017-05-05 15:49 ` [PATCH 1/3] i.MX: fec: also enable optional clocks Michael Grzeschik
2017-05-05 15:49 ` [PATCH 2/3] ARM: phytec-som-imx6: the ethernet clocks get enabled by fec_imx Michael Grzeschik
2017-05-05 15:49 ` [PATCH 3/3] ARM: mx6sx-sabresdb: " Michael Grzeschik
2017-05-08 11:53 ` [PATCH 0/3] i.MX: fec: enable optional clocks in fec driver Sascha Hauer

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