Re: [PATCH 2/3] ARM: i.MX6ul: Add Clock support for i.MX6ull

[Sascha Hauer <s.hauer@pengutronix.de>]

On Thu, May 11, 2017 at 11:09:27AM +0200, Stefan Riedmueller wrote:
> From linux-4.10 clock support, only skipped some unnecessary clocks
> 
> Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
> ---
>  drivers/clk/imx/clk-imx6ul.c | 73 +++++++++++++++++++++++++++++++++++++-------
>  1 file changed, 62 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c
> index f28660d..b0a6bb0 100644
> --- a/drivers/clk/imx/clk-imx6ul.c
> +++ b/drivers/clk/imx/clk-imx6ul.c
> @@ -66,10 +66,24 @@ static const char *perclk_sels[] = { "ipg", "osc", };
>  static const char *lcdif_sels[] = { "lcdif_podf", "ipp_di0", "ipp_di1", "ldb_di0", "ldb_di1", };
>  static const char *csi_sels[] = { "osc", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };
>  static const char *sim_sels[] = { "sim_podf", "ipp_di0", "ipp_di1", "ldb_di0", "ldb_di1", };
> +/* epdc_pre_sels, epdc_sels, esai_sels only exists on i.MX6ULL */
> +static const char *epdc_pre_sels[] = { "pll2_bus", "pll3_usb_otg", "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd2_508m", };
> +static const char *esai_sels[] = { "pll4_audio_div", "pll3_pfd2_508m", "pll5_video_div", "pll3_usb_otg", };
> +static const char *epdc_sels[] = { "epdc_podf", "ipp_di0", "ipp_di1", "ldb_di0", "ldb_di1", };
>  
>  static struct clk *clks[IMX6UL_CLK_END];
>  static struct clk_onecell_data clk_data;
>  
> +static inline int clk_on_imx6ul(void)
> +{
> +	return of_machine_is_compatible("fsl,imx6ul");
> +}
> +
> +static inline int clk_on_imx6ull(void)
> +{
> +	return of_machine_is_compatible("fsl,imx6ull");
> +}

Can we use cpu_is_imx6ul(l) instead here? This would allow
us to compile away the code if we one of the two SoCs is
disabled in the config.

Sascha

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