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From: Juergen Borleis <jbe@pengutronix.de>
To: barebox@lists.infradead.org
Subject: Re: [PATCH] PPC: request a consistent memory layout (part II)
Date: Mon, 22 May 2017 12:34:38 +0200	[thread overview]
Message-ID: <201705221234.39274.jbe@pengutronix.de> (raw)
In-Reply-To: <20170522102643.outnjbd4ymnrph5f@pengutronix.de>

Hi Sascha,

On Monday 22 May 2017 12:26:43 Sascha Hauer wrote:
> [...]
> I have the feeling that we should actively put the vector table to one
> of the two locations, so we should implicitly know where it is and not
> have to test the MSR_IP bit.

Sometimes it depends on the boot mode. You can locate the NOR flash memory 
at 0x00000 or 0xfff00000 (via bootstrap pins) and in the latter case the 
vector table is at 0xfff00000 (at least the reset vector)!

> Also there is no SDRAM at 0xfff00000, right?

Yes, but (maybe) flash.

> Requesting SDRAM there will fail every time for a good reason.

Good catch.

jb
-- 
Pengutronix e.K.                             | Juergen Borleis             |
Industrial Linux Solutions                   | http://www.pengutronix.de/  |

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  reply	other threads:[~2017-05-22 10:35 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-22  8:49 Juergen Borleis
2017-05-22 10:26 ` Sascha Hauer
2017-05-22 10:34   ` Juergen Borleis [this message]
2017-05-22 10:43     ` Sascha Hauer

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