* [PATCH] clk: i.MX51: Add missing USBOH3_GATE clock
@ 2017-05-22 15:22 Andrey Smirnov
2017-05-23 5:42 ` Nikita Yushchenko
0 siblings, 1 reply; 3+ messages in thread
From: Andrey Smirnov @ 2017-05-22 15:22 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov, Nikita Yushchenko, cphealy
This clock is requested by chipidea driver during probe and its
absense breaks USB functionality.
Cc: cphealy@gmail.com
Cc: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/clk/imx/clk-imx5.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/clk/imx/clk-imx5.c b/drivers/clk/imx/clk-imx5.c
index c4c47a6..62e7842 100644
--- a/drivers/clk/imx/clk-imx5.c
+++ b/drivers/clk/imx/clk-imx5.c
@@ -244,6 +244,8 @@ static void __init mx5_clocks_common_init(struct device_d *dev, void __iomem *ba
"ecspi_pred", base + CCM_CSCDR2, 19, 6);
clks[IMX5_CLK_CPU_PODF] = imx_clk_divider("cpu_podf",
"pll1_sw", base + CCM_CACRR, 0, 3);
+
+ clks[IMX5_CLK_USBOH3_GATE] = imx_clk_gate2("usboh3_gate", "ipg", base + CCM_CCGR2, 26);
}
static void mx5_clocks_mx51_mx53_init(void __iomem *base)
@@ -392,6 +394,12 @@ int __init mx51_clocks_init(struct device_d *dev, void __iomem *regs)
clkdev_add_physbase(clks[IMX5_CLK_PER_ROOT], MX51_PWM1_BASE_ADDR, "per");
clkdev_add_physbase(clks[IMX5_CLK_PER_ROOT], MX51_PWM2_BASE_ADDR, "per");
+ clkdev_add_physbase(clks[IMX5_CLK_USBOH3_GATE], MX51_OTG_BASE_ADDR + 0x000, NULL);
+ clkdev_add_physbase(clks[IMX5_CLK_USBOH3_GATE], MX51_OTG_BASE_ADDR + 0x200, NULL);
+ clkdev_add_physbase(clks[IMX5_CLK_USBOH3_GATE], MX51_OTG_BASE_ADDR + 0x400, NULL);
+ clkdev_add_physbase(clks[IMX5_CLK_USBOH3_GATE], MX51_OTG_BASE_ADDR + 0x600, NULL);
+ clkdev_add_physbase(clks[IMX5_CLK_USBOH3_GATE], MX51_OTG_BASE_ADDR + 0x800, NULL);
+
if (IS_ENABLED(CONFIG_DRIVER_VIDEO_IMX_IPUV3))
mx51_clocks_ipu_init(regs);
--
2.9.3
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^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] clk: i.MX51: Add missing USBOH3_GATE clock
2017-05-22 15:22 [PATCH] clk: i.MX51: Add missing USBOH3_GATE clock Andrey Smirnov
@ 2017-05-23 5:42 ` Nikita Yushchenko
2017-05-24 4:43 ` Andrey Smirnov
0 siblings, 1 reply; 3+ messages in thread
From: Nikita Yushchenko @ 2017-05-23 5:42 UTC (permalink / raw)
To: Andrey Smirnov, barebox; +Cc: cphealy
> static void mx5_clocks_mx51_mx53_init(void __iomem *base)
> @@ -392,6 +394,12 @@ int __init mx51_clocks_init(struct device_d *dev, void __iomem *regs)
> clkdev_add_physbase(clks[IMX5_CLK_PER_ROOT], MX51_PWM1_BASE_ADDR, "per");
> clkdev_add_physbase(clks[IMX5_CLK_PER_ROOT], MX51_PWM2_BASE_ADDR, "per");
>
> + clkdev_add_physbase(clks[IMX5_CLK_USBOH3_GATE], MX51_OTG_BASE_ADDR + 0x000, NULL);
> + clkdev_add_physbase(clks[IMX5_CLK_USBOH3_GATE], MX51_OTG_BASE_ADDR + 0x200, NULL);
> + clkdev_add_physbase(clks[IMX5_CLK_USBOH3_GATE], MX51_OTG_BASE_ADDR + 0x400, NULL);
> + clkdev_add_physbase(clks[IMX5_CLK_USBOH3_GATE], MX51_OTG_BASE_ADDR + 0x600, NULL);
> + clkdev_add_physbase(clks[IMX5_CLK_USBOH3_GATE], MX51_OTG_BASE_ADDR + 0x800, NULL);
> +
> if (IS_ENABLED(CONFIG_DRIVER_VIDEO_IMX_IPUV3))
> mx51_clocks_ipu_init(regs);
It may be cleaner to setup USB related clocks under
if (IS_ENABLED(CONFIG_...) { ... } - i.e. in the same way as IPU
related clocks are added in neighbour line.
Also, this is the only place in this file where address arithmetic is
used. Not sure if this is ok or not but it catches eye.
Nikita
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^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] clk: i.MX51: Add missing USBOH3_GATE clock
2017-05-23 5:42 ` Nikita Yushchenko
@ 2017-05-24 4:43 ` Andrey Smirnov
0 siblings, 0 replies; 3+ messages in thread
From: Andrey Smirnov @ 2017-05-24 4:43 UTC (permalink / raw)
To: Nikita Yushchenko; +Cc: barebox, Chris Healy
On Mon, May 22, 2017 at 10:42 PM, Nikita Yushchenko
<nikita.yoush@cogentembedded.com> wrote:
>> static void mx5_clocks_mx51_mx53_init(void __iomem *base)
>> @@ -392,6 +394,12 @@ int __init mx51_clocks_init(struct device_d *dev, void __iomem *regs)
>> clkdev_add_physbase(clks[IMX5_CLK_PER_ROOT], MX51_PWM1_BASE_ADDR, "per");
>> clkdev_add_physbase(clks[IMX5_CLK_PER_ROOT], MX51_PWM2_BASE_ADDR, "per");
>>
>> + clkdev_add_physbase(clks[IMX5_CLK_USBOH3_GATE], MX51_OTG_BASE_ADDR + 0x000, NULL);
>> + clkdev_add_physbase(clks[IMX5_CLK_USBOH3_GATE], MX51_OTG_BASE_ADDR + 0x200, NULL);
>> + clkdev_add_physbase(clks[IMX5_CLK_USBOH3_GATE], MX51_OTG_BASE_ADDR + 0x400, NULL);
>> + clkdev_add_physbase(clks[IMX5_CLK_USBOH3_GATE], MX51_OTG_BASE_ADDR + 0x600, NULL);
>> + clkdev_add_physbase(clks[IMX5_CLK_USBOH3_GATE], MX51_OTG_BASE_ADDR + 0x800, NULL);
>> +
>> if (IS_ENABLED(CONFIG_DRIVER_VIDEO_IMX_IPUV3))
>> mx51_clocks_ipu_init(regs);
>
> It may be cleaner to setup USB related clocks under
> if (IS_ENABLED(CONFIG_...) { ... } - i.e. in the same way as IPU
> related clocks are added in neighbour line.
>
> Also, this is the only place in this file where address arithmetic is
> used. Not sure if this is ok or not but it catches eye.
Looks like this patch is not really necessary, so I'll just drop it.
Thanks,
Andrey Smirnov
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^ permalink raw reply [flat|nested] 3+ messages in thread
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2017-05-22 15:22 [PATCH] clk: i.MX51: Add missing USBOH3_GATE clock Andrey Smirnov
2017-05-23 5:42 ` Nikita Yushchenko
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