From: Andrey Smirnov <andrew.smirnov@gmail.com>
To: barebox@lists.infradead.org
Cc: Andrey Smirnov <andrew.smirnov@gmail.com>, cphealy@gmail.com
Subject: [PATCH 0/3] Fix "i.MX: vf610: Ramp CPU clock to maximum frequency"
Date: Mon, 19 Jun 2017 07:40:36 -0700 [thread overview]
Message-ID: <20170619144039.20552-1-andrew.smirnov@gmail.com> (raw)
Everyone,
It looks like my test setup was somehow contaminated -- possibly by
using JTAG to initalize SoC and upload Barebox binary -- so
21921f7f419dfaabcd385595ada24f0352310f1a ("i.MX: vf610: Ramp CPU clock
to maximum frequency") didn't actually work as I thought it was and
instead it made Barebox not boot on Vybrid.
This patch series contains all of the changes I had to make in order
to make CPU clock switching work/"unbreak" Barebox on Vybrid.
Let me know if anything needs changing.
Thanks,
Andrey Smirnov
Andrey Smirnov (3):
clk-vf610: Mark all of CCSR muxes with CLK_OPS_PARENT_ENABLE
i.MX: clk-pllv3: Do not touch PLL_BYPASS bit
i.MX: clk: Remove imx_clk_pllv3_locked()
drivers/clk/imx/clk-pllv3.c | 26 --------------------------
drivers/clk/imx/clk-vf610.c | 28 ++++++++++++++++++++--------
drivers/clk/imx/clk.h | 4 ----
3 files changed, 20 insertions(+), 38 deletions(-)
--
2.9.4
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next reply other threads:[~2017-06-19 14:41 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-19 14:40 Andrey Smirnov [this message]
2017-06-19 14:40 ` [PATCH 1/3] clk-vf610: Mark all of CCSR muxes with CLK_OPS_PARENT_ENABLE Andrey Smirnov
2017-06-19 14:40 ` [PATCH 2/3] i.MX: clk-pllv3: Do not touch PLL_BYPASS bit Andrey Smirnov
2017-06-19 14:40 ` [PATCH 3/3] i.MX: clk: Remove imx_clk_pllv3_locked() Andrey Smirnov
2017-06-20 7:35 ` [PATCH 0/3] Fix "i.MX: vf610: Ramp CPU clock to maximum frequency" Sascha Hauer
2017-06-21 3:41 ` Andrey Smirnov
2017-06-21 8:44 ` Sascha Hauer
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