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From: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
To: barebox@lists.infradead.org
Cc: andrey.gusakov@cogentembedded.com, Chris.Healy@zii.aero
Subject: [PATCH 5/8] video: tc358767: fix timing calculation
Date: Fri, 30 Jun 2017 14:43:01 +0300	[thread overview]
Message-ID: <20170630114304.8070-6-andrey.gusakov@cogentembedded.com> (raw)
In-Reply-To: <20170630114304.8070-1-andrey.gusakov@cogentembedded.com>

Fields in HTIM01 and HTIM02 regs should be even.
Recomended thresh_dly value is max_tu_symbol.
---
 drivers/video/tc358767.c | 25 +++++++++++++++----------
 1 file changed, 15 insertions(+), 10 deletions(-)

diff --git a/drivers/video/tc358767.c b/drivers/video/tc358767.c
index 033da4fb2..d2c94c616 100644
--- a/drivers/video/tc358767.c
+++ b/drivers/video/tc358767.c
@@ -730,13 +730,15 @@ err_dpcd_inval:
 	return -EINVAL;
 }
 
+#define EVEN_HI(val)	((val + 1) & (~0x01))
+
 static int tc_set_video_mode(struct tc_data *tc, struct fb_videomode *mode)
 {
 	int ret;
 	int htotal;
 	int vtotal;
 	int vid_sync_dly;
-	int max_tu_symbol;
+	int max_tu_symbol = TU_SIZE_RECOMMENDED - 1;
 
 	htotal = mode->hsync_len + mode->left_margin + mode->xres +
 		mode->right_margin;
@@ -750,14 +752,18 @@ static int tc_set_video_mode(struct tc_data *tc, struct fb_videomode *mode)
 		mode->upper_margin, mode->lower_margin, mode->vsync_len);
 	dev_dbg(tc->dev, "total: %dx%d\n", htotal, vtotal);
 
-
-	/* LCD Ctl Frame Size */
-	tc_write(VPCTRL0, (0x40 << 20) /* VSDELAY */ |
+	/*
+	 * Datasheet is not clear of vsdelay in case of DPI
+	 * assume we do not need any delay when DPI is a source of
+	 * sync signals
+	 */
+	tc_write(VPCTRL0, (0 << 20) /* VSDELAY */ |
 		 OPXLFMT_RGB888 | FRMSYNC_DISABLED | MSF_DISABLED);
-	tc_write(HTIM01, (mode->left_margin << 16) |		/* H back porch */
-			 (mode->hsync_len << 0));		/* Hsync */
-	tc_write(HTIM02, (mode->right_margin << 16) |		/* H front porch */
-			 (mode->xres << 0));			/* width */
+	/* LCD Ctl Frame Size */
+	tc_write(HTIM01, (EVEN_HI(mode->left_margin) << 16) |	/* H back porch */
+			 (EVEN_HI(mode->hsync_len) << 0));	/* Hsync */
+	tc_write(HTIM02, (EVEN_HI(mode->right_margin) << 16) |	/* H front porch */
+			 (EVEN_HI(mode->xres) << 0));		/* width */
 	tc_write(VTIM01, (mode->upper_margin << 16) |		/* V back porch */
 			 (mode->vsync_len << 0));		/* Vsync */
 	tc_write(VTIM02, (mode->lower_margin << 16) |		/* V front porch */
@@ -776,7 +782,7 @@ static int tc_set_video_mode(struct tc_data *tc, struct fb_videomode *mode)
 	/* DP Main Stream Attributes */
 	vid_sync_dly = mode->hsync_len + mode->left_margin + mode->xres;
 	tc_write(DP0_VIDSYNCDELAY,
-		 (0x003e << 16) |	/* thresh_dly */
+		 (max_tu_symbol << 16) |	/* thresh_dly */
 		 (vid_sync_dly << 0));
 
 	tc_write(DP0_TOTALVAL, (vtotal << 16) | (htotal));
@@ -798,7 +804,6 @@ static int tc_set_video_mode(struct tc_data *tc, struct fb_videomode *mode)
 	 *              (output active video bandwidth in bytes))
 	 * Must be less than tu_size.
 	 */
-	max_tu_symbol = TU_SIZE_RECOMMENDED - 1;
 	tc_write(DP0_MISC, (max_tu_symbol << 23) | (TU_SIZE_RECOMMENDED << 16) | BPC_8);
 
 	return 0;
-- 
2.13.0


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  parent reply	other threads:[~2017-06-30 11:41 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-30 11:42 [PATCH 0/8] video: tc358767: fixes and improvements Andrey Gusakov
2017-06-30 11:42 ` [PATCH 1/8] video: tc358767: do not fail if sink supports more than 2 lanes Andrey Gusakov
2017-06-30 11:42 ` [PATCH 2/8] video: tc358767: support newer DPCD revisions and higher data rates Andrey Gusakov
2017-06-30 11:42 ` [PATCH 3/8] video: tc358767: fix EDID read for DP displays Andrey Gusakov
2017-06-30 11:43 ` [PATCH 4/8] video: tc358767: fix DP0_MISC register set Andrey Gusakov
2017-06-30 11:43 ` Andrey Gusakov [this message]
2017-07-03  9:19   ` [PATCH 5/8] video: tc358767: fix timing calculation Lucas Stach
2017-06-30 11:43 ` [PATCH 6/8] video: tc358767: fix AUXDATAn registers access Andrey Gusakov
2017-07-03  9:22   ` Lucas Stach
2017-06-30 11:43 ` [PATCH 7/8] video: tc358767: filter out modes with too high pixelclock Andrey Gusakov
2017-06-30 11:43 ` [PATCH 8/8] video: tc358767: accept any hsync and vsync polatiry Andrey Gusakov
2017-07-03  9:27 ` [PATCH 0/8] video: tc358767: fixes and improvements Lucas Stach

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