[PATCH 1/4] ARM: imx: clocksource: Use per clock for determining parent freq

["Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>]

For imx1, imx25, imx27, imx31, imx35 and imx5x this doesn't make a
difference because clk_get(dev, NULL) returns the same clock as
clk_get(dev, "per") because the id parameter isn't checked at all and
the per clock is returned unconditionally.

For imx6sl, imx6sx and imx6ul different clocks are returned, but both
are gates for "perclk". For imx6qdl clk_get(..., NULL) returns
IMX6QDL_CLK_GPT_IPG which is a gate of "ipg", while clk_get(..., "per")
returns IMX6QDL_CLK_GPT_IPG_PER which is a gate of "ipg_per" which in
turn is a divider of "ipg" with a boot-up default value of 1 which isn't
touched in barebox.

So the only SoC where this change matters is imx7 where clk_get(dev,
NULL) returns a dummy clk while clk_get(dev, "per") returns the right
clk to use.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
 arch/arm/mach-imx/clocksource.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/clocksource.c b/arch/arm/mach-imx/clocksource.c
index 8482abd691f0..17762c3caf25 100644
--- a/arch/arm/mach-imx/clocksource.c
+++ b/arch/arm/mach-imx/clocksource.c
@@ -115,7 +115,7 @@ static int imx_gpt_probe(struct device_d *dev)
 	for (i = 0; i < 100; i++)
 		writel(0, timer_base + GPT_TCTL); /* We have no udelay by now */
 
-	clk_gpt = clk_get(dev, NULL);
+	clk_gpt = clk_get(dev, "per");
 	if (IS_ERR(clk_gpt)) {
 		rate = 20000000;
 		dev_err(dev, "failed to get clock\n");
-- 
2.11.0


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