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From: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 3/4] ARM: imx: clocksource: make warning a bit more helpful
Date: Fri, 28 Jul 2017 22:08:11 +0200	[thread overview]
Message-ID: <20170728200812.27224-3-u.kleine-koenig@pengutronix.de> (raw)
In-Reply-To: <20170728200812.27224-1-u.kleine-koenig@pengutronix.de>

When getting the clk for the gpt fails, the driver assumes a fixed rate.
Add this rate to the warning that is emitted in this case.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
 arch/arm/boards/juenger-c9m/flash-header.imxcfg | 311 ++++++++++++------------
 arch/arm/mach-imx/clocksource.c                 |   2 +-
 2 files changed, 153 insertions(+), 160 deletions(-)

diff --git a/arch/arm/boards/juenger-c9m/flash-header.imxcfg b/arch/arm/boards/juenger-c9m/flash-header.imxcfg
index a1bc6cc2c8d1..3e725c9fdf3e 100644
--- a/arch/arm/boards/juenger-c9m/flash-header.imxcfg
+++ b/arch/arm/boards/juenger-c9m/flash-header.imxcfg
@@ -5,10 +5,10 @@ dcdofs 0x400
 #include <mach/imx7-ddr-regs.h>
 
 /*
- * init script for i.MX7D 	LPDDR3
+ * init script for i.MX7D 	DDR3
  *
  * Revision History
- * 1.3
+ *  1.1
  */
 
 /* Processor Initialization (Clocks and IOMUX) */
@@ -96,12 +96,12 @@ wm 32 0x30384060 0x00000002
 wm 32 0x30384070 0x00000002
 wm 32 0x30384080 0x00000002
 wm 32 0x30384090 0x00000002
-wm 32 0x303840A0 0x00000002
-wm 32 0x303840B0 0x00000002
-wm 32 0x303840C0 0x00000002
-wm 32 0x303840D0 0x00000002
-wm 32 0x303840E0 0x00000002
-wm 32 0x303840F0 0x00000002
+wm 32 0x303840a0 0x00000002
+wm 32 0x303840b0 0x00000002
+wm 32 0x303840c0 0x00000002
+wm 32 0x303840d0 0x00000002
+wm 32 0x303840e0 0x00000002
+wm 32 0x303840f0 0x00000002
 wm 32 0x30384100 0x00000002
 wm 32 0x30384110 0x00000002
 wm 32 0x30384120 0x00000002
@@ -112,12 +112,12 @@ wm 32 0x30384160 0x00000002
 wm 32 0x30384170 0x00000002
 wm 32 0x30384180 0x00000002
 wm 32 0x30384190 0x00000002
-wm 32 0x303841A0 0x00000002
-wm 32 0x303841B0 0x00000002
-wm 32 0x303841C0 0x00000002
-wm 32 0x303841D0 0x00000002
-wm 32 0x303841E0 0x00000002
-wm 32 0x303841F0 0x00000002
+wm 32 0x303841a0 0x00000002
+wm 32 0x303841b0 0x00000002
+wm 32 0x303841c0 0x00000002
+wm 32 0x303841d0 0x00000002
+wm 32 0x303841e0 0x00000002
+wm 32 0x303841f0 0x00000002
 wm 32 0x30384200 0x00000002
 wm 32 0x30384210 0x00000002
 wm 32 0x30384220 0x00000002
@@ -128,12 +128,12 @@ wm 32 0x30384260 0x00000002
 wm 32 0x30384270 0x00000002
 wm 32 0x30384280 0x00000002
 wm 32 0x30384290 0x00000002
-wm 32 0x303842A0 0x00000002
-wm 32 0x303842B0 0x00000002
-wm 32 0x303842C0 0x00000002
-wm 32 0x303842D0 0x00000002
-wm 32 0x303842E0 0x00000002
-wm 32 0x303842F0 0x00000002
+wm 32 0x303842a0 0x00000002
+wm 32 0x303842b0 0x00000002
+wm 32 0x303842c0 0x00000002
+wm 32 0x303842d0 0x00000002
+wm 32 0x303842e0 0x00000002
+wm 32 0x303842f0 0x00000002
 wm 32 0x30384300 0x00000002
 wm 32 0x30384310 0x00000002
 wm 32 0x30384320 0x00000002
@@ -144,12 +144,12 @@ wm 32 0x30384360 0x00000002
 wm 32 0x30384370 0x00000002
 wm 32 0x30384380 0x00000002
 wm 32 0x30384390 0x00000002
-wm 32 0x303843A0 0x00000002
-wm 32 0x303843B0 0x00000002
-wm 32 0x303843C0 0x00000002
-wm 32 0x303843D0 0x00000002
-wm 32 0x303843E0 0x00000002
-wm 32 0x303843F0 0x00000002
+wm 32 0x303843a0 0x00000002
+wm 32 0x303843b0 0x00000002
+wm 32 0x303843c0 0x00000002
+wm 32 0x303843d0 0x00000002
+wm 32 0x303843e0 0x00000002
+wm 32 0x303843f0 0x00000002
 wm 32 0x30384400 0x00000002
 wm 32 0x30384410 0x00000002
 wm 32 0x30384420 0x00000002
@@ -160,12 +160,12 @@ wm 32 0x30384460 0x00000002
 wm 32 0x30384470 0x00000002
 wm 32 0x30384480 0x00000002
 wm 32 0x30384490 0x00000002
-wm 32 0x303844A0 0x00000002
-wm 32 0x303844B0 0x00000002
-wm 32 0x303844C0 0x00000002
-wm 32 0x303844D0 0x00000002
-wm 32 0x303844E0 0x00000002
-wm 32 0x303844F0 0x00000002
+wm 32 0x303844a0 0x00000002
+wm 32 0x303844b0 0x00000002
+wm 32 0x303844c0 0x00000002
+wm 32 0x303844d0 0x00000002
+wm 32 0x303844e0 0x00000002
+wm 32 0x303844f0 0x00000002
 wm 32 0x30384500 0x00000002
 wm 32 0x30384510 0x00000002
 wm 32 0x30384520 0x00000002
@@ -176,12 +176,12 @@ wm 32 0x30384560 0x00000002
 wm 32 0x30384570 0x00000002
 wm 32 0x30384580 0x00000002
 wm 32 0x30384590 0x00000002
-wm 32 0x303845A0 0x00000002
-wm 32 0x303845B0 0x00000002
-wm 32 0x303845C0 0x00000002
-wm 32 0x303845D0 0x00000002
-wm 32 0x303845E0 0x00000002
-wm 32 0x303845F0 0x00000002
+wm 32 0x303845a0 0x00000002
+wm 32 0x303845b0 0x00000002
+wm 32 0x303845c0 0x00000002
+wm 32 0x303845d0 0x00000002
+wm 32 0x303845e0 0x00000002
+wm 32 0x303845f0 0x00000002
 wm 32 0x30384600 0x00000002
 wm 32 0x30384610 0x00000002
 wm 32 0x30384620 0x00000002
@@ -192,12 +192,12 @@ wm 32 0x30384660 0x00000002
 wm 32 0x30384670 0x00000002
 wm 32 0x30384680 0x00000002
 wm 32 0x30384690 0x00000002
-wm 32 0x303846A0 0x00000002
-wm 32 0x303846B0 0x00000002
-wm 32 0x303846C0 0x00000002
-wm 32 0x303846D0 0x00000002
-wm 32 0x303846E0 0x00000002
-wm 32 0x303846F0 0x00000002
+wm 32 0x303846a0 0x00000002
+wm 32 0x303846b0 0x00000002
+wm 32 0x303846c0 0x00000002
+wm 32 0x303846d0 0x00000002
+wm 32 0x303846e0 0x00000002
+wm 32 0x303846f0 0x00000002
 wm 32 0x30384700 0x00000002
 wm 32 0x30384710 0x00000002
 wm 32 0x30384720 0x00000002
@@ -208,12 +208,12 @@ wm 32 0x30384760 0x00000002
 wm 32 0x30384770 0x00000002
 wm 32 0x30384780 0x00000002
 wm 32 0x30384790 0x00000002
-wm 32 0x303847A0 0x00000002
-wm 32 0x303847B0 0x00000002
-wm 32 0x303847C0 0x00000002
-wm 32 0x303847D0 0x00000002
-wm 32 0x303847E0 0x00000002
-wm 32 0x303847F0 0x00000002
+wm 32 0x303847a0 0x00000002
+wm 32 0x303847b0 0x00000002
+wm 32 0x303847c0 0x00000002
+wm 32 0x303847d0 0x00000002
+wm 32 0x303847e0 0x00000002
+wm 32 0x303847f0 0x00000002
 wm 32 0x30384800 0x00000002
 wm 32 0x30384810 0x00000002
 wm 32 0x30384820 0x00000002
@@ -224,12 +224,12 @@ wm 32 0x30384860 0x00000002
 wm 32 0x30384870 0x00000002
 wm 32 0x30384880 0x00000002
 wm 32 0x30384890 0x00000002
-wm 32 0x303848A0 0x00000002
-wm 32 0x303848B0 0x00000002
-wm 32 0x303848C0 0x00000002
-wm 32 0x303848D0 0x00000002
-wm 32 0x303848E0 0x00000002
-wm 32 0x303848F0 0x00000002
+wm 32 0x303848a0 0x00000002
+wm 32 0x303848b0 0x00000002
+wm 32 0x303848c0 0x00000002
+wm 32 0x303848d0 0x00000002
+wm 32 0x303848e0 0x00000002
+wm 32 0x303848f0 0x00000002
 wm 32 0x30384900 0x00000002
 wm 32 0x30384910 0x00000002
 wm 32 0x30384920 0x00000002
@@ -240,44 +240,44 @@ wm 32 0x30384960 0x00000002
 wm 32 0x30384970 0x00000002
 wm 32 0x30384980 0x00000002
 wm 32 0x30384990 0x00000002
-wm 32 0x303849A0 0x00000002
-wm 32 0x303849B0 0x00000002
-wm 32 0x303849C0 0x00000002
-wm 32 0x303849D0 0x00000002
-wm 32 0x303849E0 0x00000002
-wm 32 0x303849F0 0x00000002
-wm 32 0x30384A00 0x00000002
-wm 32 0x30384A10 0x00000002
-wm 32 0x30384A20 0x00000002
-wm 32 0x30384A30 0x00000002
-wm 32 0x30384A40 0x00000002
-wm 32 0x30384A50 0x00000002
-wm 32 0x30384A60 0x00000002
-wm 32 0x30384A70 0x00000002
-wm 32 0x30384A80 0x00000002
-wm 32 0x30384A90 0x00000002
-wm 32 0x30384AA0 0x00000002
-wm 32 0x30384AB0 0x00000002
-wm 32 0x30384AC0 0x00000002
-wm 32 0x30384AD0 0x00000002
-wm 32 0x30384AE0 0x00000002
-wm 32 0x30384AF0 0x00000002
-wm 32 0x30384B00 0x00000002
-wm 32 0x30384B10 0x00000002
-wm 32 0x30384B20 0x00000002
-wm 32 0x30384B30 0x00000002
-wm 32 0x30384B40 0x00000002
-wm 32 0x30384B50 0x00000002
-wm 32 0x30384B60 0x00000002
-wm 32 0x30384B70 0x00000002
-wm 32 0x30384B80 0x00000002
-wm 32 0x30384B90 0x00000002
-wm 32 0x30384BA0 0x00000002
-wm 32 0x30384BB0 0x00000002
-wm 32 0x30384BC0 0x00000002
-wm 32 0x30384BD0 0x00000002
-wm 32 0x30384BE0 0x00000002
-wm 32 0x30384BF0 0x00000002
+wm 32 0x303849a0 0x00000002
+wm 32 0x303849b0 0x00000002
+wm 32 0x303849c0 0x00000002
+wm 32 0x303849d0 0x00000002
+wm 32 0x303849e0 0x00000002
+wm 32 0x303849f0 0x00000002
+wm 32 0x30384a00 0x00000002
+wm 32 0x30384a10 0x00000002
+wm 32 0x30384a20 0x00000002
+wm 32 0x30384a30 0x00000002
+wm 32 0x30384a40 0x00000002
+wm 32 0x30384a50 0x00000002
+wm 32 0x30384a60 0x00000002
+wm 32 0x30384a70 0x00000002
+wm 32 0x30384a80 0x00000002
+wm 32 0x30384a90 0x00000002
+wm 32 0x30384aa0 0x00000002
+wm 32 0x30384ab0 0x00000002
+wm 32 0x30384ac0 0x00000002
+wm 32 0x30384ad0 0x00000002
+wm 32 0x30384ae0 0x00000002
+wm 32 0x30384af0 0x00000002
+wm 32 0x30384b00 0x00000002
+wm 32 0x30384b10 0x00000002
+wm 32 0x30384b20 0x00000002
+wm 32 0x30384b30 0x00000002
+wm 32 0x30384b40 0x00000002
+wm 32 0x30384b50 0x00000002
+wm 32 0x30384b60 0x00000002
+wm 32 0x30384b70 0x00000002
+wm 32 0x30384b80 0x00000002
+wm 32 0x30384b90 0x00000002
+wm 32 0x30384ba0 0x00000002
+wm 32 0x30384bb0 0x00000002
+wm 32 0x30384bc0 0x00000002
+wm 32 0x30384bd0 0x00000002
+wm 32 0x30384be0 0x00000002
+wm 32 0x30384bf0 0x00000002
 
 wm 32 0x30380800 0x00000002
 wm 32 0x30380810 0x00000002
@@ -289,12 +289,12 @@ wm 32 0x30380860 0x00000002
 wm 32 0x30380870 0x00000002
 wm 32 0x30380880 0x00000002
 wm 32 0x30380890 0x00000002
-wm 32 0x303808A0 0x00000002
-wm 32 0x303808B0 0x00000002
-wm 32 0x303808C0 0x00000002
-wm 32 0x303808D0 0x00000002
-wm 32 0x303808E0 0x00000002
-wm 32 0x303808F0 0x00000002
+wm 32 0x303808a0 0x00000002
+wm 32 0x303808b0 0x00000002
+wm 32 0x303808c0 0x00000002
+wm 32 0x303808d0 0x00000002
+wm 32 0x303808e0 0x00000002
+wm 32 0x303808f0 0x00000002
 wm 32 0x30380900 0x00000002
 wm 32 0x30380910 0x00000002
 wm 32 0x30380920 0x00000002
@@ -305,22 +305,22 @@ wm 32 0x30380960 0x00000002
 wm 32 0x30380970 0x00000002
 wm 32 0x30380980 0x00000002
 wm 32 0x30380990 0x00000002
-wm 32 0x303809A0 0x00000002
-wm 32 0x303809B0 0x00000002
-wm 32 0x303809C0 0x00000002
-wm 32 0x303809D0 0x00000002
-wm 32 0x303809E0 0x00000002
-wm 32 0x303809F0 0x00000002
-wm 32 0x30380A00 0x00000002
+wm 32 0x303809a0 0x00000002
+wm 32 0x303809b0 0x00000002
+wm 32 0x303809c0 0x00000002
+wm 32 0x303809d0 0x00000002
+wm 32 0x303809e0 0x00000002
+wm 32 0x303809f0 0x00000002
+wm 32 0x30380a00 0x00000002
 
 /* Enable OCRAM EPDC */
-wm 32 0x30340004 0x4F400005
+wm 32 0x30340004 0x4f400005
 
 /*
  * DDR Controller Registers
  * ========================
- * Memory type:		LPDDR3
- * Manufacturer:	Alliance
+ * Memory type:	DDR3
+ * Manufacturer:	Alliance Memory
  * Device Part Number:	AS4C256M16D3LB-12BCN
  * Clock Freq.: 	533MHz
  * Density per CS in Gb: 	8
@@ -333,62 +333,55 @@ wm 32 0x30340004 0x4F400005
  */
 
 wm 32 0x30391000 0x00000002	# deassert presetn
-wm 32 MX7_DDRC_MSTR 0x01040008	# DDRC_MSTR
-wm 32 MX7_DDRC_RFSHTMG 0x00400046	# DDRC_RFSHTMG
-wm 32 MX7_DDRC_MP_PCTRL_0 0x00000001	# DDRC_PCTRL_0
-wm 32 MX7_DDRC_INIT0 0x00350001	# DDRC_INIT0
-wm 32 MX7_DDRC_INIT2 0x00001105	# DDRC_INIT2  (if using DDR3 this line is automatically commented out)
-wm 32 MX7_DDRC_INIT3 0x00C3000A	# DDRC_INIT3
-wm 32 MX7_DDRC_INIT4 0x00020000	# DDRC_INIT4
-wm 32 MX7_DDRC_INIT5 0x00110006	# DDRC_INIT5
-wm 32 MX7_DDRC_RANKCTL 0x0000033F	# DDRC_RANKCTL
-wm 32 MX7_DDRC_DRAMTMG0 0x0A0B1109	# DDRC_DRAMTMG0
-wm 32 MX7_DDRC_DRAMTMG1 0x0002020D	# DDRC_DRAMTMG1
-wm 32 MX7_DDRC_DRAMTMG2 0x03060608	# DDRC_DRAMTMG2
-wm 32 MX7_DDRC_DRAMTMG3 0x00A0200C	# DDRC_DRAMTMG3
-wm 32 MX7_DDRC_DRAMTMG4 0x04020205	# DDRC_DRAMTMG4
-wm 32 MX7_DDRC_DRAMTMG5 0x03030202	# DDRC_DRAMTMG5
-wm 32 MX7_DDRC_DRAMTMG6 0x02020003	# DDRC_DRAMTMG6
-wm 32 MX7_DDRC_DRAMTMG7 0x00000202	# DDRC_DRAMTMG7
-wm 32 MX7_DDRC_DRAMTMG8 0x00000503	# DDRC_DRAMTMG8
-wm 32 MX7_DDRC_ZQCTL0 0x00800020	# DDRC_ZQCTL0
-wm 32 MX7_DDRC_ZQCTL1 0x10000100	# DDRC_ZQCTL1
-wm 32 MX7_DDRC_DFITMG0 0x02098205	# DDRC_DFITMG0
-wm 32 MX7_DDRC_DFITMG1 0x00060303	# DDRC_DFITMG1
-wm 32 MX7_DDRC_DFIUPD0 0x80400003	# DDRC_DFIUPD0
-wm 32 MX7_DDRC_DFIUPD1 0x00100020	# DDRC_DFIUPD1
-wm 32 MX7_DDRC_DFIUPD2 0x80100004	# DDRC_DFIUPD2
-wm 32 MX7_DDRC_ADDRMAP0 0x00000016	# DDRC_ADDRMAP0
-wm 32 MX7_DDRC_ADDRMAP1 0x00080808	# DDRC_ADDRMAP1
-wm 32 MX7_DDRC_ADDRMAP4 0x00000F0F	# DDRC_ADDRMAP4
-wm 32 MX7_DDRC_ADDRMAP5 0x07070707	# DDRC_ADDRMAP5
-wm 32 MX7_DDRC_ADDRMAP6 0x0F070707	# DDRC_ADDRMAP6
-wm 32 MX7_DDRC_ODTCFG 0x05000600	# DDRC_ODTCFG
-wm 32 MX7_DDRC_ODTMAP 0x00000000	# DDRC_ODTMAP
+wm 32 MX7_DDRC_MSTR 0x01040001
+wm 32 MX7_DDRC_RFSHTMG 0x00400046
+wm 32 MX7_DDRC_MP_PCTRL_0 0x00000001
+wm 32 MX7_DDRC_INIT1 0x00690000
+wm 32 MX7_DDRC_INIT0 0x00020083
+wm 32 MX7_DDRC_INIT3 0x09300004
+wm 32 MX7_DDRC_INIT4 0x04080000
+wm 32 MX7_DDRC_INIT5 0x00100004
+wm 32 MX7_DDRC_RANKCTL 0x0000033f
+wm 32 MX7_DDRC_DRAMTMG0 0x090b1109
+wm 32 MX7_DDRC_DRAMTMG1 0x0007020d
+wm 32 MX7_DDRC_DRAMTMG2 0x03040407
+wm 32 MX7_DDRC_DRAMTMG3 0x00002006
+wm 32 MX7_DDRC_DRAMTMG4 0x04020205
+wm 32 MX7_DDRC_DRAMTMG5 0x03030202
+wm 32 MX7_DDRC_DRAMTMG8 0x00000803
+wm 32 MX7_DDRC_ZQCTL0 0x00800020
+wm 32 MX7_DDRC_DFITMG0 0x02098204
+wm 32 MX7_DDRC_DFITMG1 0x00030303
+wm 32 MX7_DDRC_DFIUPD0 0x80400003
+wm 32 MX7_DDRC_DFIUPD1 0x00100020
+wm 32 MX7_DDRC_DFIUPD2 0x80100004
+wm 32 MX7_DDRC_ADDRMAP0 0x00000016
+wm 32 MX7_DDRC_ADDRMAP1 0x00080808
+wm 32 MX7_DDRC_ADDRMAP4 0x00000f0f
+wm 32 MX7_DDRC_ADDRMAP5 0x07070707
+wm 32 MX7_DDRC_ADDRMAP6 0x0f070707
+wm 32 MX7_DDRC_ODTCFG 0x06000604
+wm 32 MX7_DDRC_ODTMAP 0x00000001
 
 /*
  * PHY Control Registers
  */
 
 wm 32 0x30391000 0x00000000	# deassert presetn
-wm 32 MX7_DDR_PHY_PHY_CON0 0x17421E40	# DDR_PHY_PHY_CON0
-wm 32 MX7_DDR_PHY_PHY_CON1 0x10210100	# DDR_PHY_PHY_CON1
-wm 32 MX7_DDR_PHY_PHY_CON2 0x00010000	# DDR_PHY_PHY_CON2 (if using DDR3 this line is automatically commented out)
-wm 32 MX7_DDR_PHY_PHY_CON4 0x0007080C	# DDR_PHY_PHY_CON4
-wm 32 MX7_DDR_PHY_MDLL_CON0 0x1010007E	# DDR_PHY_MDLL_CON0
-wm 32 MX7_DDR_PHY_RODT_CON0 0x01010000	# DDR_PHY_PHY_RODT_CON0 (if using DDR3 this line is automatically commented out)
-wm 32 MX7_DDR_PHY_DRVDS_CON0 0x00000D6E	# DDR_PHY_DRVDS_CON0
-
-wm 32 MX7_DDR_PHY_OFFSET_WR_CON0 0x06060606	# DDR_PHY_OFFSET_WR_CON0
-wm 32 MX7_DDR_PHY_OFFSET_RD_CON0 0x0A0A0A0A	# DDR_PHY_OFFSET_RD_CON0
-wm 32 MX7_DDR_PHY_CMD_SDLL_CON0 0x01000008	# DDR_PHY_OFFSETD_CON0
-wm 32 MX7_DDR_PHY_CMD_SDLL_CON0 0x00000008	# DDR_PHY_OFFSETD_CON0
-wm 32 MX7_DDR_PHY_LP_CON0 0x0000000F	# DDR_PHY_LP_CON0
-wm 32 MX7_DDR_PHY_ZQ_CON0 0x0E487304	# DDR_PHY_ZQ_CON0 - Start Manual ZQ
-wm 32 MX7_DDR_PHY_ZQ_CON0 0x0E4C7304
-wm 32 MX7_DDR_PHY_ZQ_CON0 0x0E4C7306
-wm 32 MX7_DDR_PHY_ZQ_CON0 0x0E487304	# DDR_PHY_ZQ_CON0 - End Manual ZQ
+wm 32 MX7_DDR_PHY_PHY_CON0 0x17420f40
+wm 32 MX7_DDR_PHY_PHY_CON1 0x10210100
+wm 32 MX7_DDR_PHY_DRVDS_CON0 0x00000d6e
 
+wm 32 MX7_DDR_PHY_OFFSET_WR_CON0 0x08080808
+wm 32 MX7_DDR_PHY_OFFSET_RD_CON0 0x08080808
+wm 32 MX7_DDR_PHY_CMD_SDLL_CON0 0x01000010
+wm 32 MX7_DDR_PHY_CMD_SDLL_CON0 0x00000010
+wm 32 MX7_DDR_PHY_LP_CON0 0x0000000f
+wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e407304	# Start Manual ZQ
+wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e447304
+wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e447306
+wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e447304
+wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e407304	# End Manual ZQ
 
 /*
  * Final Initialization start sequence
diff --git a/arch/arm/mach-imx/clocksource.c b/arch/arm/mach-imx/clocksource.c
index 793f84ee4800..4d6c6c2b0bcd 100644
--- a/arch/arm/mach-imx/clocksource.c
+++ b/arch/arm/mach-imx/clocksource.c
@@ -118,7 +118,7 @@ static int imx_gpt_probe(struct device_d *dev)
 	clk_gpt = clk_get(dev, "per");
 	if (IS_ERR(clk_gpt)) {
 		rate = 20000000;
-		dev_err(dev, "failed to get clock\n");
+		dev_err(dev, "failed to get clock, assume %lu Hz\n", rate);
 	} else {
 		rate = clk_get_rate(clk_gpt);
 		if (!rate) {
-- 
2.11.0


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  parent reply	other threads:[~2017-07-28 20:09 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-28 20:08 [PATCH 1/4] ARM: imx: clocksource: Use per clock for determining parent freq Uwe Kleine-König
2017-07-28 20:08 ` [PATCH 2/4] ARM: imx: clocksource: error out if clk freq is 0 Uwe Kleine-König
2017-07-28 20:08 ` Uwe Kleine-König [this message]
2017-07-28 20:15   ` [PATCH 3/4] ARM: imx: clocksource: make warning a bit more helpful Andrey Smirnov
2017-07-28 20:15   ` [PATCH 3/4 v2] " Uwe Kleine-König
2017-07-28 20:08 ` [PATCH 4/4] ARM: i.MX7: drop now useless imx7s.dtsi Uwe Kleine-König
2017-07-28 20:14   ` Andrey Smirnov

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