* [PATCH] ARM: mvebu: armada-xp: configure PLL and PHY register @ 2017-08-15 9:47 Jan Luebbe 2017-08-16 8:17 ` Uwe Kleine-König 0 siblings, 1 reply; 3+ messages in thread From: Jan Luebbe @ 2017-08-15 9:47 UTC (permalink / raw) To: barebox The PLL setup is needed to use the USB ports in Linux. This code is ported from mainline U-Boot arch/arm/mach-mvebu/cpu.c. Signed-off-by: Jan Luebbe <jlu@pengutronix.de> --- arch/arm/mach-mvebu/armada-370-xp.c | 45 ++++++++++++++++++++++ .../mach-mvebu/include/mach/armada-370-xp-regs.h | 2 + 2 files changed, 47 insertions(+) diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c index 93ad955a6e49..06128300254b 100644 --- a/arch/arm/mach-mvebu/armada-370-xp.c +++ b/arch/arm/mach-mvebu/armada-370-xp.c @@ -83,6 +83,48 @@ static void __noreturn armada_370_xp_restart_soc(struct restart_handler *rst) hang(); } +#define MVEBU_AXP_USB_BASE (MVEBU_REMAP_INT_REG_BASE + 0x50000) +#define MV_USB_PHY_BASE (MVEBU_AXP_USB_BASE + 0x800) +#define MV_USB_PHY_PLL_REG(reg) (MV_USB_PHY_BASE | (((reg) & 0xF) << 2)) +#define MV_USB_X3_BASE(addr) (MVEBU_AXP_USB_BASE | BIT(11) | \ + (((addr) & 0xF) << 6)) +#define MV_USB_X3_PHY_CHANNEL(dev, reg) (MV_USB_X3_BASE((dev) + 1) | \ + (((reg) & 0xF) << 2)) + +static void setup_usb_phys(void) +{ + int dev; + + /* + * USB PLL init + */ + + /* Setup PLL frequency */ + /* USB REF frequency = 25 MHz */ + clrsetbits_le32(MV_USB_PHY_PLL_REG(1), 0x3ff, 0x605); + + /* Power up PLL and PHY channel */ + setbits_le32(MV_USB_PHY_PLL_REG(2), BIT(9)); + + /* Assert VCOCAL_START */ + setbits_le32(MV_USB_PHY_PLL_REG(1), BIT(21)); + + mdelay(1); + + /* + * USB PHY init (change from defaults) specific for 40nm (78X30 78X60) + */ + + for (dev = 0; dev < 3; dev++) { + setbits_le32(MV_USB_X3_PHY_CHANNEL(dev, 3), BIT(15)); + + /* Assert REG_RCAL_START in channel REG 1 */ + setbits_le32(MV_USB_X3_PHY_CHANNEL(dev, 1), BIT(12)); + udelay(40); + clrbits_le32(MV_USB_X3_PHY_CHANNEL(dev, 1), BIT(12)); + } +} + static int armada_370_xp_init_soc(void) { u32 reg; @@ -109,6 +151,9 @@ static int armada_370_xp_init_soc(void) reg = readl(ARMADA_XP_PUP_ENABLE); reg |= GE0_PUP_EN | GE1_PUP_EN | LCD_PUP_EN | NAND_PUP_EN | SPI_PUP_EN; writel(reg, ARMADA_XP_PUP_ENABLE); + + /* Configure USB PLL and PHYs on AXP */ + setup_usb_phys(); } return 0; diff --git a/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h b/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h index 1dad05317211..b972df151a74 100644 --- a/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h +++ b/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h @@ -72,4 +72,6 @@ (((port) % 4) * ARMADA_370_XP_PCIE_PORT_OFFSET)) #define PCIE_DEVICE_VENDOR_ID 0x000 +#define ARMADA_370_XP_USB_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x50000) + #endif /* __MACH_MVEBU_ARMADA_370_XP_REGS_H */ -- 2.11.0 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] ARM: mvebu: armada-xp: configure PLL and PHY register 2017-08-15 9:47 [PATCH] ARM: mvebu: armada-xp: configure PLL and PHY register Jan Luebbe @ 2017-08-16 8:17 ` Uwe Kleine-König 2017-08-16 10:51 ` Jan Lübbe 0 siblings, 1 reply; 3+ messages in thread From: Uwe Kleine-König @ 2017-08-16 8:17 UTC (permalink / raw) To: Jan Luebbe; +Cc: barebox Hallo Jan, On Tue, Aug 15, 2017 at 11:47:37AM +0200, Jan Luebbe wrote: > The PLL setup is needed to use the USB ports in Linux. > > This code is ported from mainline U-Boot arch/arm/mach-mvebu/cpu.c. Actually this is a work around because Linux doesn't do the necessary setup before making use of the hardware, right? If so, wouldn't it be better to teach Linux about the needed setup? > +static void setup_usb_phys(void) > +{ > + int dev; > + > + /* > + * USB PLL init > + */ > + > + /* Setup PLL frequency */ > + /* USB REF frequency = 25 MHz */ > + clrsetbits_le32(MV_USB_PHY_PLL_REG(1), 0x3ff, 0x605); > + > + /* Power up PLL and PHY channel */ > + setbits_le32(MV_USB_PHY_PLL_REG(2), BIT(9)); > + > + /* Assert VCOCAL_START */ > + setbits_le32(MV_USB_PHY_PLL_REG(1), BIT(21)); > + > + mdelay(1); > + > + /* > + * USB PHY init (change from defaults) specific for 40nm (78X30 78X60) I assume this comment also comes from U-Boot. Still I wonder if it makes sense to use the more common names instead of "78X30 78X60". That would be "Armada XP" but not "Armada 370", wouldn't it? (Armada 370 = 88F6710, 88F6707, and 88F6W11). If so, this code shouldn't be reached on Armada 370? Some other places in barebox suggest, that MV78xx0 is neither XP nor 370 (e.g. dts/Bindings/net/marvell-orion-mdio.txt dts/Bindings/arm/marvell/mvebu-system-controller.txt drivers/bus/Kconfig drivers/spi/mvebu_spi.c ) > + */ > + > + for (dev = 0; dev < 3; dev++) { > + setbits_le32(MV_USB_X3_PHY_CHANNEL(dev, 3), BIT(15)); > + > + /* Assert REG_RCAL_START in channel REG 1 */ > + setbits_le32(MV_USB_X3_PHY_CHANNEL(dev, 1), BIT(12)); > + udelay(40); > + clrbits_le32(MV_USB_X3_PHY_CHANNEL(dev, 1), BIT(12)); > + } Can this be made quicker using: for (dev = 0; dev < 3; dev++) { setbits_le32(MV_USB_X3_PHY_CHANNEL(dev, 3), BIT(15)); /* Assert REG_RCAL_START in channel REG 1 */ setbits_le32(MV_USB_X3_PHY_CHANNEL(dev, 1), BIT(12)); } udelay(40; for (dev = 0; dev < 3; dev++) clrbits_le32(MV_USB_X3_PHY_CHANNEL(dev, 1), BIT(12)); ? > +} > + > static int armada_370_xp_init_soc(void) > { > u32 reg; > @@ -109,6 +151,9 @@ static int armada_370_xp_init_soc(void) > reg = readl(ARMADA_XP_PUP_ENABLE); > reg |= GE0_PUP_EN | GE1_PUP_EN | LCD_PUP_EN | NAND_PUP_EN | SPI_PUP_EN; > writel(reg, ARMADA_XP_PUP_ENABLE); > + > + /* Configure USB PLL and PHYs on AXP */ > + setup_usb_phys(); > } > > return 0; > diff --git a/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h b/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h > index 1dad05317211..b972df151a74 100644 > --- a/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h > +++ b/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h > @@ -72,4 +72,6 @@ > (((port) % 4) * ARMADA_370_XP_PCIE_PORT_OFFSET)) > #define PCIE_DEVICE_VENDOR_ID 0x000 > > +#define ARMADA_370_XP_USB_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x50000) Instead of hardcoding this address, this could be done depending on the device at the same address specified in the device tree. Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-König | Industrial Linux Solutions | http://www.pengutronix.de/ | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] ARM: mvebu: armada-xp: configure PLL and PHY register 2017-08-16 8:17 ` Uwe Kleine-König @ 2017-08-16 10:51 ` Jan Lübbe 0 siblings, 0 replies; 3+ messages in thread From: Jan Lübbe @ 2017-08-16 10:51 UTC (permalink / raw) To: Uwe Kleine-König; +Cc: barebox On Wed, 2017-08-16 at 10:17 +0200, Uwe Kleine-König wrote: > Hallo Jan, > > On Tue, Aug 15, 2017 at 11:47:37AM +0200, Jan Luebbe wrote: > > The PLL setup is needed to use the USB ports in Linux. > > > > This code is ported from mainline U-Boot arch/arm/mach-mvebu/cpu.c. > > Actually this is a work around because Linux doesn't do the necessary > setup before making use of the hardware, right? > > If so, wouldn't it be better to teach Linux about the needed setup? It would still be needed for barebox USB support. > > +static void setup_usb_phys(void) > > +{ > > + int dev; > > + > > + /* > > + * USB PLL init > > + */ > > + > > + /* Setup PLL frequency */ > > + /* USB REF frequency = 25 MHz */ > > + clrsetbits_le32(MV_USB_PHY_PLL_REG(1), 0x3ff, 0x605); > > + > > + /* Power up PLL and PHY channel */ > > + setbits_le32(MV_USB_PHY_PLL_REG(2), BIT(9)); > > + > > + /* Assert VCOCAL_START */ > > + setbits_le32(MV_USB_PHY_PLL_REG(1), BIT(21)); > > + > > + mdelay(1); > > + > > + /* > > + * USB PHY init (change from defaults) specific for 40nm > > (78X30 78X60) > > I assume this comment also comes from U-Boot. Still I wonder if it > makes sense to use the more common names instead of "78X30 78X60". > That would be "Armada XP" but not "Armada 370", wouldn't it? (Armada > 370 = 88F6710, 88F6707, and 88F6W11). If so, this code shouldn't be > reached on Armada 370? > > Some other places in barebox suggest, that MV78xx0 is neither XP nor > 370 (e.g. > dts/Bindings/net/marvell-orion-mdio.txt > dts/Bindings/arm/marvell/mvebu-system-controller.txt > drivers/bus/Kconfig > drivers/spi/mvebu_spi.c > ) As far as I can see, there is no authoritative source on the naming. So I'd like to avoid making changes without being sure that it is actually correct. > > + */ > > + > > + for (dev = 0; dev < 3; dev++) { > > + setbits_le32(MV_USB_X3_PHY_CHANNEL(dev, 3), > > BIT(15)); > > + > > + /* Assert REG_RCAL_START in channel REG 1 */ > > + setbits_le32(MV_USB_X3_PHY_CHANNEL(dev, 1), > > BIT(12)); > > + udelay(40); > > + clrbits_le32(MV_USB_X3_PHY_CHANNEL(dev, 1), > > BIT(12)); > > + } > > Can this be made quicker using: > > for (dev = 0; dev < 3; dev++) { > setbits_le32(MV_USB_X3_PHY_CHANNEL(dev, 3), BIT(15)); > > /* Assert REG_RCAL_START in channel REG 1 */ > setbits_le32(MV_USB_X3_PHY_CHANNEL(dev, 1), BIT(12)); > } > > udelay(40; > > for (dev = 0; dev < 3; dev++) > clrbits_le32(MV_USB_X3_PHY_CHANNEL(dev, 1), BIT(12)); > > ? Possibly. Nevertheless I'd prefer to keep the code identical to the one from U-Boot, at least until someone is interested in refactoring this on a larger scale. > > +} > > + > > static int armada_370_xp_init_soc(void) > > { > > u32 reg; > > @@ -109,6 +151,9 @@ static int armada_370_xp_init_soc(void) > > reg = readl(ARMADA_XP_PUP_ENABLE); > > reg |= GE0_PUP_EN | GE1_PUP_EN | LCD_PUP_EN | > > NAND_PUP_EN | SPI_PUP_EN; > > writel(reg, ARMADA_XP_PUP_ENABLE); > > + > > + /* Configure USB PLL and PHYs on AXP */ > > + setup_usb_phys(); > > } > > > > return 0; > > diff --git a/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h > > b/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h > > index 1dad05317211..b972df151a74 100644 > > --- a/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h > > +++ b/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h > > @@ -72,4 +72,6 @@ > > (((port) % 4) * ARMADA_370_XP_PCIE_PORT_OFFSET)) > > #define PCIE_DEVICE_VENDOR_ID 0x000 > > > > +#define ARMADA_370_XP_USB_BASE (ARMADA_370_XP_INT_R > > EGS_BASE + 0x50000) > > Instead of hardcoding this address, this could be done depending on > the device at the same address specified in the device tree. > -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2017-08-16 10:51 UTC | newest] Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2017-08-15 9:47 [PATCH] ARM: mvebu: armada-xp: configure PLL and PHY register Jan Luebbe 2017-08-16 8:17 ` Uwe Kleine-König 2017-08-16 10:51 ` Jan Lübbe
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox