* [PATCH v2 1/4] of: base: port of_device_is_big_endian from linux
2017-08-18 13:57 [PATCH v2 0/4] privide ns16550 support for AR9344 Oleksij Rempel
@ 2017-08-18 13:57 ` Oleksij Rempel
2017-08-18 13:57 ` [PATCH v2 2/4] asm-generic: partially sync io.h with linux kernel Oleksij Rempel
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Oleksij Rempel @ 2017-08-18 13:57 UTC (permalink / raw)
To: barebox; +Cc: Oleksij Rempel
|commit 37786c7fee40771d13901de129af7e084ed48b55
|Author: Kevin Cernekee <cernekee@gmail.com>
|Date: Thu Apr 9 13:05:14 2015 -0700
|
| of: Add helper function to check MMIO register endianness
|
| SoC peripherals can come in several different flavors:
|
| - little-endian: registers always need to be accessed in LE mode (so the
| kernel should perform a swap if the CPU is running BE)
|
| - big-endian: registers always need to be accessed in BE mode (so the
| kernel should perform a swap if the CPU is running LE)
|
| - native-endian: the bus will automatically swap accesses, so the kernel
| should never swap
|
| Introduce a function that checks an OF device node to see whether it
| contains a "big-endian" or "native-endian" property. For the former case,
| always return true. For the latter case, return true iff the kernel was
| built for BE (implying that the BE MMIO accessors do not perform a swap).
| Otherwise return false, assuming LE registers.
|
| LE registers are assumed by default because most existing drivers (libahci,
| serial8250, usb) always use readl/writel in the absence of instructions
| to the contrary, so that will be our fallback.
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
---
drivers/of/base.c | 23 +++++++++++++++++++++++
include/of.h | 6 ++++++
2 files changed, 29 insertions(+)
diff --git a/drivers/of/base.c b/drivers/of/base.c
index ea330d131..95bea4ee8 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -1622,6 +1622,29 @@ int of_device_is_available(const struct device_node *device)
EXPORT_SYMBOL(of_device_is_available);
/**
+ * of_device_is_big_endian - check if a device has BE registers
+ *
+ * @device: Node to check for endianness
+ *
+ * Returns true if the device has a "big-endian" property, or if the kernel
+ * was compiled for BE *and* the device has a "native-endian" property.
+ * Returns false otherwise.
+ *
+ * Callers would nominally use ioread32be/iowrite32be if
+ * of_device_is_big_endian() == true, or readl/writel otherwise.
+ */
+bool of_device_is_big_endian(const struct device_node *device)
+{
+ if (of_property_read_bool(device, "big-endian"))
+ return true;
+ if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN) &&
+ of_property_read_bool(device, "native-endian"))
+ return true;
+ return false;
+}
+EXPORT_SYMBOL(of_device_is_big_endian);
+
+/**
* of_get_parent - Get a node's parent if any
* @node: Node to get parent
*
diff --git a/include/of.h b/include/of.h
index 0ba73f197..9ba771a39 100644
--- a/include/of.h
+++ b/include/of.h
@@ -150,6 +150,7 @@ extern int of_machine_is_compatible(const char *compat);
extern int of_device_is_compatible(const struct device_node *device,
const char *compat);
extern int of_device_is_available(const struct device_node *device);
+extern bool of_device_is_big_endian(const struct device_node *device);
extern struct device_node *of_get_parent(const struct device_node *node);
extern struct device_node *of_get_next_available_child(
@@ -595,6 +596,11 @@ static inline int of_device_is_available(const struct device_node *device)
return 0;
}
+static inline bool of_device_is_big_endian(const struct device_node *device)
+{
+ return false;
+}
+
static inline void of_alias_scan(void)
{
}
--
2.11.0
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^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v2 2/4] asm-generic: partially sync io.h with linux kernel
2017-08-18 13:57 [PATCH v2 0/4] privide ns16550 support for AR9344 Oleksij Rempel
2017-08-18 13:57 ` [PATCH v2 1/4] of: base: port of_device_is_big_endian from linux Oleksij Rempel
@ 2017-08-18 13:57 ` Oleksij Rempel
2017-09-04 8:01 ` Sascha Hauer
2017-08-18 13:57 ` [PATCH v2 3/4] x86: asm: include asm-generic.h Oleksij Rempel
2017-08-18 13:57 ` [PATCH v2 4/4] serial: ns16550: provide big-endian support Oleksij Rempel
3 siblings, 1 reply; 6+ messages in thread
From: Oleksij Rempel @ 2017-08-18 13:57 UTC (permalink / raw)
To: barebox; +Cc: Oleksij Rempel
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
---
include/asm-generic/io.h | 229 +++++++++++++++++++++++++++++++++++++++++------
1 file changed, 201 insertions(+), 28 deletions(-)
diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
index 8d83d6806..a3192bae6 100644
--- a/include/asm-generic/io.h
+++ b/include/asm-generic/io.h
@@ -69,50 +69,114 @@ static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
#endif
#ifndef PCI_IOBASE
-#define PCI_IOBASE ((void __iomem *) 0)
+#define PCI_IOBASE ((void __iomem *)0)
+#endif
+
+#ifndef IO_SPACE_LIMIT
+#define IO_SPACE_LIMIT 0xffff
#endif
-/*****************************************************************************/
/*
- * traditional input/output functions
+ * {in,out}{b,w,l}() access little endian I/O. {in,out}{b,w,l}_p() can be
+ * implemented on hardware that needs an additional delay for I/O accesses to
+ * take effect.
*/
+#ifndef inb
+#define inb inb
static inline u8 inb(unsigned long addr)
{
- return readb(addr + PCI_IOBASE);
+ return readb(PCI_IOBASE + addr);
}
+#endif
+#ifndef inw
+#define inw inw
static inline u16 inw(unsigned long addr)
{
- return readw(addr + PCI_IOBASE);
+ return readw(PCI_IOBASE + addr);
}
+#endif
+#ifndef inl
+#define inl inl
static inline u32 inl(unsigned long addr)
{
- return readl(addr + PCI_IOBASE);
+ return readl(PCI_IOBASE + addr);
+}
+#endif
+
+#ifndef outb
+#define outb outb
+static inline void outb(u8 value, unsigned long addr)
+{
+ writeb(value, PCI_IOBASE + addr);
+}
+#endif
+
+#ifndef outw
+#define outw outw
+static inline void outw(u16 value, unsigned long addr)
+{
+ writew(value, PCI_IOBASE + addr);
+}
+#endif
+
+#ifndef outl
+#define outl outl
+static inline void outl(u32 value, unsigned long addr)
+{
+ writel(value, PCI_IOBASE + addr);
+}
+#endif
+
+#ifndef inb_p
+#define inb_p inb_p
+static inline u8 inb_p(unsigned long addr)
+{
+ return inb(addr);
+}
+#endif
+
+#ifndef inw_p
+#define inw_p inw_p
+static inline u16 inw_p(unsigned long addr)
+{
+ return inw(addr);
}
+#endif
-static inline void outb(u8 b, unsigned long addr)
+#ifndef inl_p
+#define inl_p inl_p
+static inline u32 inl_p(unsigned long addr)
{
- writeb(b, addr + PCI_IOBASE);
+ return inl(addr);
}
+#endif
-static inline void outw(u16 b, unsigned long addr)
+#ifndef outb_p
+#define outb_p outb_p
+static inline void outb_p(u8 value, unsigned long addr)
{
- writew(b, addr + PCI_IOBASE);
+ outb(value, addr);
}
+#endif
-static inline void outl(u32 b, unsigned long addr)
+#ifndef outw_p
+#define outw_p outw_p
+static inline void outw_p(u16 value, unsigned long addr)
{
- writel(b, addr + PCI_IOBASE);
+ outw(value, addr);
}
+#endif
-#define inb_p(addr) inb(addr)
-#define inw_p(addr) inw(addr)
-#define inl_p(addr) inl(addr)
-#define outb_p(x, addr) outb((x), (addr))
-#define outw_p(x, addr) outw((x), (addr))
-#define outl_p(x, addr) outl((x), (addr))
+#ifndef outl_p
+#define outl_p outl_p
+static inline void outl_p(u32 value, unsigned long addr)
+{
+ outl(value, addr);
+}
+#endif
#ifndef insb
static inline void insb(unsigned long addr, void *buffer, int count)
@@ -219,16 +283,125 @@ static inline void writesb(const void __iomem *addr, const void *buf, int len)
outsb(addr - PCI_IOBASE, buf, len);
}
-#define ioread8(addr) readb(addr)
-#define ioread16(addr) readw(addr)
-#define ioread16be(addr) __be16_to_cpu(__raw_readw(addr))
-#define ioread32(addr) readl(addr)
-#define ioread32be(addr) __be32_to_cpu(__raw_readl(addr))
-#define iowrite8(v, addr) writeb((v), (addr))
-#define iowrite16(v, addr) writew((v), (addr))
-#define iowrite16be(v, addr) __raw_writew(__cpu_to_be16(v), addr)
-#define iowrite32(v, addr) writel((v), (addr))
-#define iowrite32be(v, addr) __raw_writel(__cpu_to_be32(v), addr)
+#ifndef ioread8
+#define ioread8 ioread8
+static inline u8 ioread8(const volatile void __iomem *addr)
+{
+ return readb(addr);
+}
+#endif
+
+#ifndef ioread16
+#define ioread16 ioread16
+static inline u16 ioread16(const volatile void __iomem *addr)
+{
+ return readw(addr);
+}
+#endif
+
+#ifndef ioread32
+#define ioread32 ioread32
+static inline u32 ioread32(const volatile void __iomem *addr)
+{
+ return readl(addr);
+}
+#endif
+
+#ifdef CONFIG_64BIT
+#ifndef ioread64
+#define ioread64 ioread64
+static inline u64 ioread64(const volatile void __iomem *addr)
+{
+ return readq(addr);
+}
+#endif
+#endif /* CONFIG_64BIT */
+
+#ifndef iowrite8
+#define iowrite8 iowrite8
+static inline void iowrite8(u8 value, volatile void __iomem *addr)
+{
+ writeb(value, addr);
+}
+#endif
+
+#ifndef iowrite16
+#define iowrite16 iowrite16
+static inline void iowrite16(u16 value, volatile void __iomem *addr)
+{
+ writew(value, addr);
+}
+#endif
+
+#ifndef iowrite32
+#define iowrite32 iowrite32
+static inline void iowrite32(u32 value, volatile void __iomem *addr)
+{
+ writel(value, addr);
+}
+#endif
+
+#ifdef CONFIG_64BIT
+#ifndef iowrite64
+#define iowrite64 iowrite64
+static inline void iowrite64(u64 value, volatile void __iomem *addr)
+{
+ writeq(value, addr);
+}
+#endif
+#endif /* CONFIG_64BIT */
+
+#ifndef ioread16be
+#define ioread16be ioread16be
+static inline u16 ioread16be(const volatile void __iomem *addr)
+{
+ return swab16(readw(addr));
+}
+#endif
+
+#ifndef ioread32be
+#define ioread32be ioread32be
+static inline u32 ioread32be(const volatile void __iomem *addr)
+{
+ return swab32(readl(addr));
+}
+#endif
+
+#ifdef CONFIG_64BIT
+#ifndef ioread64be
+#define ioread64be ioread64be
+static inline u64 ioread64be(const volatile void __iomem *addr)
+{
+ return swab64(readq(addr));
+}
+#endif
+#endif /* CONFIG_64BIT */
+
+#ifndef iowrite16be
+#define iowrite16be iowrite16be
+static inline void iowrite16be(u16 value, void volatile __iomem *addr)
+{
+ writew(swab16(value), addr);
+}
+#endif
+
+#ifndef iowrite32be
+#define iowrite32be iowrite32be
+static inline void iowrite32be(u32 value, volatile void __iomem *addr)
+{
+ writel(swab32(value), addr);
+}
+#endif
+
+#ifdef CONFIG_64BIT
+#ifndef iowrite64be
+#define iowrite64be iowrite64be
+static inline void iowrite64be(u64 value, volatile void __iomem *addr)
+{
+ writeq(swab64(value), addr);
+}
+#endif
+#endif /* CONFIG_64BIT */
#endif /* __ASM_GENERIC_IO_H */
--
2.11.0
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^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v2 4/4] serial: ns16550: provide big-endian support
2017-08-18 13:57 [PATCH v2 0/4] privide ns16550 support for AR9344 Oleksij Rempel
` (2 preceding siblings ...)
2017-08-18 13:57 ` [PATCH v2 3/4] x86: asm: include asm-generic.h Oleksij Rempel
@ 2017-08-18 13:57 ` Oleksij Rempel
3 siblings, 0 replies; 6+ messages in thread
From: Oleksij Rempel @ 2017-08-18 13:57 UTC (permalink / raw)
To: barebox; +Cc: Oleksij Rempel
we need it at least for QCA AR9344
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
---
drivers/serial/serial_ns16550.c | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/drivers/serial/serial_ns16550.c b/drivers/serial/serial_ns16550.c
index a8953cd99..4d73ea8b8 100644
--- a/drivers/serial/serial_ns16550.c
+++ b/drivers/serial/serial_ns16550.c
@@ -94,6 +94,16 @@ static void ns16550_write_reg_mmio_32(struct ns16550_priv *priv, uint8_t val, un
writel(val, priv->mmiobase + offset);
}
+static uint8_t ns16550_read_reg_mmio_32be(struct ns16550_priv *priv, unsigned offset)
+{
+ return ioread32be(priv->mmiobase + offset);
+}
+
+static void ns16550_write_reg_mmio_32be(struct ns16550_priv *priv, uint8_t val, unsigned offset)
+{
+ iowrite32be(val, priv->mmiobase + offset);
+}
+
static uint8_t ns16550_read_reg_ioport_8(struct ns16550_priv *priv, unsigned offset)
{
return inb(priv->iobase + offset);
@@ -305,8 +315,13 @@ static void ns16550_probe_dt(struct device_d *dev, struct ns16550_priv *priv)
priv->write_reg = ns16550_write_reg_mmio_16;
break;
case 4:
- priv->read_reg = ns16550_read_reg_mmio_32;
- priv->write_reg = ns16550_write_reg_mmio_32;
+ if (of_device_is_big_endian(np)) {
+ priv->read_reg = ns16550_read_reg_mmio_32be;
+ priv->write_reg = ns16550_write_reg_mmio_32be;
+ } else {
+ priv->read_reg = ns16550_read_reg_mmio_32;
+ priv->write_reg = ns16550_write_reg_mmio_32;
+ }
break;
default:
dev_err(dev, "unsupported reg-io-width (%d)\n",
--
2.11.0
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^ permalink raw reply [flat|nested] 6+ messages in thread