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From: Steffen Trumtrar <s.trumtrar@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Subject: [PATCH 3/4] ARM: SoCFPGA: remove emac init code
Date: Wed, 10 Jan 2018 09:14:19 +0100	[thread overview]
Message-ID: <20180110081420.10722-3-s.trumtrar@pengutronix.de> (raw)
In-Reply-To: <20180110081420.10722-1-s.trumtrar@pengutronix.de>

There is a proper driver now that handles the PHY setup for SoCFPGA.
Get rid of the code from mach-socfpga.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/mach-socfpga/cyclone5-generic.c | 35 --------------------------------
 1 file changed, 35 deletions(-)

diff --git a/arch/arm/mach-socfpga/cyclone5-generic.c b/arch/arm/mach-socfpga/cyclone5-generic.c
index 73a8ad03b738..dfb1f49e4d36 100644
--- a/arch/arm/mach-socfpga/cyclone5-generic.c
+++ b/arch/arm/mach-socfpga/cyclone5-generic.c
@@ -161,43 +161,8 @@ static int socfpga_detect_sdram(void)
 	return 0;
 }
 
-/* Some initialization for the EMAC */
-static void socfpga_init_emac(void)
-{
-	uint32_t rst, val;
-
-	/* No need for this without network support, e.g. xloader build */
-	if (!IS_ENABLED(CONFIG_NET))
-		return;
-
-	/* According to Cyclone V datasheet, 17-60 "EMAC HPS Interface
-	 * Initialization", changing PHYSEL should be done with EMAC in reset
-	 * via permodrst.  */
-
-	/* Everything, except L4WD0/1, is out of reset via socfpga_lowlevel_init() */
-	rst = readl(CYCLONE5_RSTMGR_ADDRESS + RESET_MGR_PER_MOD_RESET_OFS);
-	rst |= RSTMGR_PERMODRST_EMAC0 | RSTMGR_PERMODRST_EMAC1;
-	writel(rst, CYCLONE5_RSTMGR_ADDRESS + RESET_MGR_PER_MOD_RESET_OFS);
-
-	/* Set emac0/1 PHY interface select to RGMII.  We could read phy-mode
-	 * from the device tree, if it was desired to support interfaces other
-	 * than RGMII. */
-	val = readl(CONFIG_SYSMGR_EMAC_CTRL);
-	val &= ~(SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << SYSMGR_EMACGRP_CTRL_PHYSEL0_LSB);
-	val &= ~(SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << SYSMGR_EMACGRP_CTRL_PHYSEL1_LSB);
-	val |= SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII << SYSMGR_EMACGRP_CTRL_PHYSEL0_LSB;
-	val |= SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII << SYSMGR_EMACGRP_CTRL_PHYSEL1_LSB;
-	writel(val, CONFIG_SYSMGR_EMAC_CTRL);
-
-	/* Take emac0 and emac1 out of reset */
-	rst &= ~(RSTMGR_PERMODRST_EMAC0 | RSTMGR_PERMODRST_EMAC1);
-	writel(rst, CYCLONE5_RSTMGR_ADDRESS + RESET_MGR_PER_MOD_RESET_OFS);
-}
-
 static int socfpga_init(void)
 {
-	socfpga_init_emac();
-
 	writel(SYSMGR_SDMMC_CTRL_DRVSEL(3) | SYSMGR_SDMMC_CTRL_SMPLSEL(0),
 		SYSMGR_SDMMCGRP_CTRL_REG);
 
-- 
2.11.0


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  parent reply	other threads:[~2018-01-10  8:15 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-10  8:14 [PATCH 1/4] net: designware: move probe to generic driver Steffen Trumtrar
2018-01-10  8:14 ` [PATCH 2/4] net: add SoCFPGA-specific designware driver Steffen Trumtrar
2018-01-10  8:14 ` Steffen Trumtrar [this message]
2018-01-10  8:14 ` [PATCH 4/4] net: designware: add warning for drvdata Steffen Trumtrar
2018-01-11  8:34 ` [PATCH 1/4] net: designware: move probe to generic driver Sascha Hauer

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