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From: Sascha Hauer <s.hauer@pengutronix.de>
To: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH 1/2] i.MX: Fix MX7_UART2_BASE_ADDR
Date: Thu, 11 Jan 2018 09:43:20 +0100	[thread overview]
Message-ID: <20180111084320.zamxlmynpibcyesa@pengutronix.de> (raw)
In-Reply-To: <20180110163115.16226-1-andrew.smirnov@gmail.com>

On Wed, Jan 10, 2018 at 08:31:14AM -0800, Andrey Smirnov wrote:
> Despite what the Reference Manual says, experiment on i.MX7 SabreSD
> shows that that UART2's base is located at offset 0x90000. This is
> also corroborated by the offset used in dts/src/arm/imx7s.dtsi in
> uart2.
> 
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> ---
>  arch/arm/mach-imx/include/mach/imx7-regs.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Applied, thanks

Sascha

> 
> diff --git a/arch/arm/mach-imx/include/mach/imx7-regs.h b/arch/arm/mach-imx/include/mach/imx7-regs.h
> index 8774c32d7..8625d0b61 100644
> --- a/arch/arm/mach-imx/include/mach/imx7-regs.h
> +++ b/arch/arm/mach-imx/include/mach/imx7-regs.h
> @@ -78,7 +78,7 @@
>  #define MX7_ECSPI2_BASE_ADDR		(MX7_AIPS3_BASE_ADDR + 0x30000)
>  #define MX7_ECSPI3_BASE_ADDR		(MX7_AIPS3_BASE_ADDR + 0x40000)
>  #define MX7_UART1_BASE_ADDR		(MX7_AIPS3_BASE_ADDR + 0x60000)
> -#define MX7_UART2_BASE_ADDR		(MX7_AIPS3_BASE_ADDR + 0x70000)
> +#define MX7_UART2_BASE_ADDR		(MX7_AIPS3_BASE_ADDR + 0x90000)
>  #define MX7_UART3_BASE_ADDR		(MX7_AIPS3_BASE_ADDR + 0x80000)
>  #define MX7_SAI1_BASE_ADDR		(MX7_AIPS3_BASE_ADDR + 0xA0000)
>  #define MX7_SAI2_BASE_ADDR		(MX7_AIPS3_BASE_ADDR + 0xB0000)
> -- 
> 2.14.3
> 
> 
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> 

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      parent reply	other threads:[~2018-01-11  8:43 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-10 16:31 Andrey Smirnov
2018-01-10 16:31 ` [PATCH 2/2] i.MX7: Add CCM definitions for UART2 Andrey Smirnov
2018-01-11  8:43 ` Sascha Hauer [this message]

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