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* [PATCH 1/2] i.MX: Fix MX7_UART2_BASE_ADDR
@ 2018-01-10 16:31 Andrey Smirnov
  2018-01-10 16:31 ` [PATCH 2/2] i.MX7: Add CCM definitions for UART2 Andrey Smirnov
  2018-01-11  8:43 ` [PATCH 1/2] i.MX: Fix MX7_UART2_BASE_ADDR Sascha Hauer
  0 siblings, 2 replies; 3+ messages in thread
From: Andrey Smirnov @ 2018-01-10 16:31 UTC (permalink / raw)
  To: barebox; +Cc: Andrey Smirnov

Despite what the Reference Manual says, experiment on i.MX7 SabreSD
shows that that UART2's base is located at offset 0x90000. This is
also corroborated by the offset used in dts/src/arm/imx7s.dtsi in
uart2.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/mach-imx/include/mach/imx7-regs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/include/mach/imx7-regs.h b/arch/arm/mach-imx/include/mach/imx7-regs.h
index 8774c32d7..8625d0b61 100644
--- a/arch/arm/mach-imx/include/mach/imx7-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx7-regs.h
@@ -78,7 +78,7 @@
 #define MX7_ECSPI2_BASE_ADDR		(MX7_AIPS3_BASE_ADDR + 0x30000)
 #define MX7_ECSPI3_BASE_ADDR		(MX7_AIPS3_BASE_ADDR + 0x40000)
 #define MX7_UART1_BASE_ADDR		(MX7_AIPS3_BASE_ADDR + 0x60000)
-#define MX7_UART2_BASE_ADDR		(MX7_AIPS3_BASE_ADDR + 0x70000)
+#define MX7_UART2_BASE_ADDR		(MX7_AIPS3_BASE_ADDR + 0x90000)
 #define MX7_UART3_BASE_ADDR		(MX7_AIPS3_BASE_ADDR + 0x80000)
 #define MX7_SAI1_BASE_ADDR		(MX7_AIPS3_BASE_ADDR + 0xA0000)
 #define MX7_SAI2_BASE_ADDR		(MX7_AIPS3_BASE_ADDR + 0xB0000)
-- 
2.14.3


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end of thread, other threads:[~2018-01-11  8:43 UTC | newest]

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2018-01-10 16:31 [PATCH 1/2] i.MX: Fix MX7_UART2_BASE_ADDR Andrey Smirnov
2018-01-10 16:31 ` [PATCH 2/2] i.MX7: Add CCM definitions for UART2 Andrey Smirnov
2018-01-11  8:43 ` [PATCH 1/2] i.MX: Fix MX7_UART2_BASE_ADDR Sascha Hauer

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