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From: Sascha Hauer <s.hauer@pengutronix.de>
To: Juergen Borleis <jbe@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH] ARM/i.MX53: fix SDRAM setup routines
Date: Thu, 22 Feb 2018 09:07:52 +0100	[thread overview]
Message-ID: <20180222080752.yaae26pawgeqo7bo@pengutronix.de> (raw)
In-Reply-To: <20180221153910.24653-1-jbe@pengutronix.de>

On Wed, Feb 21, 2018 at 04:39:10PM +0100, Juergen Borleis wrote:
> Fix setup of the SDRAM's MR0 register: 'val' gets overwritten by the chip
> select decision and nothing is written to the MR0 register.
> 
> This fix is required since some i.MX53 based platforms still use this
> software setup routine to configure their SDRAMs.
> 
> Signed-off-by: Juergen Borleis <jbe@pengutronix.de>
> ---
>  arch/arm/mach-imx/esdctl-v4.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Applied, thanks

Sascha

> 
> diff --git a/arch/arm/mach-imx/esdctl-v4.c b/arch/arm/mach-imx/esdctl-v4.c
> index 0652b492e..6de4a8d6e 100644
> --- a/arch/arm/mach-imx/esdctl-v4.c
> +++ b/arch/arm/mach-imx/esdctl-v4.c
> @@ -191,9 +191,9 @@ void imx_esdctlv4_start_ddr3_sdram(int cs)
>  		ESDCTL_V4_DDR3_REG_MR0 | val_cs1;
>  
>  	if (cs)
> -		val = ESDCTL_V4_ESDSCR_DLL_RST1;
> +		val |= ESDCTL_V4_ESDSCR_DLL_RST1;
>  	else
> -		val = ESDCTL_V4_ESDSCR_DLL_RST0;
> +		val |= ESDCTL_V4_ESDSCR_DLL_RST0;
>  
>  	writel(val, base + ESDCTL_V4_ESDSCR);
>  
> -- 
> 2.16.1
> 
> 
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

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      reply	other threads:[~2018-02-22  8:08 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-21 15:39 Juergen Borleis
2018-02-22  8:07 ` Sascha Hauer [this message]

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