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* [PATCH] ARM/i.MX53: fix SDRAM setup routines
@ 2018-02-21 15:39 Juergen Borleis
  2018-02-22  8:07 ` Sascha Hauer
  0 siblings, 1 reply; 2+ messages in thread
From: Juergen Borleis @ 2018-02-21 15:39 UTC (permalink / raw)
  To: barebox

Fix setup of the SDRAM's MR0 register: 'val' gets overwritten by the chip
select decision and nothing is written to the MR0 register.

This fix is required since some i.MX53 based platforms still use this
software setup routine to configure their SDRAMs.

Signed-off-by: Juergen Borleis <jbe@pengutronix.de>
---
 arch/arm/mach-imx/esdctl-v4.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-imx/esdctl-v4.c b/arch/arm/mach-imx/esdctl-v4.c
index 0652b492e..6de4a8d6e 100644
--- a/arch/arm/mach-imx/esdctl-v4.c
+++ b/arch/arm/mach-imx/esdctl-v4.c
@@ -191,9 +191,9 @@ void imx_esdctlv4_start_ddr3_sdram(int cs)
 		ESDCTL_V4_DDR3_REG_MR0 | val_cs1;
 
 	if (cs)
-		val = ESDCTL_V4_ESDSCR_DLL_RST1;
+		val |= ESDCTL_V4_ESDSCR_DLL_RST1;
 	else
-		val = ESDCTL_V4_ESDSCR_DLL_RST0;
+		val |= ESDCTL_V4_ESDSCR_DLL_RST0;
 
 	writel(val, base + ESDCTL_V4_ESDSCR);
 
-- 
2.16.1


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2018-02-21 15:39 [PATCH] ARM/i.MX53: fix SDRAM setup routines Juergen Borleis
2018-02-22  8:07 ` Sascha Hauer

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