From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH 07/14] mci: imx-esdhc: use dma mapping functions
Date: Mon, 19 Mar 2018 10:11:39 +0100 [thread overview]
Message-ID: <20180319091146.4112-8-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20180319091146.4112-1-s.hauer@pengutronix.de>
Rather than relying on the fact that addresses can be just casted
into DMA addresses use proper DMA mapping functions.
This fixes compiler warnings when we do DMA on this 32bit only device
on aarch64 SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/mci/imx-esdhc.c | 53 ++++++++++++++++++++++++-------------------------
1 file changed, 26 insertions(+), 27 deletions(-)
diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c
index b91f94b99c..8929901d4b 100644
--- a/drivers/mci/imx-esdhc.c
+++ b/drivers/mci/imx-esdhc.c
@@ -211,18 +211,14 @@ esdhc_pio_read_write(struct mci_host *mci, struct mci_data *data)
return 0;
}
-static int esdhc_setup_data(struct mci_host *mci, struct mci_data *data)
+static int esdhc_setup_data(struct mci_host *mci, struct mci_data *data,
+ dma_addr_t dma)
{
struct fsl_esdhc_host *host = to_fsl_esdhc(mci);
void __iomem *regs = host->regs;
u32 wml_value;
- if (IS_ENABLED(CONFIG_MCI_IMX_ESDHC_PIO)) {
- if (!(data->flags & MMC_DATA_READ))
- esdhc_write32(regs + SDHCI_DMA_ADDRESS, (u32)data->src);
- else
- esdhc_write32(regs + SDHCI_DMA_ADDRESS, (u32)data->dest);
- } else {
+ if (!IS_ENABLED(CONFIG_MCI_IMX_ESDHC_PIO)) {
wml_value = data->blocksize/4;
if (data->flags & MMC_DATA_READ) {
@@ -230,15 +226,14 @@ static int esdhc_setup_data(struct mci_host *mci, struct mci_data *data)
wml_value = 0x10;
esdhc_clrsetbits32(regs + IMX_SDHCI_WML, WML_RD_WML_MASK, wml_value);
- esdhc_write32(regs + SDHCI_DMA_ADDRESS, (u32)data->dest);
} else {
if (wml_value > 0x80)
wml_value = 0x80;
esdhc_clrsetbits32(regs + IMX_SDHCI_WML, WML_WR_WML_MASK,
wml_value << 16);
- esdhc_write32(regs + SDHCI_DMA_ADDRESS, (u32)data->src);
}
+ esdhc_write32(regs + SDHCI_DMA_ADDRESS, dma);
}
esdhc_write32(regs + SDHCI_BLOCK_SIZE__BLOCK_COUNT, data->blocks << 16 | data->blocksize);
@@ -250,7 +245,6 @@ static int esdhc_do_data(struct mci_host *mci, struct mci_data *data)
{
struct fsl_esdhc_host *host = to_fsl_esdhc(mci);
void __iomem *regs = host->regs;
- unsigned int num_bytes = data->blocks * data->blocksize;
u32 irqstat;
if (IS_ENABLED(CONFIG_MCI_IMX_ESDHC_PIO))
@@ -267,13 +261,6 @@ static int esdhc_do_data(struct mci_host *mci, struct mci_data *data)
} while (!(irqstat & IRQSTAT_TC) &&
(esdhc_read32(regs + SDHCI_PRESENT_STATE) & PRSSTAT_DLA));
- if (data->flags & MMC_DATA_WRITE)
- dma_sync_single_for_cpu((unsigned long)data->src,
- num_bytes, DMA_TO_DEVICE);
- else
- dma_sync_single_for_cpu((unsigned long)data->dest,
- num_bytes, DMA_FROM_DEVICE);
-
return 0;
}
@@ -290,6 +277,9 @@ esdhc_send_cmd(struct mci_host *mci, struct mci_cmd *cmd, struct mci_data *data)
void __iomem *regs = host->regs;
unsigned int num_bytes = 0;
int ret;
+ void *ptr;
+ enum dma_data_direction dir = 0;
+ dma_addr_t dma = 0;
esdhc_write32(regs + SDHCI_INT_STATUS, -1);
@@ -300,19 +290,25 @@ esdhc_send_cmd(struct mci_host *mci, struct mci_cmd *cmd, struct mci_data *data)
if (data) {
int err;
- err = esdhc_setup_data(mci, data);
- if(err)
- return err;
+ if (!IS_ENABLED(CONFIG_MCI_IMX_ESDHC_PIO)) {
+ num_bytes = data->blocks * data->blocksize;
- num_bytes = data->blocks * data->blocksize;
+ if (data->flags & MMC_DATA_WRITE) {
+ ptr = (void *)data->src;
+ dir = DMA_TO_DEVICE;
+ } else {
+ ptr = data->dest;
+ dir = DMA_FROM_DEVICE;
+ }
- if (data->flags & MMC_DATA_WRITE)
- dma_sync_single_for_device((unsigned long)data->src,
- num_bytes, DMA_TO_DEVICE);
- else
- dma_sync_single_for_device((unsigned long)data->dest,
- num_bytes, DMA_FROM_DEVICE);
+ dma = dma_map_single(host->dev, ptr, num_bytes, dir);
+ if (dma_mapping_error(host->dev, dma))
+ return -EIO;
+ }
+ err = esdhc_setup_data(mci, data, dma);
+ if(err)
+ return err;
}
/* Figure out the transfer arguments */
@@ -383,6 +379,9 @@ esdhc_send_cmd(struct mci_host *mci, struct mci_cmd *cmd, struct mci_data *data)
ret = esdhc_do_data(mci, data);
if (ret)
return ret;
+
+ if (!IS_ENABLED(CONFIG_MCI_IMX_ESDHC_PIO))
+ dma_unmap_single(host->dev, dma, num_bytes, dir);
}
esdhc_write32(regs + SDHCI_INT_STATUS, -1);
--
2.16.1
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next prev parent reply other threads:[~2018-03-19 9:12 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-19 9:11 [PATCH 00/14] ARM: i.MX8MQ and EVK support Sascha Hauer
2018-03-19 9:11 ` [PATCH 01/14] ARM: i.MX: xload: Fix compiler warning Sascha Hauer
2018-03-19 9:11 ` [PATCH 02/14] ARM: i.MX: compile arm32 specific errata only for CPU32 Sascha Hauer
2018-03-19 9:11 ` [PATCH 03/14] ARM: Add i.MX8 support Sascha Hauer
2018-03-19 9:11 ` [PATCH 04/14] aarch64: Add i.MX8 debug UART support Sascha Hauer
2018-03-19 9:11 ` [PATCH 05/14] Include our own include/dt-bindings Sascha Hauer
2018-03-19 9:11 ` [PATCH 06/14] ARM: i.MX8: Add i.MX8mq EVK support Sascha Hauer
2018-03-19 9:11 ` Sascha Hauer [this message]
2018-03-19 9:11 ` [PATCH 08/14] net: fec_imx: remove unnecessary DMA sync ops Sascha Hauer
2018-03-19 9:11 ` [PATCH 09/14] net: fec_imx: Use dma mapping functions Sascha Hauer
2018-03-19 9:11 ` [PATCH 10/14] clock: Add i.MX8MQ clock driver Sascha Hauer
2018-03-19 9:11 ` [PATCH 11/14] serial: i.MX: Add i.MX8 support Sascha Hauer
2018-03-19 9:11 ` [PATCH 12/14] mmc: i.MX esdhc: " Sascha Hauer
2018-03-19 9:11 ` [PATCH 13/14] gpio: i.MX: Add i.MX8mq support Sascha Hauer
2018-03-19 9:11 ` [PATCH 14/14] ARM: i.MX: ocotp: Add i.MX8MQ support Sascha Hauer
2018-03-21 5:41 ` [PATCH 00/14] ARM: i.MX8MQ and EVK support Andrey Smirnov
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