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From: Sam Ravnborg <sam@ravnborg.org>
To: Lucas Stach <l.stach@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH v2 02/10] ARM: safely switch from HYP to SVC mode if required
Date: Sat, 24 Mar 2018 11:06:03 +0100	[thread overview]
Message-ID: <20180324100603.GA3784@ravnborg.org> (raw)
In-Reply-To: <20180323231422.21137-2-l.stach@pengutronix.de>

On Sat, Mar 24, 2018 at 12:14:14AM +0100, Lucas Stach wrote:
> This is a port of the Linux safe_svcmode_maskall macro to
> the Barebox lowlevel init.
> 
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
>  arch/arm/cpu/lowlevel.S       | 20 ++++++++++++++++----
>  arch/arm/include/asm/system.h | 26 ++++++++++++++++++++++++++
>  2 files changed, 42 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/cpu/lowlevel.S b/arch/arm/cpu/lowlevel.S
> index 7696a198e764..194ce0e7c274 100644
> --- a/arch/arm/cpu/lowlevel.S
> +++ b/arch/arm/cpu/lowlevel.S
> @@ -1,16 +1,28 @@
>  #include <linux/linkage.h>
>  #include <init.h>
>  #include <asm/system.h>
> +#include <asm/opcodes-virt.h>
>  
>  .section ".text_bare_init_","ax"
>  ENTRY(arm_cpu_lowlevel_init)
>  	/* save lr, since it may be banked away with a processor mode change */
>  	mov	r2, lr
> +
>  	/* set the cpu to SVC32 mode, mask irq and fiq */
> -	mrs	r12, cpsr
> -	bic	r12, r12, #0x1f
> -	orr	r12, r12, #0xd3
> -	msr	cpsr, r12
> +	mrs	r12 , cpsr
                   ^ extra space

> +	eor	r12, r12, #HYP_MODE
> +	tst	r12, #MODE_MASK
> +	bic	r12 , r12 , #MODE_MASK
                   ^ extra space
> +	orr	r12 , r12 , #(PSR_I_BIT | PSR_F_BIT | SVC_MODE)
                   ^extra sapce
> +THUMB(	orr	r12 , r12 , #PSR_T_BIT	)
                           ^ extra space

If there is a "rule" about the extra space then I have missed it

	Sam

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  reply	other threads:[~2018-03-24 10:08 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-23 23:14 [PATCH v2 01/10] ARM: import opcode helpers from Linux kernel Lucas Stach
2018-03-23 23:14 ` [PATCH v2 02/10] ARM: safely switch from HYP to SVC mode if required Lucas Stach
2018-03-24 10:06   ` Sam Ravnborg [this message]
2018-03-23 23:14 ` [PATCH v2 03/10] ARM: allow secure monitor code to be built without PSCI Lucas Stach
2018-03-23 23:14 ` [PATCH v2 04/10] ARM: add file for HYP mode related setup Lucas Stach
2018-03-24 10:10   ` Sam Ravnborg
2018-03-23 23:14 ` [PATCH v2 05/10] ARM: don't try to install secure monitor when entered in HYP mode Lucas Stach
2018-03-23 23:14 ` [PATCH v2 06/10] ARM: default to starting kernel in HYP mode when entered in HYP Lucas Stach
2018-03-23 23:14 ` [PATCH v2 07/10] ARM: install HYP vectors at PBL and Barebox entry Lucas Stach
2018-03-23 23:14 ` [PATCH v2 08/10] ARM: rpi: add revision IDs for Pi 3 Model B and Pi Zero Lucas Stach
2018-03-24 10:13   ` Sam Ravnborg
2018-03-23 23:14 ` [PATCH v2 09/10] ARM: rpi: add raspberry pi 3 support Lucas Stach
2018-03-23 23:14 ` [PATCH v2 10/10] ARM: rpi: autosize malloc area Lucas Stach
2018-03-26 10:06 ` [PATCH v2 01/10] ARM: import opcode helpers from Linux kernel Roland Hieber

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