* [PATCH 01/10] ARM: i.MX: esdctl: Use IOMEM instead of (void *)
2018-04-10 23:53 [PATCH 00/10] Vybrid MMDC support and misc ESDCTL fixes Andrey Smirnov
@ 2018-04-10 23:53 ` Andrey Smirnov
2018-04-10 23:53 ` [PATCH 02/10] ARM: i.MX51: esdctl: Replace magic value with ESDMISC_DDR2_8_BANK Andrey Smirnov
` (9 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Andrey Smirnov @ 2018-04-10 23:53 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/esdctl.c | 42 +++++++++++++++++++++---------------------
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
index 1eebc77b6..895761e73 100644
--- a/arch/arm/mach-imx/esdctl.c
+++ b/arch/arm/mach-imx/esdctl.c
@@ -498,9 +498,9 @@ void __noreturn imx1_barebox_entry(void *boarddata)
unsigned long base, size;
upper_or_coalesced_range(MX1_CSD0_BASE_ADDR,
- imx_v1_sdram_size((void *)MX1_SDRAMC_BASE_ADDR, 0),
+ imx_v1_sdram_size(IOMEM(MX1_SDRAMC_BASE_ADDR), 0),
MX1_CSD1_BASE_ADDR,
- imx_v1_sdram_size((void *)MX1_SDRAMC_BASE_ADDR, 1),
+ imx_v1_sdram_size(IOMEM(MX1_SDRAMC_BASE_ADDR), 1),
&base, &size);
barebox_arm_entry(base, size, boarddata);
@@ -511,9 +511,9 @@ void __noreturn imx25_barebox_entry(void *boarddata)
unsigned long base, size;
upper_or_coalesced_range(MX25_CSD0_BASE_ADDR,
- imx_v2_sdram_size((void *)MX25_ESDCTL_BASE_ADDR, 0),
+ imx_v2_sdram_size(IOMEM(MX25_ESDCTL_BASE_ADDR), 0),
MX25_CSD1_BASE_ADDR,
- imx_v2_sdram_size((void *)MX25_ESDCTL_BASE_ADDR, 1),
+ imx_v2_sdram_size(IOMEM(MX25_ESDCTL_BASE_ADDR), 1),
&base, &size);
barebox_arm_entry(base, size, boarddata);
@@ -523,12 +523,12 @@ void __noreturn imx27_barebox_entry(void *boarddata)
{
unsigned long base, size;
- imx_esdctl_v2_disable_default((void *)MX27_ESDCTL_BASE_ADDR);
+ imx_esdctl_v2_disable_default(IOMEM(MX27_ESDCTL_BASE_ADDR));
upper_or_coalesced_range(MX27_CSD0_BASE_ADDR,
- imx_v2_sdram_size((void *)MX27_ESDCTL_BASE_ADDR, 0),
+ imx_v2_sdram_size(IOMEM(MX27_ESDCTL_BASE_ADDR), 0),
MX27_CSD1_BASE_ADDR,
- imx_v2_sdram_size((void *)MX27_ESDCTL_BASE_ADDR, 1),
+ imx_v2_sdram_size(IOMEM(MX27_ESDCTL_BASE_ADDR), 1),
&base, &size);
barebox_arm_entry(base, size, boarddata);
@@ -538,12 +538,12 @@ void __noreturn imx31_barebox_entry(void *boarddata)
{
unsigned long base, size;
- imx_esdctl_v2_disable_default((void *)MX31_ESDCTL_BASE_ADDR);
+ imx_esdctl_v2_disable_default(IOMEM(MX31_ESDCTL_BASE_ADDR));
upper_or_coalesced_range(MX31_CSD0_BASE_ADDR,
- imx_v2_sdram_size((void *)MX31_ESDCTL_BASE_ADDR, 0),
+ imx_v2_sdram_size(IOMEM(MX31_ESDCTL_BASE_ADDR), 0),
MX31_CSD1_BASE_ADDR,
- imx_v2_sdram_size((void *)MX31_ESDCTL_BASE_ADDR, 1),
+ imx_v2_sdram_size(IOMEM(MX31_ESDCTL_BASE_ADDR), 1),
&base, &size);
barebox_arm_entry(base, size, boarddata);
@@ -553,12 +553,12 @@ void __noreturn imx35_barebox_entry(void *boarddata)
{
unsigned long base, size;
- imx_esdctl_v2_disable_default((void *)MX35_ESDCTL_BASE_ADDR);
+ imx_esdctl_v2_disable_default(IOMEM(MX35_ESDCTL_BASE_ADDR));
upper_or_coalesced_range(MX35_CSD0_BASE_ADDR,
- imx_v2_sdram_size((void *)MX35_ESDCTL_BASE_ADDR, 0),
+ imx_v2_sdram_size(IOMEM(MX35_ESDCTL_BASE_ADDR), 0),
MX35_CSD1_BASE_ADDR,
- imx_v2_sdram_size((void *)MX35_ESDCTL_BASE_ADDR, 1),
+ imx_v2_sdram_size(IOMEM(MX35_ESDCTL_BASE_ADDR), 1),
&base, &size);
barebox_arm_entry(base, size, boarddata);
@@ -569,9 +569,9 @@ void __noreturn imx51_barebox_entry(void *boarddata)
unsigned long base, size;
upper_or_coalesced_range(MX51_CSD0_BASE_ADDR,
- imx_v3_sdram_size((void *)MX51_ESDCTL_BASE_ADDR, 0),
+ imx_v3_sdram_size(IOMEM(MX51_ESDCTL_BASE_ADDR), 0),
MX51_CSD1_BASE_ADDR,
- imx_v3_sdram_size((void *)MX51_ESDCTL_BASE_ADDR, 1),
+ imx_v3_sdram_size(IOMEM(MX51_ESDCTL_BASE_ADDR), 1),
&base, &size);
barebox_arm_entry(base, size, boarddata);
@@ -582,9 +582,9 @@ void __noreturn imx53_barebox_entry(void *boarddata)
unsigned long base, size;
upper_or_coalesced_range(MX53_CSD0_BASE_ADDR,
- imx_v4_sdram_size((void *)MX53_ESDCTL_BASE_ADDR, 0),
+ imx_v4_sdram_size(IOMEM(MX53_ESDCTL_BASE_ADDR), 0),
MX53_CSD1_BASE_ADDR,
- imx_v4_sdram_size((void *)MX53_ESDCTL_BASE_ADDR, 1),
+ imx_v4_sdram_size(IOMEM(MX53_ESDCTL_BASE_ADDR), 1),
&base, &size);
barebox_arm_entry(base, size, boarddata);
@@ -592,8 +592,8 @@ void __noreturn imx53_barebox_entry(void *boarddata)
void __noreturn imx6q_barebox_entry(void *boarddata)
{
- u64 size_cs0 = imx6_mmdc_sdram_size((void *)MX6_MMDC_P0_BASE_ADDR, 0);
- u64 size_cs1 = imx6_mmdc_sdram_size((void *)MX6_MMDC_P0_BASE_ADDR, 1);
+ u64 size_cs0 = imx6_mmdc_sdram_size(IOMEM(MX6_MMDC_P0_BASE_ADDR), 0);
+ u64 size_cs1 = imx6_mmdc_sdram_size(IOMEM(MX6_MMDC_P0_BASE_ADDR), 1);
u64 total = size_cs0 + size_cs1;
resource_size_t size = min(total, (u64)IMX6_MAX_SDRAM_SIZE);
@@ -603,8 +603,8 @@ void __noreturn imx6q_barebox_entry(void *boarddata)
void __noreturn imx6ul_barebox_entry(void *boarddata)
{
- u64 size_cs0 = imx6_mmdc_sdram_size((void *)MX6_MMDC_P0_BASE_ADDR, 0);
- u64 size_cs1 = imx6_mmdc_sdram_size((void *)MX6_MMDC_P0_BASE_ADDR, 1);
+ u64 size_cs0 = imx6_mmdc_sdram_size(IOMEM(MX6_MMDC_P0_BASE_ADDR), 0);
+ u64 size_cs1 = imx6_mmdc_sdram_size(IOMEM(MX6_MMDC_P0_BASE_ADDR), 1);
u64 total = size_cs0 + size_cs1;
resource_size_t size = min(total, (u64)IMX6_MAX_SDRAM_SIZE);
--
2.14.3
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barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 02/10] ARM: i.MX51: esdctl: Replace magic value with ESDMISC_DDR2_8_BANK
2018-04-10 23:53 [PATCH 00/10] Vybrid MMDC support and misc ESDCTL fixes Andrey Smirnov
2018-04-10 23:53 ` [PATCH 01/10] ARM: i.MX: esdctl: Use IOMEM instead of (void *) Andrey Smirnov
@ 2018-04-10 23:53 ` Andrey Smirnov
2018-04-10 23:53 ` [PATCH 03/10] ARM: i.MX6: esdctl: Share memory size calculation code Andrey Smirnov
` (8 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Andrey Smirnov @ 2018-04-10 23:53 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/esdctl.c | 2 +-
arch/arm/mach-imx/include/mach/esdctl.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
index 895761e73..1d6fa2995 100644
--- a/arch/arm/mach-imx/esdctl.c
+++ b/arch/arm/mach-imx/esdctl.c
@@ -120,7 +120,7 @@ static inline unsigned long imx_v3_sdram_size(void __iomem *esdctlbase, int num)
size = imx_v2_sdram_size(esdctlbase, num);
- if (readl(esdctlbase + IMX_ESDMISC) & (1 << 6))
+ if (readl(esdctlbase + IMX_ESDMISC) & ESDMISC_DDR2_8_BANK)
size *= 2;
if (size > SZ_256M)
diff --git a/arch/arm/mach-imx/include/mach/esdctl.h b/arch/arm/mach-imx/include/mach/esdctl.h
index 66dcc8974..53710b0f2 100644
--- a/arch/arm/mach-imx/include/mach/esdctl.h
+++ b/arch/arm/mach-imx/include/mach/esdctl.h
@@ -48,6 +48,7 @@
#define ESDMISC_MDDR_MDIS 0x00000010
#define ESDMISC_LHD 0x00000020
#define ESDMISC_SDRAMRDY 0x80000000
+#define ESDMISC_DDR2_8_BANK BIT(6)
#define ESDCFGx_tXP_MASK 0x00600000
#define ESDCFGx_tXP_1 0x00000000
--
2.14.3
_______________________________________________
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barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 03/10] ARM: i.MX6: esdctl: Share memory size calculation code
2018-04-10 23:53 [PATCH 00/10] Vybrid MMDC support and misc ESDCTL fixes Andrey Smirnov
2018-04-10 23:53 ` [PATCH 01/10] ARM: i.MX: esdctl: Use IOMEM instead of (void *) Andrey Smirnov
2018-04-10 23:53 ` [PATCH 02/10] ARM: i.MX51: esdctl: Replace magic value with ESDMISC_DDR2_8_BANK Andrey Smirnov
@ 2018-04-10 23:53 ` Andrey Smirnov
2018-04-10 23:53 ` [PATCH 04/10] ARM: i.MX6: esdctl: Factor out common code in imx6*_barebox_entry() Andrey Smirnov
` (7 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Andrey Smirnov @ 2018-04-10 23:53 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Code for calculating total amount of memory found in
imx6_mmdc_add_mem(), imx6q_barebox_entry() and imx6ul_barebox_entry()
is exaclty the same, so refactor the code to avoid duplication.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/esdctl.c | 35 ++++++++++++++++-------------------
1 file changed, 16 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
index 1d6fa2995..a7114effa 100644
--- a/arch/arm/mach-imx/esdctl.c
+++ b/arch/arm/mach-imx/esdctl.c
@@ -171,7 +171,7 @@ static inline unsigned long imx_v4_sdram_size(void __iomem *esdctlbase, int cs)
* MMDC - found on i.MX6
*/
-static inline u64 imx6_mmdc_sdram_size(void __iomem *mmdcbase, int cs)
+static inline u64 __imx6_mmdc_sdram_size(void __iomem *mmdcbase, int cs)
{
u32 ctlval = readl(mmdcbase + MDCTL);
u32 mdmisc = readl(mmdcbase + MDMISC);
@@ -286,7 +286,7 @@ static void imx_esdctl_v4_add_mem(void *esdctlbase, struct imx_esdctl_data *data
*/
#define IMX6_MAX_SDRAM_SIZE 0xF0000000
-static void imx6_mmdc_add_mem(void *mmdcbase, struct imx_esdctl_data *data)
+static inline resource_size_t imx6_mmdc_sdram_size(void __iomem *mmdcbase)
{
/*
* It is possible to have a configuration in which both chip
@@ -296,14 +296,19 @@ static void imx6_mmdc_add_mem(void *mmdcbase, struct imx_esdctl_data *data)
* IMX6_MAX_SDRAM_SIZE bytes of memory available.
*/
- u64 size_cs0 = imx6_mmdc_sdram_size(mmdcbase, 0);
- u64 size_cs1 = imx6_mmdc_sdram_size(mmdcbase, 1);
+ u64 size_cs0 = __imx6_mmdc_sdram_size(mmdcbase, 0);
+ u64 size_cs1 = __imx6_mmdc_sdram_size(mmdcbase, 1);
u64 total = size_cs0 + size_cs1;
resource_size_t size = min(total, (u64)IMX6_MAX_SDRAM_SIZE);
+ return size;
+}
+
+static void imx6_mmdc_add_mem(void *mmdcbase, struct imx_esdctl_data *data)
+{
arm_add_mem_device("ram0", data->base0,
- size);
+ imx6_mmdc_sdram_size(mmdcbase));
}
static int imx_esdctl_probe(struct device_d *dev)
@@ -592,22 +597,14 @@ void __noreturn imx53_barebox_entry(void *boarddata)
void __noreturn imx6q_barebox_entry(void *boarddata)
{
- u64 size_cs0 = imx6_mmdc_sdram_size(IOMEM(MX6_MMDC_P0_BASE_ADDR), 0);
- u64 size_cs1 = imx6_mmdc_sdram_size(IOMEM(MX6_MMDC_P0_BASE_ADDR), 1);
- u64 total = size_cs0 + size_cs1;
-
- resource_size_t size = min(total, (u64)IMX6_MAX_SDRAM_SIZE);
-
- barebox_arm_entry(0x10000000, size, boarddata);
+ barebox_arm_entry(0x10000000,
+ imx6_mmdc_sdram_size(IOMEM(MX6_MMDC_P0_BASE_ADDR)),
+ boarddata);
}
void __noreturn imx6ul_barebox_entry(void *boarddata)
{
- u64 size_cs0 = imx6_mmdc_sdram_size(IOMEM(MX6_MMDC_P0_BASE_ADDR), 0);
- u64 size_cs1 = imx6_mmdc_sdram_size(IOMEM(MX6_MMDC_P0_BASE_ADDR), 1);
- u64 total = size_cs0 + size_cs1;
-
- resource_size_t size = min(total, (u64)IMX6_MAX_SDRAM_SIZE);
-
- barebox_arm_entry(0x80000000, size, boarddata);
+ barebox_arm_entry(0x80000000,
+ imx6_mmdc_sdram_size(IOMEM(MX6_MMDC_P0_BASE_ADDR)),
+ boarddata);
}
--
2.14.3
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 04/10] ARM: i.MX6: esdctl: Factor out common code in imx6*_barebox_entry()
2018-04-10 23:53 [PATCH 00/10] Vybrid MMDC support and misc ESDCTL fixes Andrey Smirnov
` (2 preceding siblings ...)
2018-04-10 23:53 ` [PATCH 03/10] ARM: i.MX6: esdctl: Share memory size calculation code Andrey Smirnov
@ 2018-04-10 23:53 ` Andrey Smirnov
2018-04-10 23:53 ` [PATCH 05/10] ARM: i.MX6: esdctl: Use symbolic constants for RAM base address Andrey Smirnov
` (6 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Andrey Smirnov @ 2018-04-10 23:53 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/esdctl.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
index a7114effa..eda8184a0 100644
--- a/arch/arm/mach-imx/esdctl.c
+++ b/arch/arm/mach-imx/esdctl.c
@@ -595,16 +595,20 @@ void __noreturn imx53_barebox_entry(void *boarddata)
barebox_arm_entry(base, size, boarddata);
}
-void __noreturn imx6q_barebox_entry(void *boarddata)
+static void __noreturn
+imx6_barebox_entry(unsigned long membase, void *boarddata)
{
- barebox_arm_entry(0x10000000,
+ barebox_arm_entry(membase,
imx6_mmdc_sdram_size(IOMEM(MX6_MMDC_P0_BASE_ADDR)),
boarddata);
}
+void __noreturn imx6q_barebox_entry(void *boarddata)
+{
+ imx6_barebox_entry(0x10000000, boarddata);
+}
+
void __noreturn imx6ul_barebox_entry(void *boarddata)
{
- barebox_arm_entry(0x80000000,
- imx6_mmdc_sdram_size(IOMEM(MX6_MMDC_P0_BASE_ADDR)),
- boarddata);
+ imx6_barebox_entry(0x80000000, boarddata);
}
--
2.14.3
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 05/10] ARM: i.MX6: esdctl: Use symbolic constants for RAM base address
2018-04-10 23:53 [PATCH 00/10] Vybrid MMDC support and misc ESDCTL fixes Andrey Smirnov
` (3 preceding siblings ...)
2018-04-10 23:53 ` [PATCH 04/10] ARM: i.MX6: esdctl: Factor out common code in imx6*_barebox_entry() Andrey Smirnov
@ 2018-04-10 23:53 ` Andrey Smirnov
2018-04-10 23:53 ` [PATCH 06/10] ARM: i.MX: esdctl: Make use of min_t() Andrey Smirnov
` (5 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Andrey Smirnov @ 2018-04-10 23:53 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Use symbolic constants for RAM base address, to do that rename
MX6_MMDC_PORT0_BASE_ADDR to MX6_MMDC_PORT01_BASE_ADDR to distinguish
it from SoCs with only one DDR controller (i.MX6UL) where port 0 will
always be at 0x80000000.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/boards/zii-imx6q-rdu2/lowlevel.c | 2 +-
arch/arm/mach-imx/esdctl.c | 8 ++++----
arch/arm/mach-imx/include/mach/imx6-regs.h | 4 +++-
3 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c b/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c
index 22ffdf85e..c9ef16ae0 100644
--- a/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c
+++ b/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c
@@ -304,7 +304,7 @@ ENTRY_FUNCTION(start_imx6_zii_rdu2, r0, r1, r2)
* When still running in SRAM, we need to setup the DRAM now and load
* the remaining image.
*/
- if (get_pc() < MX6_MMDC_PORT0_BASE_ADDR)
+ if (get_pc() < MX6_MMDC_PORT01_BASE_ADDR)
rdu2_sram_setup();
if (__imx6_cpu_revision() == IMX_CHIP_REV_2_0)
diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
index eda8184a0..3cd7c5738 100644
--- a/arch/arm/mach-imx/esdctl.c
+++ b/arch/arm/mach-imx/esdctl.c
@@ -378,12 +378,12 @@ static __maybe_unused struct imx_esdctl_data imx53_data = {
};
static __maybe_unused struct imx_esdctl_data imx6q_data = {
- .base0 = MX6_MMDC_PORT0_BASE_ADDR,
+ .base0 = MX6_MMDC_PORT01_BASE_ADDR,
.add_mem = imx6_mmdc_add_mem,
};
static __maybe_unused struct imx_esdctl_data imx6ul_data = {
- .base0 = 0x80000000,
+ .base0 = MX6_MMDC_PORT0_BASE_ADDR,
.add_mem = imx6_mmdc_add_mem,
};
@@ -605,10 +605,10 @@ imx6_barebox_entry(unsigned long membase, void *boarddata)
void __noreturn imx6q_barebox_entry(void *boarddata)
{
- imx6_barebox_entry(0x10000000, boarddata);
+ imx6_barebox_entry(MX6_MMDC_PORT01_BASE_ADDR, boarddata);
}
void __noreturn imx6ul_barebox_entry(void *boarddata)
{
- imx6_barebox_entry(0x80000000, boarddata);
+ imx6_barebox_entry(MX6_MMDC_PORT0_BASE_ADDR, boarddata);
}
diff --git a/arch/arm/mach-imx/include/mach/imx6-regs.h b/arch/arm/mach-imx/include/mach/imx6-regs.h
index ac2aa2109..1ba22b5bc 100644
--- a/arch/arm/mach-imx/include/mach/imx6-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx6-regs.h
@@ -117,6 +117,8 @@
#define MX6_SATA_BASE_ADDR 0x02200000
-#define MX6_MMDC_PORT0_BASE_ADDR 0x10000000
+#define MX6_MMDC_PORT01_BASE_ADDR 0x10000000
+#define MX6_MMDC_PORT0_BASE_ADDR 0x80000000
+
#endif /* __MACH_IMX6_REGS_H */
--
2.14.3
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 06/10] ARM: i.MX: esdctl: Make use of min_t()
2018-04-10 23:53 [PATCH 00/10] Vybrid MMDC support and misc ESDCTL fixes Andrey Smirnov
` (4 preceding siblings ...)
2018-04-10 23:53 ` [PATCH 05/10] ARM: i.MX6: esdctl: Use symbolic constants for RAM base address Andrey Smirnov
@ 2018-04-10 23:53 ` Andrey Smirnov
2018-04-10 23:53 ` [PATCH 07/10] ARM: i.MX: esdctl: Introduce memory_sdram_size() Andrey Smirnov
` (4 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Andrey Smirnov @ 2018-04-10 23:53 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Use min_t() instead of explicit if ().
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/esdctl.c | 15 +++------------
1 file changed, 3 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
index 3cd7c5738..a4eb3f196 100644
--- a/arch/arm/mach-imx/esdctl.c
+++ b/arch/arm/mach-imx/esdctl.c
@@ -77,10 +77,7 @@ static inline unsigned long imx_v1_sdram_size(void __iomem *esdctlbase, int num)
size = (1 << cols) * (1 << rows) * banks * width;
- if (size > SZ_64M)
- size = SZ_64M;
-
- return size;
+ return min_t(unsigned long, size, SZ_64M);
}
/*
@@ -105,10 +102,7 @@ static inline unsigned long imx_v2_sdram_size(void __iomem *esdctlbase, int num)
size = (1 << cols) * (1 << rows) * banks * width;
- if (size > SZ_256M)
- size = SZ_256M;
-
- return size;
+ return min_t(unsigned long, size, SZ_256M);
}
/*
@@ -123,10 +117,7 @@ static inline unsigned long imx_v3_sdram_size(void __iomem *esdctlbase, int num)
if (readl(esdctlbase + IMX_ESDMISC) & ESDMISC_DDR2_8_BANK)
size *= 2;
- if (size > SZ_256M)
- size = SZ_256M;
-
- return size;
+ return min_t(unsigned long, size, SZ_256M);
}
/*
--
2.14.3
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 07/10] ARM: i.MX: esdctl: Introduce memory_sdram_size()
2018-04-10 23:53 [PATCH 00/10] Vybrid MMDC support and misc ESDCTL fixes Andrey Smirnov
` (5 preceding siblings ...)
2018-04-10 23:53 ` [PATCH 06/10] ARM: i.MX: esdctl: Make use of min_t() Andrey Smirnov
@ 2018-04-10 23:53 ` Andrey Smirnov
2018-04-10 23:53 ` [PATCH 08/10] ARM: i.MX: esdctl: Add support for Vybrid's memory controller Andrey Smirnov
` (3 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Andrey Smirnov @ 2018-04-10 23:53 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Introduce memory_sdram_size() - subroutine to calculate size of SDRAM
chip base on its parameters such as # or rows, columns, banks and bus
width.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/esdctl.c | 14 ++++----------
include/memory.h | 8 ++++++++
2 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
index a4eb3f196..b8f048ee6 100644
--- a/arch/arm/mach-imx/esdctl.c
+++ b/arch/arm/mach-imx/esdctl.c
@@ -75,7 +75,7 @@ static inline unsigned long imx_v1_sdram_size(void __iomem *esdctlbase, int num)
if (ctlval & (1 << 17))
width = 4;
- size = (1 << cols) * (1 << rows) * banks * width;
+ size = memory_sdram_size(cols, rows, banks, width);
return min_t(unsigned long, size, SZ_64M);
}
@@ -100,7 +100,7 @@ static inline unsigned long imx_v2_sdram_size(void __iomem *esdctlbase, int num)
if ((ctlval & ESDCTL0_DSIZ_MASK) == ESDCTL0_DSIZ_31_0)
width = 4;
- size = (1 << cols) * (1 << rows) * banks * width;
+ size = memory_sdram_size(cols, rows, banks, width);
return min_t(unsigned long, size, SZ_256M);
}
@@ -127,7 +127,6 @@ static inline unsigned long imx_v4_sdram_size(void __iomem *esdctlbase, int cs)
{
u32 ctlval = readl(esdctlbase + ESDCTL_V4_ESDCTL0);
u32 esdmisc = readl(esdctlbase + ESDCTL_V4_ESDMISC);
- unsigned long size;
int rows, cols, width = 2, banks = 8;
if (cs == 0 && !(ctlval & ESDCTL_V4_ESDCTLx_SDE0))
@@ -153,9 +152,7 @@ static inline unsigned long imx_v4_sdram_size(void __iomem *esdctlbase, int cs)
if (esdmisc & ESDCTL_V4_ESDMISC_BANKS_4)
banks = 4;
- size = (1 << cols) * (1 << rows) * banks * width;
-
- return size;
+ return memory_sdram_size(cols, rows, banks, width);
}
/*
@@ -166,7 +163,6 @@ static inline u64 __imx6_mmdc_sdram_size(void __iomem *mmdcbase, int cs)
{
u32 ctlval = readl(mmdcbase + MDCTL);
u32 mdmisc = readl(mmdcbase + MDMISC);
- u64 size;
int rows, cols, width = 2, banks = 8;
if (cs == 0 && !(ctlval & MMDCx_MDCTL_SDE0))
@@ -192,9 +188,7 @@ static inline u64 __imx6_mmdc_sdram_size(void __iomem *mmdcbase, int cs)
if (mdmisc & MMDCx_MDMISC_DDR_4_BANKS)
banks = 4;
- size = (u64)(1 << cols) * (1 << rows) * banks * width;
-
- return size;
+ return memory_sdram_size(cols, rows, banks, width);
}
static void add_mem(unsigned long base0, unsigned long size0,
diff --git a/include/memory.h b/include/memory.h
index 56d16d20c..73ee7661e 100644
--- a/include/memory.h
+++ b/include/memory.h
@@ -32,4 +32,12 @@ void memory_bank_find_space(struct memory_bank *bank, resource_size_t *retstart,
int memory_bank_first_find_space(resource_size_t *retstart,
resource_size_t *retend);
+static inline u64 memory_sdram_size(unsigned int cols,
+ unsigned int rows,
+ unsigned int banks,
+ unsigned int width)
+{
+ return (u64)banks * width << (rows + cols);
+}
+
#endif
--
2.14.3
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* [PATCH 08/10] ARM: i.MX: esdctl: Add support for Vybrid's memory controller
2018-04-10 23:53 [PATCH 00/10] Vybrid MMDC support and misc ESDCTL fixes Andrey Smirnov
` (6 preceding siblings ...)
2018-04-10 23:53 ` [PATCH 07/10] ARM: i.MX: esdctl: Introduce memory_sdram_size() Andrey Smirnov
@ 2018-04-10 23:53 ` Andrey Smirnov
2018-04-10 23:53 ` [PATCH 09/10] i.MX: vf610-twr: Make use of vf610_barebox_entry() Andrey Smirnov
` (2 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Andrey Smirnov @ 2018-04-10 23:53 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Add code needed to dynamically detect the amount of RAM DDR controller
is configured to use as well as a simple entry function making use of
that functionality.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/dts/vf610-ddrmc.dtsi | 15 +++++++++++
arch/arm/mach-imx/esdctl.c | 38 ++++++++++++++++++++++++++++
arch/arm/mach-imx/include/mach/esdctl.h | 1 +
arch/arm/mach-imx/include/mach/vf610-ddrmc.h | 18 +++++++++++++
arch/arm/mach-imx/include/mach/vf610-regs.h | 2 ++
5 files changed, 74 insertions(+)
create mode 100644 arch/arm/dts/vf610-ddrmc.dtsi
create mode 100644 arch/arm/mach-imx/include/mach/vf610-ddrmc.h
diff --git a/arch/arm/dts/vf610-ddrmc.dtsi b/arch/arm/dts/vf610-ddrmc.dtsi
new file mode 100644
index 000000000..772131ec2
--- /dev/null
+++ b/arch/arm/dts/vf610-ddrmc.dtsi
@@ -0,0 +1,15 @@
+/*
+ * Include file to switch board DTS form using hardcoded memory node
+ * to dynamic memory size detection based on DDR controller settings
+ */
+
+/ {
+ /delete-node/ memory;
+};
+
+&aips1 {
+ ddrmc@400ae000 {
+ compatible = "fsl,vf610-ddrmc";
+ reg = <0x400ae000 0x1000>;
+ };
+};
diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
index b8f048ee6..c1680d5ff 100644
--- a/arch/arm/mach-imx/esdctl.c
+++ b/arch/arm/mach-imx/esdctl.c
@@ -37,6 +37,7 @@
#include <mach/imx51-regs.h>
#include <mach/imx53-regs.h>
#include <mach/imx6-regs.h>
+#include <mach/vf610-ddrmc.h>
struct imx_esdctl_data {
unsigned long base0;
@@ -296,6 +297,28 @@ static void imx6_mmdc_add_mem(void *mmdcbase, struct imx_esdctl_data *data)
imx6_mmdc_sdram_size(mmdcbase));
}
+static inline resource_size_t vf610_ddrmc_sdram_size(void __iomem *ddrmc)
+{
+ const u32 cr01 = readl(ddrmc + DDRMC_CR(1));
+ const u32 cr73 = readl(ddrmc + DDRMC_CR(73));
+ const u32 cr78 = readl(ddrmc + DDRMC_CR(78));
+
+ unsigned int rows, cols, width, banks;
+
+ rows = DDRMC_CR01_MAX_ROW_REG(cr01) - DDRMC_CR73_ROW_DIFF(cr73);
+ cols = DDRMC_CR01_MAX_COL_REG(cr01) - DDRMC_CR73_COL_DIFF(cr73);
+ banks = 1 << (3 - DDRMC_CR73_BANK_DIFF(cr73));
+ width = (cr78 & DDRMC_CR78_REDUC) ? sizeof(u8) : sizeof(u16);
+
+ return memory_sdram_size(cols, rows, banks, width);
+}
+
+static void vf610_ddrmc_add_mem(void *mmdcbase, struct imx_esdctl_data *data)
+{
+ arm_add_mem_device("ram0", data->base0,
+ vf610_ddrmc_sdram_size(mmdcbase));
+}
+
static int imx_esdctl_probe(struct device_d *dev)
{
struct resource *iores;
@@ -372,6 +395,11 @@ static __maybe_unused struct imx_esdctl_data imx6ul_data = {
.add_mem = imx6_mmdc_add_mem,
};
+static __maybe_unused struct imx_esdctl_data vf610_data = {
+ .base0 = VF610_RAM_BASE_ADDR,
+ .add_mem = vf610_ddrmc_add_mem,
+};
+
static struct platform_device_id imx_esdctl_ids[] = {
#ifdef CONFIG_ARCH_IMX1
{
@@ -430,6 +458,9 @@ static __maybe_unused struct of_device_id imx_esdctl_dt_ids[] = {
}, {
.compatible = "fsl,imx6q-mmdc",
.data = &imx6q_data
+ }, {
+ .compatible = "fsl,vf610-ddrmc",
+ .data = &vf610_data
}, {
/* sentinel */
}
@@ -597,3 +628,10 @@ void __noreturn imx6ul_barebox_entry(void *boarddata)
{
imx6_barebox_entry(MX6_MMDC_PORT0_BASE_ADDR, boarddata);
}
+
+void __noreturn vf610_barebox_entry(void *boarddata)
+{
+ barebox_arm_entry(VF610_RAM_BASE_ADDR,
+ vf610_ddrmc_sdram_size(IOMEM(VF610_DDR_BASE_ADDR)),
+ boarddata);
+}
diff --git a/arch/arm/mach-imx/include/mach/esdctl.h b/arch/arm/mach-imx/include/mach/esdctl.h
index 53710b0f2..117e2bbad 100644
--- a/arch/arm/mach-imx/include/mach/esdctl.h
+++ b/arch/arm/mach-imx/include/mach/esdctl.h
@@ -138,6 +138,7 @@ void __noreturn imx51_barebox_entry(void *boarddata);
void __noreturn imx53_barebox_entry(void *boarddata);
void __noreturn imx6q_barebox_entry(void *boarddata);
void __noreturn imx6ul_barebox_entry(void *boarddata);
+void __noreturn vf610_barebox_entry(void *boarddata);
void imx_esdctl_disable(void);
#endif
diff --git a/arch/arm/mach-imx/include/mach/vf610-ddrmc.h b/arch/arm/mach-imx/include/mach/vf610-ddrmc.h
new file mode 100644
index 000000000..07feb036e
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/vf610-ddrmc.h
@@ -0,0 +1,18 @@
+#ifndef __MACH_DDRMC_H
+#define __MACH_DDRMC_H
+
+#include <mach/vf610-regs.h>
+
+
+#define DDRMC_CR(x) ((x) * 4)
+
+#define DDRMC_CR01_MAX_COL_REG(reg) (((reg) >> 8) & 0b01111)
+#define DDRMC_CR01_MAX_ROW_REG(reg) (((reg) >> 0) & 0b11111)
+#define DDRMC_CR73_COL_DIFF(reg) (((reg) >> 16) & 0b00111)
+#define DDRMC_CR73_ROW_DIFF(reg) (((reg) >> 8) & 0b00011)
+#define DDRMC_CR73_BANK_DIFF(reg) (((reg) >> 0) & 0b00011)
+
+#define DDRMC_CR78_REDUC BIT(8)
+
+
+#endif /* __MACH_MMDC_H */
diff --git a/arch/arm/mach-imx/include/mach/vf610-regs.h b/arch/arm/mach-imx/include/mach/vf610-regs.h
index 8be220b68..87772ee76 100644
--- a/arch/arm/mach-imx/include/mach/vf610-regs.h
+++ b/arch/arm/mach-imx/include/mach/vf610-regs.h
@@ -13,6 +13,8 @@
#define VF610_AIPS0_BASE_ADDR 0x40000000
#define VF610_AIPS1_BASE_ADDR 0x40080000
+#define VF610_RAM_BASE_ADDR 0x80000000
+
/* AIPS 0 */
#define VF610_MSCM_BASE_ADDR (VF610_AIPS0_BASE_ADDR + 0x00001000)
#define VF610_MSCM_IR_BASE_ADDR (VF610_AIPS0_BASE_ADDR + 0x00001800)
--
2.14.3
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 09/10] i.MX: vf610-twr: Make use of vf610_barebox_entry()
2018-04-10 23:53 [PATCH 00/10] Vybrid MMDC support and misc ESDCTL fixes Andrey Smirnov
` (7 preceding siblings ...)
2018-04-10 23:53 ` [PATCH 08/10] ARM: i.MX: esdctl: Add support for Vybrid's memory controller Andrey Smirnov
@ 2018-04-10 23:53 ` Andrey Smirnov
2018-04-10 23:53 ` [PATCH 10/10] i.MX: zii-vf610-dev: " Andrey Smirnov
2018-04-11 9:07 ` [PATCH 00/10] Vybrid MMDC support and misc ESDCTL fixes Sascha Hauer
10 siblings, 0 replies; 12+ messages in thread
From: Andrey Smirnov @ 2018-04-10 23:53 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/boards/freescale-vf610-twr/lowlevel.c | 5 ++---
arch/arm/dts/vf610-twr.dts | 1 +
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boards/freescale-vf610-twr/lowlevel.c b/arch/arm/boards/freescale-vf610-twr/lowlevel.c
index deabe4e37..a043dd421 100644
--- a/arch/arm/boards/freescale-vf610-twr/lowlevel.c
+++ b/arch/arm/boards/freescale-vf610-twr/lowlevel.c
@@ -3,6 +3,7 @@
#include <mach/generic.h>
#include <asm/barebox-arm-head.h>
#include <asm/barebox-arm.h>
+#include <mach/esdctl.h>
#include <mach/vf610-regs.h>
#include <mach/clock-vf610.h>
#include <mach/iomux-vf610.h>
@@ -27,13 +28,11 @@ extern char __dtb_vf610_twr_start[];
ENTRY_FUNCTION(start_vf610_twr, r0, r1, r2)
{
- void *fdt;
vf610_cpu_lowlevel_init();
if (IS_ENABLED(CONFIG_DEBUG_LL))
setup_uart();
- fdt = __dtb_vf610_twr_start + get_runtime_offset();
- barebox_arm_entry(0x80000000, SZ_128M, fdt);
+ vf610_barebox_entry(__dtb_vf610_twr_start + get_runtime_offset());
}
diff --git a/arch/arm/dts/vf610-twr.dts b/arch/arm/dts/vf610-twr.dts
index 5947fdbda..2456ade5f 100644
--- a/arch/arm/dts/vf610-twr.dts
+++ b/arch/arm/dts/vf610-twr.dts
@@ -8,6 +8,7 @@
*/
#include <arm/vf610-twr.dts>
+#include "vf610-ddrmc.dtsi"
&usbdev0 {
status = "disabled";
--
2.14.3
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* [PATCH 10/10] i.MX: zii-vf610-dev: Make use of vf610_barebox_entry()
2018-04-10 23:53 [PATCH 00/10] Vybrid MMDC support and misc ESDCTL fixes Andrey Smirnov
` (8 preceding siblings ...)
2018-04-10 23:53 ` [PATCH 09/10] i.MX: vf610-twr: Make use of vf610_barebox_entry() Andrey Smirnov
@ 2018-04-10 23:53 ` Andrey Smirnov
2018-04-11 9:07 ` [PATCH 00/10] Vybrid MMDC support and misc ESDCTL fixes Sascha Hauer
10 siblings, 0 replies; 12+ messages in thread
From: Andrey Smirnov @ 2018-04-10 23:53 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/boards/zii-vf610-dev/lowlevel.c | 3 ++-
arch/arm/dts/vf610-zii-dev.dtsi | 4 +++-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boards/zii-vf610-dev/lowlevel.c b/arch/arm/boards/zii-vf610-dev/lowlevel.c
index c6663c141..f3d67501a 100644
--- a/arch/arm/boards/zii-vf610-dev/lowlevel.c
+++ b/arch/arm/boards/zii-vf610-dev/lowlevel.c
@@ -18,6 +18,7 @@
#include <mach/generic.h>
#include <asm/barebox-arm-head.h>
#include <asm/barebox-arm.h>
+#include <mach/esdctl.h>
#include <mach/vf610-regs.h>
#include <mach/clock-vf610.h>
#include <mach/iomux-vf610.h>
@@ -133,5 +134,5 @@ ENTRY_FUNCTION(start_zii_vf610_dev, r0, r1, r2)
break;
}
- barebox_arm_entry(0x80000000, SZ_512M, fdt + get_runtime_offset());
+ vf610_barebox_entry(fdt + get_runtime_offset());
}
diff --git a/arch/arm/dts/vf610-zii-dev.dtsi b/arch/arm/dts/vf610-zii-dev.dtsi
index 4bf81451a..dc16280bc 100644
--- a/arch/arm/dts/vf610-zii-dev.dtsi
+++ b/arch/arm/dts/vf610-zii-dev.dtsi
@@ -40,7 +40,9 @@ n * copy, modify, merge, publish, distribute, sublicense, and/or
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
- */
+*/
+
+#include "vf610-ddrmc.dtsi"
/ {
audio_ext: mclk_osc {
--
2.14.3
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* Re: [PATCH 00/10] Vybrid MMDC support and misc ESDCTL fixes
2018-04-10 23:53 [PATCH 00/10] Vybrid MMDC support and misc ESDCTL fixes Andrey Smirnov
` (9 preceding siblings ...)
2018-04-10 23:53 ` [PATCH 10/10] i.MX: zii-vf610-dev: " Andrey Smirnov
@ 2018-04-11 9:07 ` Sascha Hauer
10 siblings, 0 replies; 12+ messages in thread
From: Sascha Hauer @ 2018-04-11 9:07 UTC (permalink / raw)
To: Andrey Smirnov; +Cc: barebox
On Tue, Apr 10, 2018 at 04:53:13PM -0700, Andrey Smirnov wrote:
> Everyone:
>
> This series is a bit of code I developed to support automatic
> configured DRAM size detection on Vybrid platform as well as some
> small fixes/cleanup I made while looking at esdctl.c.
>
> All feedback is wellcome!
Not much to comment, looks all good. Applied, thanks
Sascha
>
> Thanks,
> Andrey Smirnov
>
> Andrey Smirnov (10):
> ARM: i.MX: esdctl: Use IOMEM instead of (void *)
> ARM: i.MX51: esdctl: Replace magic value with ESDMISC_DDR2_8_BANK
> ARM: i.MX6: esdctl: Share memory size calculation code
> ARM: i.MX6: esdctl: Factor out common code in imx6*_barebox_entry()
> ARM: i.MX6: esdctl: Use symbolic constants for RAM base address
> ARM: i.MX: esdctl: Make use of min_t()
> ARM: i.MX: esdctl: Introduce memory_sdram_size()
> ARM: i.MX: esdctl: Add support for Vybrid's memory controller
> i.MX: vf610-twr: Make use of vf610_barebox_entry()
> i.MX: zii-vf610-dev: Make use of vf610_barebox_entry()
>
> arch/arm/boards/freescale-vf610-twr/lowlevel.c | 5 +-
> arch/arm/boards/zii-imx6q-rdu2/lowlevel.c | 2 +-
> arch/arm/boards/zii-vf610-dev/lowlevel.c | 3 +-
> arch/arm/dts/vf610-ddrmc.dtsi | 15 +++
> arch/arm/dts/vf610-twr.dts | 1 +
> arch/arm/dts/vf610-zii-dev.dtsi | 4 +-
> arch/arm/mach-imx/esdctl.c | 144 ++++++++++++++-----------
> arch/arm/mach-imx/include/mach/esdctl.h | 2 +
> arch/arm/mach-imx/include/mach/imx6-regs.h | 4 +-
> arch/arm/mach-imx/include/mach/vf610-ddrmc.h | 18 ++++
> arch/arm/mach-imx/include/mach/vf610-regs.h | 2 +
> include/memory.h | 8 ++
> 12 files changed, 141 insertions(+), 67 deletions(-)
> create mode 100644 arch/arm/dts/vf610-ddrmc.dtsi
> create mode 100644 arch/arm/mach-imx/include/mach/vf610-ddrmc.h
>
> --
> 2.14.3
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
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