[PATCH] clk: i.MX6: Adjust GPMI parent clock

From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH] clk: i.MX6: Adjust GPMI parent clock
Date: Wed, 11 Apr 2018 11:29:47 +0200	[thread overview]
Message-ID: <20180411092947.4302-1-s.hauer@pengutronix.de> (raw)

Based on the corresponding Kernel code:

The gpmi needs 100MHz frequency in the EDO/Sync mode, We can not get the
100MHz from the pll2_pfd0_352m. So choose pll2_pfd2_396m as enfc_sel's
parent.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 drivers/clk/imx/clk-imx6.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/clk/imx/clk-imx6.c b/drivers/clk/imx/clk-imx6.c
index d0571bce5e..c48ab7f76a 100644
--- a/drivers/clk/imx/clk-imx6.c
+++ b/drivers/clk/imx/clk-imx6.c
@@ -514,6 +514,13 @@ static int imx6_ccm_probe(struct device_d *dev)
 
 	clk_set_parent(clks[IMX6QDL_CLK_LVDS1_SEL], clks[IMX6QDL_CLK_SATA_REF_100M]);
 
+	/*
+	 * The gpmi needs 100MHz frequency in the EDO/Sync mode,
+	 * We can not get the 100MHz from the pll2_pfd0_352m.
+	 * So choose pll2_pfd2_396m as enfc_sel's parent.
+	 */
+	clk_set_parent(clks[IMX6QDL_CLK_ENFC_SEL], clks[IMX6QDL_CLK_PLL2_PFD2_396M]);
+
 	return 0;
 }
 
-- 
2.16.1


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