From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH 0/4] Fix NAND controller clock for i.MX6plus
Date: Wed, 11 Apr 2018 15:26:50 +0200 [thread overview]
Message-ID: <20180411132654.10620-1-s.hauer@pengutronix.de> (raw)
The i.MX6 plus SoC variants have some changes in the clock controller,
start integrating them beginning with the NAND controller clock.
Before doing so we have to add proper detection code for the i.MX6 plus.
Sascha Hauer (4):
ARM: i.MX6: de-inline i.MX6 type detection
ARM: i.MX6: factor out function to read si_rev
ARM: i.MX6: Add cpu type for 'plus' variants
clk: i.MX6: Fix enfc_sel for i.MX6dqp
arch/arm/boards/phytec-som-imx6/board.c | 2 +-
arch/arm/boards/zii-imx6q-rdu2/lowlevel.c | 4 +-
arch/arm/mach-imx/imx6.c | 42 +++++++++++++---
arch/arm/mach-imx/include/mach/imx6.h | 81 +++++++++++++++++--------------
drivers/clk/imx/clk-imx6.c | 19 +++++++-
5 files changed, 99 insertions(+), 49 deletions(-)
--
2.16.1
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next reply other threads:[~2018-04-11 13:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-11 13:26 Sascha Hauer [this message]
2018-04-11 13:26 ` [PATCH 1/4] ARM: i.MX6: de-inline i.MX6 type detection Sascha Hauer
2018-04-11 13:26 ` [PATCH 2/4] ARM: i.MX6: factor out function to read si_rev Sascha Hauer
2018-04-11 13:26 ` [PATCH 3/4] ARM: i.MX6: Add cpu type for 'plus' variants Sascha Hauer
2018-04-11 13:26 ` [PATCH 4/4] clk: i.MX6: Fix enfc_sel for i.MX6dqp Sascha Hauer
2018-04-16 8:00 ` Sascha Hauer
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