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* [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates
@ 2018-04-12  7:30 Sascha Hauer
  2018-04-12  7:30 ` [PATCH 01/16] ARM: i.MX: phytec-som-imx: Remove kernel and oftree partiton in NAND Sascha Hauer
                   ` (15 more replies)
  0 siblings, 16 replies; 17+ messages in thread
From: Sascha Hauer @ 2018-04-12  7:30 UTC (permalink / raw)
  To: Barebox List

Some more patches from the Phytec barebox git repository only lacking
the final hit to the send button.

Sascha

Christian Hemp (4):
  ARM: i.MX: phytec-som-imx: Remove kernel and oftree partiton in NAND
  ARM: dts: imx6qdl: phycore: Sync muxing with kernel
  ARM: i.MX: phytec-som-imx6: phycore: Set BUCK mode to SYNC
  ARM: i.MX: phytec-som-imx6: add phyCORE-i.MX6 QuadPlus with 1GiB RAM

Matthias Rabe (3):
  ARM: i.MX: phytec-som-imx: env: automount emmc if available
  ARM: i.MX: phytec-som-imx: env: add boot script for emmc
  ARM: i.MX: phytec-som-imx: env: add android boot options

Stefan Christ (2):
  ARM: i.MX: phytec-som-imx6: add boot device emmc
  ARM: i.MX: phytec-som-imx6: add phyCORE-i.MX6 Solo with 1GiB RAM

Stefan Riedmueller (6):
  ARM: dts: phyCORE-imx6: Add SPINOR env node
  ARM: dts: imx6: phyboard-mira: Add usb support
  ARM: dts: imx6: phyboard-mira: Enable usb host and usb otg port
  ARM: dts: imx6: phyboard-mira: Remove unecessary iomuxc subnode
  ARM: dts: phycore-imx6: Use generic jedec spi nor compatible
  ARM: i.MX: phytec-som-imx6: Change kernel boot image to zImage

michael grassmann (1):
  ARM: i.MX: phyFLEX: Change Ram Timing for i.MX6 DualLite\Solo (400
    MHz)

 arch/arm/boards/phytec-som-imx6/board.c            |  55 ++++-
 .../defaultenv-physom-imx6-phycore/boot/emmc       |   5 +
 .../defaultenv-physom-imx6/boot/emmc               |  10 +
 .../defaultenv-physom-imx6/boot/mmc                |   7 +-
 .../defaultenv-physom-imx6/boot/nand               |  11 +-
 .../defaultenv-physom-imx6/init/automount          |   5 +
 .../flash-header-phytec-pcm058dl-1gib-32bit.imxcfg |   8 +
 .../flash-header-phytec-pcm058qp-1gib.imxcfg       |   8 +
 .../phytec-som-imx6/flash-header-phytec-pcm058qp.h | 112 +++++++++
 .../flash-header-phytec-pfla02dl-1gib-1bank.imxcfg |   2 +-
 .../flash-header-phytec-pfla02dl-1gib.imxcfg       |   2 +-
 .../phytec-som-imx6/flash-header-phytec-pfla02dl.h |   2 +-
 .../flash-header-phytec-pfla02s-128mb-1bank.imxcfg |   2 +-
 .../flash-header-phytec-pfla02s-256mb-1bank.imxcfg |   2 +-
 .../flash-header-phytec-pfla02s-512mb-1bank.imxcfg |   2 +-
 arch/arm/boards/phytec-som-imx6/lowlevel.c         |   2 +
 arch/arm/dts/Makefile                              |   1 +
 arch/arm/dts/imx6dl-phytec-phycore-som-emmc.dts    |   8 +
 arch/arm/dts/imx6dl-phytec-phycore-som-nand.dts    |   8 +
 arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi             |  12 +-
 arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts     |   8 +
 arch/arm/dts/imx6q-phytec-phycore-som-nand.dts     |   8 +
 arch/arm/dts/imx6qdl-phytec-pfla02.dtsi            |  12 +-
 arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi       | 252 ++++++++++++---------
 arch/arm/dts/imx6qp-phytec-phycore-som-nand.dts    |  69 ++++++
 images/Makefile.imx                                |  10 +
 26 files changed, 488 insertions(+), 135 deletions(-)
 create mode 100644 arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6-phycore/boot/emmc
 create mode 100644 arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/emmc
 create mode 100644 arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib-32bit.imxcfg
 create mode 100644 arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058qp-1gib.imxcfg
 create mode 100644 arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058qp.h
 create mode 100644 arch/arm/dts/imx6qp-phytec-phycore-som-nand.dts

-- 
2.16.1


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^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH 01/16] ARM: i.MX: phytec-som-imx: Remove kernel and oftree partiton in NAND
  2018-04-12  7:30 [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates Sascha Hauer
@ 2018-04-12  7:30 ` Sascha Hauer
  2018-04-12  7:30 ` [PATCH 02/16] ARM: i.MX: phytec-som-imx: env: automount emmc if available Sascha Hauer
                   ` (14 subsequent siblings)
  15 siblings, 0 replies; 17+ messages in thread
From: Sascha Hauer @ 2018-04-12  7:30 UTC (permalink / raw)
  To: Barebox List; +Cc: Christian Hemp

From: Christian Hemp <christian.hemp@gmail.com>

We store kernel and oftree in static UBI volumes now. No need
for separate partitions any more.

Signed-off-by: Christian Hemp <christian.hemp@gmail.com>
Acked-by: Stefan Lengfeld <s.lengfeld@phytec.de>
---
 .../boards/phytec-som-imx6/defaultenv-physom-imx6/boot/nand  |  6 ++++--
 arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi                       | 12 +-----------
 arch/arm/dts/imx6qdl-phytec-pfla02.dtsi                      | 12 +-----------
 arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi                 | 12 +-----------
 4 files changed, 7 insertions(+), 35 deletions(-)

diff --git a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/nand b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/nand
index a23aa21cc7..e4eded530d 100644
--- a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/nand
+++ b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/nand
@@ -1,5 +1,7 @@
 #!/bin/sh
 
-global.bootm.image="/dev/nand0.kernel.bb"
-global.bootm.oftree="/dev/nand0.oftree.bb"
+[ ! -e /dev/nand0.root.ubi ] && ubiattach /dev/nand0.root
+
+global.bootm.image="/dev/nand0.root.ubi.kernel"
+global.bootm.oftree="/dev/nand0.root.ubi.oftree"
 global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=root rootfstype=ubifs rw"
diff --git a/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi b/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi
index a6ea7b5cce..63dd966b87 100644
--- a/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi
+++ b/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi
@@ -145,18 +145,8 @@
 	};
 
 	partition@420000 {
-		label = "oftree";
-		reg = <0x420000 0x20000>;
-	};
-
-	partition@440000 {
-		label = "kernel";
-		reg = <0x440000 0x800000>;
-	};
-
-	partition@C40000 {
 		label = "root";
-		reg = <0xC40000 0x0>;
+		reg = <0x420000 0x0>;
 	};
 };
 
diff --git a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi
index 9a8c7024a3..862d856d00 100644
--- a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi
@@ -115,18 +115,8 @@
 	};
 
 	partition@500000 {
-		label = "oftree";
-		reg = <0x500000 0x100000>;
-	};
-
-	partition@600000 {
-		label = "kernel";
-		reg = <0x600000 0x800000>;
-	};
-
-	partition@e00000 {
 		label = "root";
-		reg = <0xe00000 0x0>;
+		reg = <0x500000 0x0>;
 	};
 };
 
diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
index b10530cbcf..3a5b0dbf24 100644
--- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
@@ -112,18 +112,8 @@
 	};
 
 	partition@500000 {
-		label = "oftree";
-		reg = <0x500000 0x100000>;
-	};
-
-	partition@600000 {
-		label = "kernel";
-		reg = <0x600000 0x800000>;
-	};
-
-	partition@e00000 {
 		label = "root";
-		reg = <0xe00000 0x0>;
+		reg = <0x500000 0x0>;
 	};
 };
 
-- 
2.16.1


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^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH 02/16] ARM: i.MX: phytec-som-imx: env: automount emmc if available
  2018-04-12  7:30 [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates Sascha Hauer
  2018-04-12  7:30 ` [PATCH 01/16] ARM: i.MX: phytec-som-imx: Remove kernel and oftree partiton in NAND Sascha Hauer
@ 2018-04-12  7:30 ` Sascha Hauer
  2018-04-12  7:30 ` [PATCH 03/16] ARM: i.MX: phytec-som-imx: env: add boot script for emmc Sascha Hauer
                   ` (13 subsequent siblings)
  15 siblings, 0 replies; 17+ messages in thread
From: Sascha Hauer @ 2018-04-12  7:30 UTC (permalink / raw)
  To: Barebox List; +Cc: Matthias Rabe

From: Matthias Rabe <matthias.rabe@sigma-chemnitz.de>

added automount configuration for emmc, if available.
needed f.e. by the android boot.

Signed-off-by: Matthias Rabe <matthias.rabe@sigma-chemnitz.de>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
---
 .../arm/boards/phytec-som-imx6/defaultenv-physom-imx6/init/automount | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/init/automount b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/init/automount
index 4b223d8037..fea64d627e 100644
--- a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/init/automount
+++ b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/init/automount
@@ -7,3 +7,8 @@ automount /mnt/tftp 'ifup eth0 && mount -t tftp $eth0.serverip /mnt/tftp'
 
 mkdir -p /mnt/mmc
 automount -d /mnt/mmc 'mmc2.probe=1 && [ -e /dev/mmc2.0 ] && mount /dev/mmc2.0 /mnt/mmc'
+
+if [ -e /dev/mmc3 ]; then
+  mkdir -p /mnt/mmc3
+  automount -d /mnt/mmc3 'mmc3.probe=1 && [ -e /dev/mmc3.0 ] && mount /dev/mmc3.0 /mnt/mmc3'
+fi
-- 
2.16.1


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^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH 03/16] ARM: i.MX: phytec-som-imx: env: add boot script for emmc
  2018-04-12  7:30 [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates Sascha Hauer
  2018-04-12  7:30 ` [PATCH 01/16] ARM: i.MX: phytec-som-imx: Remove kernel and oftree partiton in NAND Sascha Hauer
  2018-04-12  7:30 ` [PATCH 02/16] ARM: i.MX: phytec-som-imx: env: automount emmc if available Sascha Hauer
@ 2018-04-12  7:30 ` Sascha Hauer
  2018-04-12  7:30 ` [PATCH 04/16] ARM: i.MX: phytec-som-imx: env: add android boot options Sascha Hauer
                   ` (12 subsequent siblings)
  15 siblings, 0 replies; 17+ messages in thread
From: Sascha Hauer @ 2018-04-12  7:30 UTC (permalink / raw)
  To: Barebox List; +Cc: Matthias Rabe

From: Matthias Rabe <matthias.rabe@sigma-chemnitz.de>

add bootscript for emmc boot

Signed-off-by: Matthias Rabe <matthias.rabe@sigma-chemnitz.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
---
 arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/emmc | 5 +++++
 1 file changed, 5 insertions(+)
 create mode 100644 arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/emmc

diff --git a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/emmc b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/emmc
new file mode 100644
index 0000000000..83924df5d7
--- /dev/null
+++ b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/emmc
@@ -0,0 +1,5 @@
+#!/bin/sh
+
+global.bootm.image="/mnt/mmc3/linuximage"
+global.bootm.oftree="/mnt/mmc3/oftree"
+global.linux.bootargs.dyn.root="root=/dev/mmcblk3p2 rootwait rw"
-- 
2.16.1


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^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH 04/16] ARM: i.MX: phytec-som-imx: env: add android boot options
  2018-04-12  7:30 [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates Sascha Hauer
                   ` (2 preceding siblings ...)
  2018-04-12  7:30 ` [PATCH 03/16] ARM: i.MX: phytec-som-imx: env: add boot script for emmc Sascha Hauer
@ 2018-04-12  7:30 ` Sascha Hauer
  2018-04-12  7:30 ` [PATCH 05/16] ARM: dts: imx6qdl: phycore: Sync muxing with kernel Sascha Hauer
                   ` (11 subsequent siblings)
  15 siblings, 0 replies; 17+ messages in thread
From: Sascha Hauer @ 2018-04-12  7:30 UTC (permalink / raw)
  To: Barebox List; +Cc: Matthias Rabe

From: Matthias Rabe <matthias.rabe@sigma-chemnitz.de>

Set needed bootargs for android in mmc, emmc and nand boot.

Signed-off-by: Matthias Rabe <matthias.rabe@sigma-chemnitz.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
---
 arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/emmc | 5 +++++
 arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/mmc  | 5 +++++
 arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/nand | 5 +++++
 3 files changed, 15 insertions(+)

diff --git a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/emmc b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/emmc
index 83924df5d7..4e286dc325 100644
--- a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/emmc
+++ b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/emmc
@@ -1,5 +1,10 @@
 #!/bin/sh
 
+if [ -f /mnt/mmc3/android ]; then
+	# configure here the android specific stuff
+	global linux.bootargs.sec="selinux=0 enforcing=0"
+fi
+
 global.bootm.image="/mnt/mmc3/linuximage"
 global.bootm.oftree="/mnt/mmc3/oftree"
 global.linux.bootargs.dyn.root="root=/dev/mmcblk3p2 rootwait rw"
diff --git a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/mmc b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/mmc
index 332fc26ad0..df874f0a38 100644
--- a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/mmc
+++ b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/mmc
@@ -1,5 +1,10 @@
 #!/bin/sh
 
+if [ -f /mnt/mmc/android ]; then
+	# configure here the android specific stuff
+	global linux.bootargs.sec="selinux=0 enforcing=0"
+fi
+
 global.bootm.image="/mnt/mmc/linuximage"
 global.bootm.oftree="/mnt/mmc/oftree"
 global.linux.bootargs.dyn.root="root=/dev/mmcblk0p2 rootwait rw"
diff --git a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/nand b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/nand
index e4eded530d..0c2b1cbe4c 100644
--- a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/nand
+++ b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/nand
@@ -2,6 +2,11 @@
 
 [ ! -e /dev/nand0.root.ubi ] && ubiattach /dev/nand0.root
 
+if [ -e /dev/nand0.root.ubi.system ]; then
+	# configure here the android specific stuff
+	global linux.bootargs.sec="selinux=0 enforcing=0"
+fi
+
 global.bootm.image="/dev/nand0.root.ubi.kernel"
 global.bootm.oftree="/dev/nand0.root.ubi.oftree"
 global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=root rootfstype=ubifs rw"
-- 
2.16.1


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^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH 05/16] ARM: dts: imx6qdl: phycore: Sync muxing with kernel
  2018-04-12  7:30 [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates Sascha Hauer
                   ` (3 preceding siblings ...)
  2018-04-12  7:30 ` [PATCH 04/16] ARM: i.MX: phytec-som-imx: env: add android boot options Sascha Hauer
@ 2018-04-12  7:30 ` Sascha Hauer
  2018-04-12  7:30 ` [PATCH 06/16] ARM: i.MX: phytec-som-imx6: add boot device emmc Sascha Hauer
                   ` (10 subsequent siblings)
  15 siblings, 0 replies; 17+ messages in thread
From: Sascha Hauer @ 2018-04-12  7:30 UTC (permalink / raw)
  To: Barebox List; +Cc: Stefan Riedmueller

From: Christian Hemp <c.hemp@phytec.de>

Sync the USDCH drive strength muxing with kernel.
With this drive strength we saw no sd card errors.

Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Acked-by: Stefan Lengfeld <s.lengfeld@phytec.de>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
---
 arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
index 3a5b0dbf24..923c79c67b 100644
--- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
@@ -205,12 +205,12 @@
 
 		pinctrl_usdhc1: usdhc1grp {
 			fsl,pins = <
-				MX6QDL_PAD_SD1_CMD__SD1_CMD		0x17059
-				MX6QDL_PAD_SD1_CLK__SD1_CLK		0x10059
-				MX6QDL_PAD_SD1_DAT0__SD1_DATA0		0x17059
-				MX6QDL_PAD_SD1_DAT1__SD1_DATA1		0x17059
-				MX6QDL_PAD_SD1_DAT2__SD1_DATA2		0x17059
-				MX6QDL_PAD_SD1_DAT3__SD1_DATA3		0x17059
+				MX6QDL_PAD_SD1_CMD__SD1_CMD		0x170f9
+				MX6QDL_PAD_SD1_CLK__SD1_CLK		0x100f9
+				MX6QDL_PAD_SD1_DAT0__SD1_DATA0		0x170f9
+				MX6QDL_PAD_SD1_DAT1__SD1_DATA1		0x170f9
+				MX6QDL_PAD_SD1_DAT2__SD1_DATA2		0x170f9
+				MX6QDL_PAD_SD1_DAT3__SD1_DATA3		0x170f9
 				MX6QDL_PAD_EIM_BCLK__GPIO6_IO31		0x80000000 /* CD */
 			>;
 		};
-- 
2.16.1


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^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH 06/16] ARM: i.MX: phytec-som-imx6: add boot device emmc
  2018-04-12  7:30 [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates Sascha Hauer
                   ` (4 preceding siblings ...)
  2018-04-12  7:30 ` [PATCH 05/16] ARM: dts: imx6qdl: phycore: Sync muxing with kernel Sascha Hauer
@ 2018-04-12  7:30 ` Sascha Hauer
  2018-04-12  7:30 ` [PATCH 07/16] ARM: i.MX: phytec-som-imx6: phycore: Set BUCK mode to SYNC Sascha Hauer
                   ` (9 subsequent siblings)
  15 siblings, 0 replies; 17+ messages in thread
From: Sascha Hauer @ 2018-04-12  7:30 UTC (permalink / raw)
  To: Barebox List; +Cc: Stefan Christ, Stefan Riedmueller

From: Stefan Christ <s.christ@phytec.de>

Add boot file 'emmc' for phyCORE-i.MX6.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
---
 .../boards/phytec-som-imx6/defaultenv-physom-imx6-phycore/boot/emmc  | 5 +++++
 1 file changed, 5 insertions(+)
 create mode 100644 arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6-phycore/boot/emmc

diff --git a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6-phycore/boot/emmc b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6-phycore/boot/emmc
new file mode 100644
index 0000000000..7ba1d0d0cf
--- /dev/null
+++ b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6-phycore/boot/emmc
@@ -0,0 +1,5 @@
+#!/bin/sh
+
+global.bootm.image="/mnt/emmc/zImage"
+global.bootm.oftree="/mnt/emmc/oftree"
+global.linux.bootargs.dyn.root="root=/dev/mmcblk1p2 rootwait rw"
-- 
2.16.1


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^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH 07/16] ARM: i.MX: phytec-som-imx6: phycore: Set BUCK mode to SYNC
  2018-04-12  7:30 [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates Sascha Hauer
                   ` (5 preceding siblings ...)
  2018-04-12  7:30 ` [PATCH 06/16] ARM: i.MX: phytec-som-imx6: add boot device emmc Sascha Hauer
@ 2018-04-12  7:30 ` Sascha Hauer
  2018-04-12  7:30 ` [PATCH 08/16] ARM: i.MX: phyFLEX: Change Ram Timing for i.MX6 DualLite\Solo (400 MHz) Sascha Hauer
                   ` (8 subsequent siblings)
  15 siblings, 0 replies; 17+ messages in thread
From: Sascha Hauer @ 2018-04-12  7:30 UTC (permalink / raw)
  To: Barebox List; +Cc: Stefan Riedmueller

From: Christian Hemp <c.hemp@phytec.de>

Set the BUCK mode for all BUCKS (1-4) from BUCK_MODE_AUTO to
BUCK_MODE_SYNC.  If the BUCKs are in BUCK_MODE_AUTO in very rare cases
it is possible that the BUCK goes in power down mode.

Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
---
 arch/arm/boards/phytec-som-imx6/board.c | 51 +++++++++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/arm/boards/phytec-som-imx6/board.c b/arch/arm/boards/phytec-som-imx6/board.c
index 7b63ee0e0c..f9b6cf55cd 100644
--- a/arch/arm/boards/phytec-som-imx6/board.c
+++ b/arch/arm/boards/phytec-som-imx6/board.c
@@ -28,6 +28,7 @@
 #include <gpio.h>
 #include <init.h>
 #include <of.h>
+#include <i2c/i2c.h>
 #include <mach/bbu.h>
 #include <platform_data/eth-fec.h>
 #include <mfd/imx6q-iomuxc-gpr.h>
@@ -51,6 +52,14 @@
 
 #define MX6_PHYFLEX_ERR006282	IMX_GPIO_NR(2, 11)
 
+#define DA9062_I2C_ADDRESS		0x58
+
+#define DA9062_BUCK1_CFG		0x9e
+#define DA9062_BUCK2_CFG		0x9d
+#define DA9062_BUCK3_CFG		0xa0
+#define DA9062_BUCK4_CFG		0x9f
+#define DA9062_BUCKx_MODE_SYNCHRONOUS	(2 << 6)
+
 static void phyflex_err006282_workaround(void)
 {
 	/*
@@ -96,6 +105,45 @@ int ksz8081_phy_fixup(struct phy_device *phydev)
 	return 0;
 }
 
+static int phycore_da9062_setup_buck_mode(void)
+{
+	struct i2c_adapter *adapter = NULL;
+	struct i2c_client client;
+	unsigned char value;
+	int bus = 0;
+	int ret;
+
+	adapter = i2c_get_adapter(bus);
+	if (!adapter)
+		return -ENODEV;
+
+	client.adapter = adapter;
+	client.addr = DA9062_I2C_ADDRESS;
+
+	value = DA9062_BUCKx_MODE_SYNCHRONOUS;
+
+	ret = i2c_write_reg(&client, DA9062_BUCK1_CFG, &value, 1);
+	if (ret != 1)
+		goto err_out;
+
+	ret = i2c_write_reg(&client, DA9062_BUCK2_CFG, &value, 1);
+	if (ret != 1)
+		goto err_out;
+
+	ret = i2c_write_reg(&client, DA9062_BUCK3_CFG, &value, 1);
+	if (ret != 1)
+		goto err_out;
+
+	ret = i2c_write_reg(&client, DA9062_BUCK4_CFG, &value, 1);
+	if (ret != 1)
+		goto err_out;
+
+	return 0;
+
+err_out:
+	return ret;
+}
+
 static int physom_imx6_devices_init(void)
 {
 	int ret;
@@ -127,6 +175,9 @@ static int physom_imx6_devices_init(void)
 		|| of_machine_is_compatible("phytec,imx6dl-pcm058-nand")
 		|| of_machine_is_compatible("phytec,imx6dl-pcm058-emmc")) {
 
+		if (phycore_da9062_setup_buck_mode())
+			pr_err("Setting PMIC BUCK mode failed\n");
+
 		barebox_set_hostname("phyCORE-i.MX6");
 		default_environment_path = "/chosen/environment-spinor";
 		default_envdev = "SPI NOR flash";
-- 
2.16.1


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^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH 08/16] ARM: i.MX: phyFLEX: Change Ram Timing for i.MX6 DualLite\Solo (400 MHz)
  2018-04-12  7:30 [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates Sascha Hauer
                   ` (6 preceding siblings ...)
  2018-04-12  7:30 ` [PATCH 07/16] ARM: i.MX: phytec-som-imx6: phycore: Set BUCK mode to SYNC Sascha Hauer
@ 2018-04-12  7:30 ` Sascha Hauer
  2018-04-12  7:30 ` [PATCH 09/16] ARM: dts: phyCORE-imx6: Add SPINOR env node Sascha Hauer
                   ` (7 subsequent siblings)
  15 siblings, 0 replies; 17+ messages in thread
From: Sascha Hauer @ 2018-04-12  7:30 UTC (permalink / raw)
  To: Barebox List; +Cc: michael grassmann, Stefan Riedmueller

From: michael grassmann <michael.grassmann@phytec.de>

The actual RAM timings in the phyFLEX BSP are generated for 528 MHz RAM clock
frequency, but the i.MX 6Solo/DualLite has only a 400 MHz RAM clock. These new
timings are accompanied by a speed increase of approx 10%.

Signed-off-by: michael grassmann <michael.grassmann@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
---
 .../phytec-som-imx6/flash-header-phytec-pfla02dl-1gib-1bank.imxcfg      | 2 +-
 .../arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg | 2 +-
 arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl.h          | 2 +-
 .../phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg      | 2 +-
 .../phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg      | 2 +-
 .../phytec-som-imx6/flash-header-phytec-pfla02s-512mb-1bank.imxcfg      | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib-1bank.imxcfg
index 156eea971e..7b64e5d2fd 100644
--- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib-1bank.imxcfg
+++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib-1bank.imxcfg
@@ -1,5 +1,5 @@
 #define SETUP_MDCFG0                    \
-	wm 32 0x021b000c 0x565c9b85
+	wm 32 0x021b000c 0x41447525
 
 #define SETUP_MDASP_MDCTL		\
 	wm 32 0x021b0040 0x00000027;	\
diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg
index e76867004a..04c489d7e8 100644
--- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg
+++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg
@@ -1,5 +1,5 @@
 #define SETUP_MDCFG0			\
-	wm 32 0x021b000c 0x8c929b85
+	wm 32 0x021b000c 0x2d307525
 
 #define SETUP_MDASP_MDCTL		\
 	wm 32 0x021b0040 0x00000017;	\
diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl.h b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl.h
index 405529ddf8..b0f3faa0b7 100644
--- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl.h
+++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl.h
@@ -74,7 +74,7 @@ wm 32 MX6_MMDC_P0_MDOTC 0x09444040
 
 SETUP_MDCFG0
 
-wm 32 MX6_MMDC_P0_MDCFG1 0xff538f64
+wm 32 MX6_MMDC_P0_MDCFG1 0xb66e8b64
 wm 32 MX6_MMDC_P0_MDCFG2 0x01ff0124
 wm 32 MX6_MMDC_P0_MDMISC 0x00091740
 wm 32 MX6_MMDC_P0_MDSCR 0x00008000
diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg
index 26fe2b2f7d..ebe5a968b1 100644
--- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg
+++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg
@@ -1,5 +1,5 @@
 #define SETUP_MDCFG0                    \
-        wm 32 0x021b000c 0x3c409b85
+        wm 32 0x021b000c 0x2D307525
 
 #define SETUP_MDASP_MDCTL		\
         wm 32 0x021b0040 0x0000000B;    \
diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg
index babb0dfe24..5f1585a40b 100644
--- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg
+++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg
@@ -1,5 +1,5 @@
 #define SETUP_MDCFG0                    \
-        wm 32 0x021b000c 0x3c409b85
+        wm 32 0x021b000c 0x2D307525
 
 #define SETUP_MDASP_MDCTL		\
         wm 32 0x021b0040 0x0000000F;    \
diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-512mb-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-512mb-1bank.imxcfg
index 6a46cd958f..5ff3ec69d7 100644
--- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-512mb-1bank.imxcfg
+++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-512mb-1bank.imxcfg
@@ -1,5 +1,5 @@
 #define SETUP_MDCFG0			\
-	wm 32 0x021b000c 0x565c9b85
+	wm 32 0x021b000c 0x41447525
 
 #define SETUP_MDASP_MDCTL		\
 	wm 32 0x021b0040 0x00000017;	\
-- 
2.16.1


_______________________________________________
barebox mailing list
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^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH 09/16] ARM: dts: phyCORE-imx6: Add SPINOR env node
  2018-04-12  7:30 [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates Sascha Hauer
                   ` (7 preceding siblings ...)
  2018-04-12  7:30 ` [PATCH 08/16] ARM: i.MX: phyFLEX: Change Ram Timing for i.MX6 DualLite\Solo (400 MHz) Sascha Hauer
@ 2018-04-12  7:30 ` Sascha Hauer
  2018-04-12  7:30 ` [PATCH 10/16] ARM: i.MX: phytec-som-imx6: add phyCORE-i.MX6 QuadPlus with 1GiB RAM Sascha Hauer
                   ` (6 subsequent siblings)
  15 siblings, 0 replies; 17+ messages in thread
From: Sascha Hauer @ 2018-04-12  7:30 UTC (permalink / raw)
  To: Barebox List; +Cc: Stefan Riedmueller

From: Stefan Riedmueller <s.riedmueller@phytec.de>

Add the SPI NOR barebox-environment node to the devicetree to make it
possible to use the barebox-environment from SPI NOR when booting barebox
from SPI NOR.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
---
 arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
index 923c79c67b..a826a8b2ef 100644
--- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
@@ -32,6 +32,12 @@
 			device-path = &gpmi, "partname:barebox-environment";
 			status = "disabled";
 		};
+
+		environment-spinor {
+			compatible = "barebox,environment";
+			device-path = &flash, "partname:barebox-environment";
+			status = "disabled";
+		};
 	};
 };
 
-- 
2.16.1


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^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH 10/16] ARM: i.MX: phytec-som-imx6: add phyCORE-i.MX6 QuadPlus with 1GiB RAM
  2018-04-12  7:30 [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates Sascha Hauer
                   ` (8 preceding siblings ...)
  2018-04-12  7:30 ` [PATCH 09/16] ARM: dts: phyCORE-imx6: Add SPINOR env node Sascha Hauer
@ 2018-04-12  7:30 ` Sascha Hauer
  2018-04-12  7:30 ` [PATCH 11/16] ARM: i.MX: phytec-som-imx6: add phyCORE-i.MX6 Solo " Sascha Hauer
                   ` (5 subsequent siblings)
  15 siblings, 0 replies; 17+ messages in thread
From: Sascha Hauer @ 2018-04-12  7:30 UTC (permalink / raw)
  To: Barebox List; +Cc: Stefan Riedmueller

From: Christian Hemp <c.hemp@phytec.de>

Add Phytec phyCORE-i.MX6 QuadPlus:
 - imx6qp-phytec-phycore-som-nand:
   - 1GiB RAM on 2 Banks with 64Bit
   - 1000Mbit Ethernet
   - NAND
   - SD
   - UART

Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
---
 arch/arm/boards/phytec-som-imx6/board.c            |   4 +-
 .../flash-header-phytec-pcm058qp-1gib.imxcfg       |   8 ++
 .../phytec-som-imx6/flash-header-phytec-pcm058qp.h | 112 +++++++++++++++++++++
 arch/arm/boards/phytec-som-imx6/lowlevel.c         |   1 +
 arch/arm/dts/Makefile                              |   1 +
 arch/arm/dts/imx6qp-phytec-phycore-som-nand.dts    |  61 +++++++++++
 images/Makefile.imx                                |   5 +
 7 files changed, 191 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058qp-1gib.imxcfg
 create mode 100644 arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058qp.h
 create mode 100644 arch/arm/dts/imx6qp-phytec-phycore-som-nand.dts

diff --git a/arch/arm/boards/phytec-som-imx6/board.c b/arch/arm/boards/phytec-som-imx6/board.c
index f9b6cf55cd..1a2d45ec92 100644
--- a/arch/arm/boards/phytec-som-imx6/board.c
+++ b/arch/arm/boards/phytec-som-imx6/board.c
@@ -173,6 +173,7 @@ static int physom_imx6_devices_init(void)
 	} else if (of_machine_is_compatible("phytec,imx6q-pcm058-nand")
 		|| of_machine_is_compatible("phytec,imx6q-pcm058-emmc")
 		|| of_machine_is_compatible("phytec,imx6dl-pcm058-nand")
+		|| of_machine_is_compatible("phytec,imx6qp-pcm058-nand")
 		|| of_machine_is_compatible("phytec,imx6dl-pcm058-emmc")) {
 
 		if (phycore_da9062_setup_buck_mode())
@@ -235,7 +236,8 @@ static int physom_imx6_devices_init(void)
 	defaultenv_append_directory(defaultenv_physom_imx6);
 
 	/* Overwrite file /env/init/automount */
-	if (of_machine_is_compatible("phytec,imx6q-pcm058-nand")
+	if (of_machine_is_compatible("phytec,imx6qp-pcm058-nand")
+		|| of_machine_is_compatible("phytec,imx6q-pcm058-nand")
 		|| of_machine_is_compatible("phytec,imx6q-pcm058-emmc")
 		|| of_machine_is_compatible("phytec,imx6dl-pcm058-nand")
 		|| of_machine_is_compatible("phytec,imx6dl-pcm058-emmc")) {
diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058qp-1gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058qp-1gib.imxcfg
new file mode 100644
index 0000000000..bf85f0a19c
--- /dev/null
+++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058qp-1gib.imxcfg
@@ -0,0 +1,8 @@
+#define SETUP_MDCFG0			\
+	wm 32 0x021b000c 0x555A7955
+
+#define SETUP_MDASP_MDCTL		\
+	wm 32 0x021b0040 0x00000027;	\
+	wm 32 0x021b0000 0x831A0000
+
+#include "flash-header-phytec-pcm058qp.h"
diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058qp.h b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058qp.h
new file mode 100644
index 0000000000..6e7b740a6f
--- /dev/null
+++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058qp.h
@@ -0,0 +1,112 @@
+soc imx6
+loadaddr 0x10000000
+dcdofs 0x400
+
+/* NOC setup */
+wm 32 0x00bb0008 0x00000000
+wm 32 0x00bb000c 0x2891E41A
+wm 32 0x00bb0038 0x00000564
+wm 32 0x00bb0014 0x00000040
+wm 32 0x00bb0028 0x00000020
+wm 32 0x00bb002c 0x00000020
+
+wm 32 0x020e0798 0x000C0000
+wm 32 0x020e0758 0x00000000
+wm 32 0x020e0588 0x00000030
+wm 32 0x020e0594 0x00000030
+wm 32 0x020e056c 0x00000030
+wm 32 0x020e0578 0x00000030
+wm 32 0x020e074c 0x00000030
+wm 32 0x020e057c 0x00000030
+wm 32 0x020e058c 0x00000000
+wm 32 0x020e059c 0x00000030
+wm 32 0x020e05a0 0x00000030
+wm 32 0x020e0590 0x00003000
+wm 32 0x020e0598 0x00003000
+wm 32 0x020e078c 0x00000030
+wm 32 0x020e0750 0x00020000
+wm 32 0x020e05a8 0x00000028
+wm 32 0x020e05b0 0x00000028
+wm 32 0x020e0524 0x00000028
+wm 32 0x020e051c 0x00000028
+wm 32 0x020e0518 0x00000028
+wm 32 0x020e050c 0x00000028
+wm 32 0x020e05b8 0x00000028
+wm 32 0x020e05c0 0x00000028
+wm 32 0x020e0774 0x00020000
+wm 32 0x020e0784 0x00000028
+wm 32 0x020e0788 0x00000028
+wm 32 0x020e0794 0x00000028
+wm 32 0x020e079c 0x00000028
+wm 32 0x020e07a0 0x00000028
+wm 32 0x020e07a4 0x00000028
+wm 32 0x020e07a8 0x00000028
+wm 32 0x020e0748 0x00000028
+wm 32 0x020e05ac 0x00000028
+wm 32 0x020e05b4 0x00000028
+wm 32 0x020e0528 0x00000028
+wm 32 0x020e0520 0x00000028
+wm 32 0x020e0514 0x00000028
+wm 32 0x020e0510 0x00000028
+wm 32 0x020e05bc 0x00000028
+wm 32 0x020e05c4 0x00000028
+wm 32 0x021b0800 0xa1390003
+wm 32 0x021b4800 0xa1380003
+wm 32 0x021b080c 0x00140014
+wm 32 0x021b0810 0x00230018
+wm 32 0x021b480c 0x000A001E
+wm 32 0x021b4810 0x000A0015
+wm 32 0x021b083c 0x43080314
+wm 32 0x021b0840 0x02680300
+wm 32 0x021b483c 0x430C0318
+wm 32 0x021b4840 0x03000254
+wm 32 0x021b0848 0x3A323234
+wm 32 0x021b4848 0x3E3C3242
+wm 32 0x021b0850 0x2A2E3632
+wm 32 0x021b4850 0x3C323E34
+wm 32 0x021b081c 0x33333333
+wm 32 0x021b0820 0x33333333
+wm 32 0x021b0824 0x33333333
+wm 32 0x021b0828 0x33333333
+wm 32 0x021b481c 0x33333333
+wm 32 0x021b4820 0x33333333
+wm 32 0x021b4824 0x33333333
+wm 32 0x021b4828 0x33333333
+wm 32 0x021b08b8 0x00000800
+wm 32 0x021b48b8 0x00000800
+wm 32 0x021b0004 0x00020036
+wm 32 0x021b0008 0x09444040
+
+SETUP_MDCFG0
+
+wm 32 0x021b0010 0xFF328F64
+wm 32 0x021b0014 0x01FF00DB
+wm 32 0x021b0018 0x00011740
+wm 32 0x021b001c 0x00008000
+wm 32 0x021b002c 0x000026d2
+wm 32 0x021b0030 0x003F1023
+
+SETUP_MDASP_MDCTL
+
+wm 32 0x021b001c 0x04088032
+wm 32 0x021b001c 0x0408803a
+wm 32 0x021b001c 0x00008033
+wm 32 0x021b001c 0x0000803b
+wm 32 0x021b001c 0x00048031
+wm 32 0x021b001c 0x00048039
+wm 32 0x021b001c 0x09408030
+wm 32 0x021b001c 0x09408038
+wm 32 0x021b001c 0x04008040
+wm 32 0x021b001c 0x04008048
+wm 32 0x021b0020 0x00007800
+wm 32 0x021b0818 0x00011117
+wm 32 0x021b4818 0x00011117
+wm 32 0x021b0890 0x00400c58
+wm 32 0x021b0400 0x14420000
+wm 32 0x021b0004 0x00025576
+wm 32 0x021b0404 0x00011006
+wm 32 0x021b001c 0x00000000
+wm 32 0x020e0010 0xf00000ff
+wm 32 0x020e0018 0x007F007F
+wm 32 0x020e001c 0x007F007F
+wm 32 0x020c8000 0x80002021
diff --git a/arch/arm/boards/phytec-som-imx6/lowlevel.c b/arch/arm/boards/phytec-som-imx6/lowlevel.c
index 12c3cfa642..9aa2104a3c 100644
--- a/arch/arm/boards/phytec-som-imx6/lowlevel.c
+++ b/arch/arm/boards/phytec-som-imx6/lowlevel.c
@@ -109,6 +109,7 @@ PHYTEC_ENTRY(start_phytec_phyboard_subra_1gib_1bank, imx6q_phytec_phyboard_subra
 PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_nand_256mb, imx6dl_phytec_phycore_som_nand, SZ_256M, true);
 PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_emmc_1gib, imx6dl_phytec_phycore_som_emmc, SZ_1G, true);
 PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_nand_1gib, imx6q_phytec_phycore_som_nand, SZ_1G, true);
+PHYTEC_ENTRY(start_phytec_phycore_imx6qp_som_nand_1gib, imx6qp_phytec_phycore_som_nand, SZ_1G, true);
 PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_1gib, imx6q_phytec_phycore_som_emmc, SZ_1G, true);
 PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_2gib, imx6q_phytec_phycore_som_emmc, SZ_2G, true);
 
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 0400c9349a..b69592e64e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -58,6 +58,7 @@ pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-pbaa03.dtb.o \
 				imx6dl-phytec-phyboard-subra.dtb.o \
 				imx6q-phytec-phycore-som-nand.dtb.o \
 				imx6q-phytec-phycore-som-emmc.dtb.o \
+				imx6qp-phytec-phycore-som-nand.dtb.o \
 				imx6dl-phytec-phycore-som-nand.dtb.o \
 				imx6dl-phytec-phycore-som-emmc.dtb.o \
 				imx6ul-phytec-phycore-som.dtb.o \
diff --git a/arch/arm/dts/imx6qp-phytec-phycore-som-nand.dts b/arch/arm/dts/imx6qp-phytec-phycore-som-nand.dts
new file mode 100644
index 0000000000..031ee883ea
--- /dev/null
+++ b/arch/arm/dts/imx6qp-phytec-phycore-som-nand.dts
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2016 Phytec Messtechnik GmbH
+ * Author: Christian Hemp <c.hemp@phytec.de>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include <arm/imx6qp.dtsi>
+#include "imx6qdl-phytec-phycore-som.dtsi"
+
+/ {
+	model = "Phytec phyCORE-i.MX6 Quad with NAND";
+	compatible = "phytec,imx6qp-pcm058-nand", "fsl,imx6qp";
+};
+
+&ecspi1 {
+	status = "okay";
+};
+
+&eeprom {
+	status = "okay";
+};
+
+&ethphy {
+	max-speed = <1000>;
+};
+
+&fec {
+	status = "okay";
+};
+
+&flash {
+	status = "okay";
+};
+
+&gpmi {
+	status = "okay";
+};
+
+&usdhc1 {
+	status = "okay";
+
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	partition@0 {
+		label = "barebox";
+		reg = <0x0 0xe0000>;
+	};
+
+	partition@e0000 {
+		label = "barebox-environment";
+		reg = <0xe0000 0x20000>;
+	};
+};
diff --git a/images/Makefile.imx b/images/Makefile.imx
index ada828f644..5e10f4fbf3 100644
--- a/images/Makefile.imx
+++ b/images/Makefile.imx
@@ -440,6 +440,11 @@ CFG_start_phytec_phycore_imx6q_som_nand_1gib.pblx.imximg = $(board)/phytec-som-i
 FILE_barebox-phytec-phycore-imx6q-som-nand-1gib.img = start_phytec_phycore_imx6q_som_nand_1gib.pblx.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6q-som-nand-1gib.img
 
+pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6qp_som_nand_1gib
+CFG_start_phytec_phycore_imx6qp_som_nand_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058qp-1gib.imxcfg
+FILE_barebox-phytec-phycore-imx6qp-som-nand-1gib.img = start_phytec_phycore_imx6qp_som_nand_1gib.pblx.imximg
+image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6qp-som-nand-1gib.img
+
 pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6q_som_emmc_1gib
 CFG_start_phytec_phycore_imx6q_som_emmc_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058-1gib.imxcfg
 FILE_barebox-phytec-phycore-imx6q-som-emmc-1gib.img = start_phytec_phycore_imx6q_som_emmc_1gib.pblx.imximg
-- 
2.16.1


_______________________________________________
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http://lists.infradead.org/mailman/listinfo/barebox

^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH 11/16] ARM: i.MX: phytec-som-imx6: add phyCORE-i.MX6 Solo with 1GiB RAM
  2018-04-12  7:30 [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates Sascha Hauer
                   ` (9 preceding siblings ...)
  2018-04-12  7:30 ` [PATCH 10/16] ARM: i.MX: phytec-som-imx6: add phyCORE-i.MX6 QuadPlus with 1GiB RAM Sascha Hauer
@ 2018-04-12  7:30 ` Sascha Hauer
  2018-04-12  7:30 ` [PATCH 12/16] ARM: dts: imx6: phyboard-mira: Add usb support Sascha Hauer
                   ` (4 subsequent siblings)
  15 siblings, 0 replies; 17+ messages in thread
From: Sascha Hauer @ 2018-04-12  7:30 UTC (permalink / raw)
  To: Barebox List; +Cc: Stefan Christ

From: Stefan Christ <s.christ@phytec.de>

Add Phytec phyCORE-i.MX6 Solo:
  - imx6dl-phytec-phycore-som-nand:
    - 1GiB RAM on 1 Bank with 32Bit
    - 100Mbit Ethernet
    - NAND
    - SD
    - UART

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
---
 .../flash-header-phytec-pcm058dl-1gib-32bit.imxcfg                | 8 ++++++++
 arch/arm/boards/phytec-som-imx6/lowlevel.c                        | 1 +
 images/Makefile.imx                                               | 5 +++++
 3 files changed, 14 insertions(+)
 create mode 100644 arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib-32bit.imxcfg

diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib-32bit.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib-32bit.imxcfg
new file mode 100644
index 0000000000..bf95d0f6ae
--- /dev/null
+++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib-32bit.imxcfg
@@ -0,0 +1,8 @@
+#define SETUP_MDCFG0			\
+	wm 32 0x021b000c 0x8c929b85
+
+#define SETUP_MDASP_MDCTL		\
+	wm 32 0x021b0040 0x00000027;	\
+	wm 32 0x021b0000 0x84190000
+
+#include "flash-header-phytec-pcm058dl.h"
diff --git a/arch/arm/boards/phytec-som-imx6/lowlevel.c b/arch/arm/boards/phytec-som-imx6/lowlevel.c
index 9aa2104a3c..f9d70c7450 100644
--- a/arch/arm/boards/phytec-som-imx6/lowlevel.c
+++ b/arch/arm/boards/phytec-som-imx6/lowlevel.c
@@ -107,6 +107,7 @@ PHYTEC_ENTRY(start_phytec_phyboard_subra_512mb_1bank, imx6dl_phytec_phyboard_sub
 PHYTEC_ENTRY(start_phytec_phyboard_subra_1gib_1bank, imx6q_phytec_phyboard_subra, SZ_1G, false);
 
 PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_nand_256mb, imx6dl_phytec_phycore_som_nand, SZ_256M, true);
+PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_nand_1gib, imx6dl_phytec_phycore_som_nand, SZ_1G, true);
 PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_emmc_1gib, imx6dl_phytec_phycore_som_emmc, SZ_1G, true);
 PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_nand_1gib, imx6q_phytec_phycore_som_nand, SZ_1G, true);
 PHYTEC_ENTRY(start_phytec_phycore_imx6qp_som_nand_1gib, imx6qp_phytec_phycore_som_nand, SZ_1G, true);
diff --git a/images/Makefile.imx b/images/Makefile.imx
index 5e10f4fbf3..8649c4919f 100644
--- a/images/Makefile.imx
+++ b/images/Makefile.imx
@@ -460,6 +460,11 @@ CFG_start_phytec_phycore_imx6dl_som_nand_256mb.pblx.imximg = $(board)/phytec-som
 FILE_barebox-phytec-phycore-imx6dl-som-nand-256mb.img = start_phytec_phycore_imx6dl_som_nand_256mb.pblx.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6dl-som-nand-256mb.img
 
+pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6dl_som_nand_1gib
+CFG_start_phytec_phycore_imx6dl_som_nand_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib-32bit.imxcfg
+FILE_barebox-phytec-phycore-imx6dl-som-nand-1gib.img = start_phytec_phycore_imx6dl_som_nand_1gib.pblx.imximg
+image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6dl-som-nand-1gib.img
+
 pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6dl_som_emmc_1gib
 CFG_start_phytec_phycore_imx6dl_som_emmc_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib.imxcfg
 FILE_barebox-phytec-phycore-imx6dl-som-emmc-1gib.img = start_phytec_phycore_imx6dl_som_emmc_1gib.pblx.imximg
-- 
2.16.1


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH 12/16] ARM: dts: imx6: phyboard-mira: Add usb support
  2018-04-12  7:30 [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates Sascha Hauer
                   ` (10 preceding siblings ...)
  2018-04-12  7:30 ` [PATCH 11/16] ARM: i.MX: phytec-som-imx6: add phyCORE-i.MX6 Solo " Sascha Hauer
@ 2018-04-12  7:30 ` Sascha Hauer
  2018-04-12  7:30 ` [PATCH 13/16] ARM: dts: imx6: phyboard-mira: Enable usb host and usb otg port Sascha Hauer
                   ` (3 subsequent siblings)
  15 siblings, 0 replies; 17+ messages in thread
From: Sascha Hauer @ 2018-04-12  7:30 UTC (permalink / raw)
  To: Barebox List; +Cc: Stefan Riedmueller

From: Stefan Riedmueller <s.riedmueller@phytec.de>

This patch adds USB support for the phyBOARD-Mira for the host port and
the OTG port.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
---
 arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi | 54 ++++++++++++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
index a826a8b2ef..1dd88b5add 100644
--- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
@@ -39,6 +39,28 @@
 			status = "disabled";
 		};
 	};
+
+	reg_usbh1_vbus: regulator-usbh1 {
+		compatible = "regulator-fixed";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_usbh1_vbus>;
+		regulator-name = "usbh1_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio2 18 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	reg_usbotg_vbus: regulator-usbotg {
+		compatible = "regulator-fixed";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_usbotg_vbus>;
+		regulator-name = "usbotg_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
 };
 
 &ecspi1 {
@@ -209,6 +231,24 @@
 			>;
 		};
 
+		pinctrl_usbh1_vbus: usbh1vbusgrp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_A20__GPIO2_IO18	0xb0b1
+				>;
+		};
+
+		pinctrl_usbotg: usbotggrp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_1__USB_OTG_ID	0x17059
+				>;
+		};
+
+		pinctrl_usbotg_vbus: usbotgvbusgrp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_A19__GPIO2_IO19	0xb0b1
+				>;
+		};
+
 		pinctrl_usdhc1: usdhc1grp {
 			fsl,pins = <
 				MX6QDL_PAD_SD1_CMD__SD1_CMD		0x170f9
@@ -248,6 +288,20 @@
 	status = "okay";
 };
 
+&usbh1 {
+	vbus-supply = <&reg_usbh1_vbus>;
+	disable-over-current;
+	status = "disabled";
+};
+
+&usbotg {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbotg>;
+	vbus-supply = <&reg_usbotg_vbus>;
+	disable-over-current;
+	status = "disabled";
+};
+
 &usdhc1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_usdhc1>;
-- 
2.16.1


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^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH 13/16] ARM: dts: imx6: phyboard-mira: Enable usb host and usb otg port
  2018-04-12  7:30 [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates Sascha Hauer
                   ` (11 preceding siblings ...)
  2018-04-12  7:30 ` [PATCH 12/16] ARM: dts: imx6: phyboard-mira: Add usb support Sascha Hauer
@ 2018-04-12  7:30 ` Sascha Hauer
  2018-04-12  7:30 ` [PATCH 14/16] ARM: dts: imx6: phyboard-mira: Remove unecessary iomuxc subnode Sascha Hauer
                   ` (2 subsequent siblings)
  15 siblings, 0 replies; 17+ messages in thread
From: Sascha Hauer @ 2018-04-12  7:30 UTC (permalink / raw)
  To: Barebox List; +Cc: Stefan Riedmueller

From: Stefan Riedmueller <s.riedmueller@phytec.de>

Enable both USB ports (HOST and OTG) on the phyBOARD-Mira with i.MX
6Quad/Dual, i.MX 6Solo/DualLight and i.MX 6QuadPlus.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
---
 arch/arm/dts/imx6dl-phytec-phycore-som-emmc.dts | 8 ++++++++
 arch/arm/dts/imx6dl-phytec-phycore-som-nand.dts | 8 ++++++++
 arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts  | 8 ++++++++
 arch/arm/dts/imx6q-phytec-phycore-som-nand.dts  | 8 ++++++++
 arch/arm/dts/imx6qp-phytec-phycore-som-nand.dts | 8 ++++++++
 5 files changed, 40 insertions(+)

diff --git a/arch/arm/dts/imx6dl-phytec-phycore-som-emmc.dts b/arch/arm/dts/imx6dl-phytec-phycore-som-emmc.dts
index bffee5f154..7e4a5aba2a 100644
--- a/arch/arm/dts/imx6dl-phytec-phycore-som-emmc.dts
+++ b/arch/arm/dts/imx6dl-phytec-phycore-som-emmc.dts
@@ -41,6 +41,14 @@
 	status = "okay";
 };
 
+&usbh1 {
+	status = "okay";
+};
+
+&usbotg {
+	status = "okay";
+};
+
 &usdhc1 {
 	status = "okay";
 
diff --git a/arch/arm/dts/imx6dl-phytec-phycore-som-nand.dts b/arch/arm/dts/imx6dl-phytec-phycore-som-nand.dts
index 1b66fdabc6..ffcbdc2134 100644
--- a/arch/arm/dts/imx6dl-phytec-phycore-som-nand.dts
+++ b/arch/arm/dts/imx6dl-phytec-phycore-som-nand.dts
@@ -36,6 +36,14 @@
 	status = "okay";
 };
 
+&usbh1 {
+	status = "okay";
+};
+
+&usbotg {
+	status = "okay";
+};
+
 &usdhc1 {
 	status = "okay";
 
diff --git a/arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts b/arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts
index ecc5aa38e1..6e12b26d38 100644
--- a/arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts
+++ b/arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts
@@ -40,6 +40,14 @@
 	status = "okay";
 };
 
+&usbh1 {
+	status = "okay";
+};
+
+&usbotg {
+	status = "okay";
+};
+
 &usdhc1 {
 	status = "okay";
 
diff --git a/arch/arm/dts/imx6q-phytec-phycore-som-nand.dts b/arch/arm/dts/imx6q-phytec-phycore-som-nand.dts
index 9ad7eda740..d9e37b7fca 100644
--- a/arch/arm/dts/imx6q-phytec-phycore-som-nand.dts
+++ b/arch/arm/dts/imx6q-phytec-phycore-som-nand.dts
@@ -45,6 +45,14 @@
 	status = "okay";
 };
 
+&usbh1 {
+	status = "okay";
+};
+
+&usbotg {
+	status = "okay";
+};
+
 &usdhc1 {
 	status = "okay";
 
diff --git a/arch/arm/dts/imx6qp-phytec-phycore-som-nand.dts b/arch/arm/dts/imx6qp-phytec-phycore-som-nand.dts
index 031ee883ea..c2756142b5 100644
--- a/arch/arm/dts/imx6qp-phytec-phycore-som-nand.dts
+++ b/arch/arm/dts/imx6qp-phytec-phycore-som-nand.dts
@@ -43,6 +43,14 @@
 	status = "okay";
 };
 
+&usbh1 {
+	status = "okay";
+};
+
+&usbotg {
+	status = "okay";
+};
+
 &usdhc1 {
 	status = "okay";
 
-- 
2.16.1


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barebox@lists.infradead.org
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^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH 14/16] ARM: dts: imx6: phyboard-mira: Remove unecessary iomuxc subnode
  2018-04-12  7:30 [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates Sascha Hauer
                   ` (12 preceding siblings ...)
  2018-04-12  7:30 ` [PATCH 13/16] ARM: dts: imx6: phyboard-mira: Enable usb host and usb otg port Sascha Hauer
@ 2018-04-12  7:30 ` Sascha Hauer
  2018-04-12  7:30 ` [PATCH 15/16] ARM: dts: phycore-imx6: Use generic jedec spi nor compatible Sascha Hauer
  2018-04-12  7:30 ` [PATCH 16/16] ARM: i.MX: phytec-som-imx6: Change kernel boot image to zImage Sascha Hauer
  15 siblings, 0 replies; 17+ messages in thread
From: Sascha Hauer @ 2018-04-12  7:30 UTC (permalink / raw)
  To: Barebox List; +Cc: Stefan Riedmueller

From: Stefan Riedmueller <s.riedmueller@phytec.de>

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
---
 arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi | 210 +++++++++++++--------------
 1 file changed, 103 insertions(+), 107 deletions(-)

diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
index 1dd88b5add..c3cfa00ced 100644
--- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
@@ -159,122 +159,118 @@
 };
 
 &iomuxc {
-	pinctrl-names = "default";
-
-	imx6qdl-phytec-phycore-som {
-		pinctrl_ecspi1: ecspi1grp {
-			fsl,pins = <
-				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
-				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
-				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
-				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x80000000
-			>;
-		};
-
-		pinctrl_enet: enetgrp {
-			fsl,pins = <
-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
-				MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
-				MX6QDL_PAD_SD2_DAT1__GPIO1_IO14		0x80000000
-			>;
-		};
+	pinctrl_ecspi1: ecspi1grp {
+		fsl,pins = <
+			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
+			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
+			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
+			MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x80000000
+		>;
+	};
 
-		pinctrl_gpmi_nand: gpmigrp {
-			fsl,pins = <
-				MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
-				MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
-				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
-				MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
-				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
-				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1
-				MX6QDL_PAD_NANDF_CS2__NAND_CE2_B	0xb0b1
-				MX6QDL_PAD_NANDF_CS3__NAND_CE3_B	0xb0b1
-				MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
-				MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
-				MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
-				MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
-				MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
-				MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
-				MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
-				MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
-				MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
-				MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
-				MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1
-			>;
-		};
+	pinctrl_enet: enetgrp {
+		fsl,pins = <
+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
+			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
+			MX6QDL_PAD_SD2_DAT1__GPIO1_IO14		0x80000000
+		>;
+	};
 
-		pinctrl_i2c3: i2c3grp {
-			fsl,pins = <
-				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
-				MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1
-			>;
-		};
+	pinctrl_gpmi_nand: gpmigrp {
+		fsl,pins = <
+			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
+			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
+			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
+			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
+			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
+			MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1
+			MX6QDL_PAD_NANDF_CS2__NAND_CE2_B	0xb0b1
+			MX6QDL_PAD_NANDF_CS3__NAND_CE3_B	0xb0b1
+			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
+			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
+			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
+			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
+			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
+			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
+			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
+			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
+			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
+			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
+			MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1
+		>;
+	};
 
-		pinctrl_uart2: uart2grp {
-			fsl,pins = <
-				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
-				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
-			>;
-		};
+	pinctrl_i2c3: i2c3grp {
+		fsl,pins = <
+			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
+			MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1
+		>;
+	};
 
-		pinctrl_usbh1_vbus: usbh1vbusgrp {
-			fsl,pins = <
-				MX6QDL_PAD_EIM_A20__GPIO2_IO18	0xb0b1
-				>;
-		};
+	pinctrl_uart2: uart2grp {
+		fsl,pins = <
+			MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
+			MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
+		>;
+	};
 
-		pinctrl_usbotg: usbotggrp {
-			fsl,pins = <
-				MX6QDL_PAD_GPIO_1__USB_OTG_ID	0x17059
-				>;
-		};
+	pinctrl_usbh1_vbus: usbh1vbusgrp {
+		fsl,pins = <
+			MX6QDL_PAD_EIM_A20__GPIO2_IO18		0xb0b1
+		>;
+	};
 
-		pinctrl_usbotg_vbus: usbotgvbusgrp {
-			fsl,pins = <
-				MX6QDL_PAD_EIM_A19__GPIO2_IO19	0xb0b1
-				>;
-		};
+	pinctrl_usbotg: usbotggrp {
+		fsl,pins = <
+			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
+		>;
+	};
 
-		pinctrl_usdhc1: usdhc1grp {
-			fsl,pins = <
-				MX6QDL_PAD_SD1_CMD__SD1_CMD		0x170f9
-				MX6QDL_PAD_SD1_CLK__SD1_CLK		0x100f9
-				MX6QDL_PAD_SD1_DAT0__SD1_DATA0		0x170f9
-				MX6QDL_PAD_SD1_DAT1__SD1_DATA1		0x170f9
-				MX6QDL_PAD_SD1_DAT2__SD1_DATA2		0x170f9
-				MX6QDL_PAD_SD1_DAT3__SD1_DATA3		0x170f9
-				MX6QDL_PAD_EIM_BCLK__GPIO6_IO31		0x80000000 /* CD */
+	pinctrl_usbotg_vbus: usbotgvbusgrp {
+		fsl,pins = <
+			MX6QDL_PAD_EIM_A19__GPIO2_IO19		0xb0b1
 			>;
-		};
+	};
 
-		pinctrl_usdhc4: usdhc4grp {
-			fsl,pins = <
-				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
-				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
-				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
-				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
-				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
-				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
-				MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
-				MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
-				MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
-				MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
-			>;
-		};
+	pinctrl_usdhc1: usdhc1grp {
+		fsl,pins = <
+			MX6QDL_PAD_SD1_CMD__SD1_CMD		0x170f9
+			MX6QDL_PAD_SD1_CLK__SD1_CLK		0x100f9
+			MX6QDL_PAD_SD1_DAT0__SD1_DATA0		0x170f9
+			MX6QDL_PAD_SD1_DAT1__SD1_DATA1		0x170f9
+			MX6QDL_PAD_SD1_DAT2__SD1_DATA2		0x170f9
+			MX6QDL_PAD_SD1_DAT3__SD1_DATA3		0x170f9
+			MX6QDL_PAD_EIM_BCLK__GPIO6_IO31		0x80000000 /* CD */
+		>;
+	};
+
+	pinctrl_usdhc4: usdhc4grp {
+		fsl,pins = <
+			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
+			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
+			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
+			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
+			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
+			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
+			MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
+			MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
+			MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
+			MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
+		>;
 	};
 };
 
-- 
2.16.1


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^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH 15/16] ARM: dts: phycore-imx6: Use generic jedec spi nor compatible
  2018-04-12  7:30 [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates Sascha Hauer
                   ` (13 preceding siblings ...)
  2018-04-12  7:30 ` [PATCH 14/16] ARM: dts: imx6: phyboard-mira: Remove unecessary iomuxc subnode Sascha Hauer
@ 2018-04-12  7:30 ` Sascha Hauer
  2018-04-12  7:30 ` [PATCH 16/16] ARM: i.MX: phytec-som-imx6: Change kernel boot image to zImage Sascha Hauer
  15 siblings, 0 replies; 17+ messages in thread
From: Sascha Hauer @ 2018-04-12  7:30 UTC (permalink / raw)
  To: Barebox List; +Cc: Stefan Riedmueller

From: Stefan Riedmueller <s.riedmueller@phytec.de>

Use the generic jedec-spi-nor compatible for the SPI NOR node to make it
generic.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
---
 arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
index c3cfa00ced..15fed812b0 100644
--- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
@@ -70,8 +70,8 @@
 	cs-gpios = <&gpio3 19 0>;
 	status = "disabled";
 
-	flash: m25p80@0 {
-		compatible = "m25p80";
+	flash: flash@0 {
+		compatible = "jedec,spi-nor";
 		spi-max-frequency = <20000000>;
 		reg = <0>;
 		status = "disabled";
-- 
2.16.1


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^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH 16/16] ARM: i.MX: phytec-som-imx6: Change kernel boot image to zImage
  2018-04-12  7:30 [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates Sascha Hauer
                   ` (14 preceding siblings ...)
  2018-04-12  7:30 ` [PATCH 15/16] ARM: dts: phycore-imx6: Use generic jedec spi nor compatible Sascha Hauer
@ 2018-04-12  7:30 ` Sascha Hauer
  15 siblings, 0 replies; 17+ messages in thread
From: Sascha Hauer @ 2018-04-12  7:30 UTC (permalink / raw)
  To: Barebox List; +Cc: Stefan Riedmueller

From: Stefan Riedmueller <s.riedmueller@phytec.de>

Use zImage instead of linuximage as kernel boot image name for mmc and
emmc.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
---
 arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/emmc | 2 +-
 arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/mmc  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/emmc b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/emmc
index 4e286dc325..f0d019c3ee 100644
--- a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/emmc
+++ b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/emmc
@@ -5,6 +5,6 @@ if [ -f /mnt/mmc3/android ]; then
 	global linux.bootargs.sec="selinux=0 enforcing=0"
 fi
 
-global.bootm.image="/mnt/mmc3/linuximage"
+global.bootm.image="/mnt/mmc3/zImage"
 global.bootm.oftree="/mnt/mmc3/oftree"
 global.linux.bootargs.dyn.root="root=/dev/mmcblk3p2 rootwait rw"
diff --git a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/mmc b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/mmc
index df874f0a38..3e175122dd 100644
--- a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/mmc
+++ b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/mmc
@@ -5,6 +5,6 @@ if [ -f /mnt/mmc/android ]; then
 	global linux.bootargs.sec="selinux=0 enforcing=0"
 fi
 
-global.bootm.image="/mnt/mmc/linuximage"
+global.bootm.image="/mnt/mmc/zImage"
 global.bootm.oftree="/mnt/mmc/oftree"
 global.linux.bootargs.dyn.root="root=/dev/mmcblk0p2 rootwait rw"
-- 
2.16.1


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^ permalink raw reply	[flat|nested] 17+ messages in thread
end of thread, other threads:[~2018-04-12  7:30 UTC | newest]

Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-04-12  7:30 [PATCH 00/16] ARM: i.MX: phyCORE/phyFLEX i.MX6 updates Sascha Hauer
2018-04-12  7:30 ` [PATCH 01/16] ARM: i.MX: phytec-som-imx: Remove kernel and oftree partiton in NAND Sascha Hauer
2018-04-12  7:30 ` [PATCH 02/16] ARM: i.MX: phytec-som-imx: env: automount emmc if available Sascha Hauer
2018-04-12  7:30 ` [PATCH 03/16] ARM: i.MX: phytec-som-imx: env: add boot script for emmc Sascha Hauer
2018-04-12  7:30 ` [PATCH 04/16] ARM: i.MX: phytec-som-imx: env: add android boot options Sascha Hauer
2018-04-12  7:30 ` [PATCH 05/16] ARM: dts: imx6qdl: phycore: Sync muxing with kernel Sascha Hauer
2018-04-12  7:30 ` [PATCH 06/16] ARM: i.MX: phytec-som-imx6: add boot device emmc Sascha Hauer
2018-04-12  7:30 ` [PATCH 07/16] ARM: i.MX: phytec-som-imx6: phycore: Set BUCK mode to SYNC Sascha Hauer
2018-04-12  7:30 ` [PATCH 08/16] ARM: i.MX: phyFLEX: Change Ram Timing for i.MX6 DualLite\Solo (400 MHz) Sascha Hauer
2018-04-12  7:30 ` [PATCH 09/16] ARM: dts: phyCORE-imx6: Add SPINOR env node Sascha Hauer
2018-04-12  7:30 ` [PATCH 10/16] ARM: i.MX: phytec-som-imx6: add phyCORE-i.MX6 QuadPlus with 1GiB RAM Sascha Hauer
2018-04-12  7:30 ` [PATCH 11/16] ARM: i.MX: phytec-som-imx6: add phyCORE-i.MX6 Solo " Sascha Hauer
2018-04-12  7:30 ` [PATCH 12/16] ARM: dts: imx6: phyboard-mira: Add usb support Sascha Hauer
2018-04-12  7:30 ` [PATCH 13/16] ARM: dts: imx6: phyboard-mira: Enable usb host and usb otg port Sascha Hauer
2018-04-12  7:30 ` [PATCH 14/16] ARM: dts: imx6: phyboard-mira: Remove unecessary iomuxc subnode Sascha Hauer
2018-04-12  7:30 ` [PATCH 15/16] ARM: dts: phycore-imx6: Use generic jedec spi nor compatible Sascha Hauer
2018-04-12  7:30 ` [PATCH 16/16] ARM: i.MX: phytec-som-imx6: Change kernel boot image to zImage Sascha Hauer

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