* [PATCH v2 01/10] common: reset_source: Add the notion of "reset source instance"
2018-04-21 1:05 [PATCH v2 00/10] i.MX reset reason detection support Andrey Smirnov
@ 2018-04-21 1:05 ` Andrey Smirnov
2018-04-21 1:05 ` [PATCH v2 02/10] ARM: i.MX: Add infrastructure to record SoC reset reason Andrey Smirnov
` (9 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Andrey Smirnov @ 2018-04-21 1:05 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
In order to accomodate SoCs that come with multiple watchdogs (or any
other reset sources of the same kind) add a notion of "reset source
instance", similar to what we already have for bootsource API.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
common/reset_source.c | 17 +++++++++++++++++
include/reset_source.h | 11 +++++++++++
2 files changed, 28 insertions(+)
diff --git a/common/reset_source.c b/common/reset_source.c
index 06e2ca85f..6a6c4f5da 100644
--- a/common/reset_source.c
+++ b/common/reset_source.c
@@ -32,6 +32,7 @@ static const char * const reset_src_names[] = {
static enum reset_src_type reset_source;
static unsigned int reset_source_priority;
+static int reset_source_instance;
enum reset_src_type reset_source_get(void)
{
@@ -39,6 +40,12 @@ enum reset_src_type reset_source_get(void)
}
EXPORT_SYMBOL(reset_source_get);
+int reset_source_get_instance(void)
+{
+ return reset_source_instance;
+}
+EXPORT_SYMBOL(reset_source_get_instance);
+
void reset_source_set_priority(enum reset_src_type st, unsigned int priority)
{
if (priority <= reset_source_priority)
@@ -46,17 +53,27 @@ void reset_source_set_priority(enum reset_src_type st, unsigned int priority)
reset_source = st;
reset_source_priority = priority;
+ reset_source_instance = 0;
pr_debug("Setting reset source to %s with priority %d\n",
reset_src_names[reset_source], priority);
}
EXPORT_SYMBOL(reset_source_set_priority);
+void reset_source_set_instance(enum reset_src_type type, int instance)
+{
+ if (reset_source == type)
+ reset_source_instance = instance;
+}
+EXPORT_SYMBOL(reset_source_set_instance);
+
static int reset_source_init(void)
{
globalvar_add_simple_enum("system.reset", (unsigned int *)&reset_source,
reset_src_names, ARRAY_SIZE(reset_src_names));
+ globalvar_add_simple_int("system.reset_instance", &reset_source_instance,
+ "%d");
return 0;
}
diff --git a/include/reset_source.h b/include/reset_source.h
index 3ff06b70a..c9911c008 100644
--- a/include/reset_source.h
+++ b/include/reset_source.h
@@ -27,6 +27,8 @@ enum reset_src_type {
#ifdef CONFIG_RESET_SOURCE
void reset_source_set_priority(enum reset_src_type, unsigned int priority);
enum reset_src_type reset_source_get(void);
+void reset_source_set_instance(enum reset_src_type type, int instance);
+int reset_source_get_instance(void);
unsigned int of_get_reset_source_priority(struct device_node *node);
#else
static inline void reset_source_set_priority(enum reset_src_type type,
@@ -34,11 +36,20 @@ static inline void reset_source_set_priority(enum reset_src_type type,
{
}
+static inline void reset_source_set_instance(enum reset_src_type type, int instance)
+{
+}
+
static inline enum reset_src_type reset_source_get(void)
{
return RESET_UKWN;
}
+static inline int reset_source_get_instance(void)
+{
+ return 0;
+}
+
static inline unsigned int of_get_reset_source_priority(struct device_node *node)
{
return 0;
--
2.14.3
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^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v2 02/10] ARM: i.MX: Add infrastructure to record SoC reset reason
2018-04-21 1:05 [PATCH v2 00/10] i.MX reset reason detection support Andrey Smirnov
2018-04-21 1:05 ` [PATCH v2 01/10] common: reset_source: Add the notion of "reset source instance" Andrey Smirnov
@ 2018-04-21 1:05 ` Andrey Smirnov
2018-04-21 1:05 ` [PATCH v2 03/10] ARM: i.MX6: Record reset reason as a part of startup Andrey Smirnov
` (8 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Andrey Smirnov @ 2018-04-21 1:05 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/imx.c | 33 +++++++++++++++++++++++++++
arch/arm/mach-imx/include/mach/reset-reason.h | 25 ++++++++++++++++++++
2 files changed, 58 insertions(+)
create mode 100644 arch/arm/mach-imx/include/mach/reset-reason.h
diff --git a/arch/arm/mach-imx/imx.c b/arch/arm/mach-imx/imx.c
index 9400105c6..29dad9a41 100644
--- a/arch/arm/mach-imx/imx.c
+++ b/arch/arm/mach-imx/imx.c
@@ -14,8 +14,10 @@
#include <common.h>
#include <of.h>
#include <init.h>
+#include <io.h>
#include <mach/revision.h>
#include <mach/generic.h>
+#include <mach/reset-reason.h>
static int __imx_silicon_revision = IMX_CHIP_REV_UNKNOWN;
@@ -147,3 +149,34 @@ static int imx_init(void)
return ret;
}
postcore_initcall(imx_init);
+
+void imx_set_reset_reason(void __iomem *srsr,
+ const struct imx_reset_reason *reasons)
+{
+ enum reset_src_type type = RESET_UKWN;
+ const u32 reg = readl(srsr);
+ int i, instance = 0;
+
+ /*
+ * SRSR register captures ALL reset event that occured since
+ * POR, so we need to clear it to make sure we only caputre
+ * the latest one.
+ */
+ writel(reg, srsr);
+
+ for (i = 0; reasons[i].mask; i++) {
+ if (reg & reasons[i].mask) {
+ type = reasons[i].type;
+ instance = reasons[i].instance;
+ break;
+ }
+ }
+
+ /*
+ * Report this with above default priority in order to make
+ * sure we'll always override info from watchdog driver.
+ */
+ reset_source_set_priority(type,
+ RESET_SOURCE_DEFAULT_PRIORITY + 1);
+ reset_source_set_instance(type, instance);
+}
diff --git a/arch/arm/mach-imx/include/mach/reset-reason.h b/arch/arm/mach-imx/include/mach/reset-reason.h
new file mode 100644
index 000000000..39afc4b28
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/reset-reason.h
@@ -0,0 +1,25 @@
+#ifndef __MACH_RESET_REASON_H__
+#define __MACH_RESET_REASON_H__
+
+#include <reset_source.h>
+
+#define IMX_SRC_SRSR_IPP_RESET BIT(0)
+#define IMX_SRC_SRSR_CSU_RESET BIT(1)
+#define IMX_SRC_SRSR_IPP_USER_RESET BIT(3)
+#define IMX_SRC_SRSR_WDOG1_RESET BIT(4)
+#define IMX_SRC_SRSR_JTAG_RESET BIT(5)
+#define IMX_SRC_SRSR_JTAG_SW_RESET BIT(6)
+#define IMX_SRC_SRSR_WDOG3_RESET BIT(7)
+#define IMX_SRC_SRSR_WDOG4_RESET BIT(8)
+#define IMX_SRC_SRSR_TEMPSENSE_RESET BIT(9)
+#define IMX_SRC_SRSR_WARM_BOOT BIT(16)
+
+struct imx_reset_reason {
+ uint32_t mask;
+ enum reset_src_type type;
+ int instance;
+};
+
+void imx_set_reset_reason(void __iomem *, const struct imx_reset_reason *);
+
+#endif /* __MACH_RESET_REASON_H__ */
--
2.14.3
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^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v2 03/10] ARM: i.MX6: Record reset reason as a part of startup
2018-04-21 1:05 [PATCH v2 00/10] i.MX reset reason detection support Andrey Smirnov
2018-04-21 1:05 ` [PATCH v2 01/10] common: reset_source: Add the notion of "reset source instance" Andrey Smirnov
2018-04-21 1:05 ` [PATCH v2 02/10] ARM: i.MX: Add infrastructure to record SoC reset reason Andrey Smirnov
@ 2018-04-21 1:05 ` Andrey Smirnov
2018-05-02 14:42 ` Jan Lübbe
2018-04-21 1:05 ` [PATCH v2 04/10] ARM: i.MX7: " Andrey Smirnov
` (7 subsequent siblings)
10 siblings, 1 reply; 15+ messages in thread
From: Andrey Smirnov @ 2018-04-21 1:05 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/imx6.c | 13 ++++++++++++-
arch/arm/mach-imx/include/mach/reset-reason.h | 2 ++
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index 88165adee..49610bf08 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -19,6 +19,7 @@
#include <mach/imx6.h>
#include <mach/generic.h>
#include <mach/revision.h>
+#include <mach/reset-reason.h>
#include <mach/imx6-anadig.h>
#include <mach/imx6-regs.h>
#include <mach/generic.h>
@@ -173,10 +174,20 @@ int imx6_cpu_revision(void)
return soc_revision;
}
+static const struct imx_reset_reason imx6_reset_reasons[] = {
+ { IMX_SRC_SRSR_IPP_RESET, RESET_POR, 0 },
+ { IMX_SRC_SRSR_WDOG1_RESET, RESET_WDG, 0 },
+ { IMX_SRC_SRSR_JTAG_RESET, RESET_JTAG, 0 },
+ { IMX_SRC_SRSR_JTAG_SW_RESET, RESET_JTAG, 0 },
+ { IMX_SRC_SRSR_WARM_BOOT, RESET_RST, 0 },
+ { /* sentinel */ }
+};
+
int imx6_init(void)
{
const char *cputypestr;
u32 mx6_silicon_revision;
+ void __iomem *src = IOMEM(MX6_SRC_BASE_ADDR);
imx6_init_lowlevel();
@@ -221,7 +232,7 @@ int imx6_init(void)
}
imx_set_silicon_revision(cputypestr, mx6_silicon_revision);
-
+ imx_set_reset_reason(src + IMX6_SRC_SRSR, imx6_reset_reasons);
imx6_setup_ipu_qos();
imx6ul_enet_clk_init();
diff --git a/arch/arm/mach-imx/include/mach/reset-reason.h b/arch/arm/mach-imx/include/mach/reset-reason.h
index 39afc4b28..f2544a303 100644
--- a/arch/arm/mach-imx/include/mach/reset-reason.h
+++ b/arch/arm/mach-imx/include/mach/reset-reason.h
@@ -14,6 +14,8 @@
#define IMX_SRC_SRSR_TEMPSENSE_RESET BIT(9)
#define IMX_SRC_SRSR_WARM_BOOT BIT(16)
+#define IMX6_SRC_SRSR 0x008
+
struct imx_reset_reason {
uint32_t mask;
enum reset_src_type type;
--
2.14.3
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^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH v2 03/10] ARM: i.MX6: Record reset reason as a part of startup
2018-04-21 1:05 ` [PATCH v2 03/10] ARM: i.MX6: Record reset reason as a part of startup Andrey Smirnov
@ 2018-05-02 14:42 ` Jan Lübbe
2018-05-02 17:46 ` Andrey Smirnov
0 siblings, 1 reply; 15+ messages in thread
From: Jan Lübbe @ 2018-05-02 14:42 UTC (permalink / raw)
To: Andrey Smirnov, barebox
There is already code in drivers/watchdog/imxwd.c to handle this. Is
that obsolete now?
On Fri, 2018-04-20 at 18:05 -0700, Andrey Smirnov wrote:
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> ---
> arch/arm/mach-imx/imx6.c | 13 ++++++++++++-
> arch/arm/mach-imx/include/mach/reset-reason.h | 2 ++
> 2 files changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
> index 88165adee..49610bf08 100644
> --- a/arch/arm/mach-imx/imx6.c
> +++ b/arch/arm/mach-imx/imx6.c
> @@ -19,6 +19,7 @@
> #include <mach/imx6.h>
> #include <mach/generic.h>
> #include <mach/revision.h>
> +#include <mach/reset-reason.h>
> #include <mach/imx6-anadig.h>
> #include <mach/imx6-regs.h>
> #include <mach/generic.h>
> @@ -173,10 +174,20 @@ int imx6_cpu_revision(void)
> return soc_revision;
> }
>
> +static const struct imx_reset_reason imx6_reset_reasons[] = {
> + { IMX_SRC_SRSR_IPP_RESET, RESET_POR, 0 },
> + { IMX_SRC_SRSR_WDOG1_RESET, RESET_WDG, 0 },
> + { IMX_SRC_SRSR_JTAG_RESET, RESET_JTAG, 0 },
> + { IMX_SRC_SRSR_JTAG_SW_RESET, RESET_JTAG, 0 },
> + { IMX_SRC_SRSR_WARM_BOOT, RESET_RST, 0 },
> + { /* sentinel */ }
> +};
> +
> int imx6_init(void)
> {
> const char *cputypestr;
> u32 mx6_silicon_revision;
> + void __iomem *src = IOMEM(MX6_SRC_BASE_ADDR);
>
> imx6_init_lowlevel();
>
> @@ -221,7 +232,7 @@ int imx6_init(void)
> }
>
> imx_set_silicon_revision(cputypestr, mx6_silicon_revision);
> -
> + imx_set_reset_reason(src + IMX6_SRC_SRSR,
> imx6_reset_reasons);
> imx6_setup_ipu_qos();
> imx6ul_enet_clk_init();
>
> diff --git a/arch/arm/mach-imx/include/mach/reset-reason.h
> b/arch/arm/mach-imx/include/mach/reset-reason.h
> index 39afc4b28..f2544a303 100644
> --- a/arch/arm/mach-imx/include/mach/reset-reason.h
> +++ b/arch/arm/mach-imx/include/mach/reset-reason.h
> @@ -14,6 +14,8 @@
> #define IMX_SRC_SRSR_TEMPSENSE_RESET BIT(9)
> #define IMX_SRC_SRSR_WARM_BOOT BIT(16)
>
> +#define IMX6_SRC_SRSR 0x008
> +
> struct imx_reset_reason {
> uint32_t mask;
> enum reset_src_type type;
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
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^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH v2 03/10] ARM: i.MX6: Record reset reason as a part of startup
2018-05-02 14:42 ` Jan Lübbe
@ 2018-05-02 17:46 ` Andrey Smirnov
2018-05-03 7:36 ` Jan Lübbe
0 siblings, 1 reply; 15+ messages in thread
From: Andrey Smirnov @ 2018-05-02 17:46 UTC (permalink / raw)
To: Jan Lübbe; +Cc: Barebox List
On Wed, May 2, 2018 at 7:42 AM, Jan Lübbe <jlu@pengutronix.de> wrote:
> There is already code in drivers/watchdog/imxwd.c to handle this. Is
> that obsolete now?
>
AFAIK, watchdog IP block doesn't have as precise information about
reset source as SRSR register on i.MX SoCs that have the latter.
There, this code supersedes imxwd.c. OTHO SoCs that don't have SRSR
(i.MX21, i.MX31, etc) still rely on code imxwd.c for reset source
detection.
Hope this answers your question.
Thanks,
Andrey Smirnov
> On Fri, 2018-04-20 at 18:05 -0700, Andrey Smirnov wrote:
>> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
>> ---
>> arch/arm/mach-imx/imx6.c | 13 ++++++++++++-
>> arch/arm/mach-imx/include/mach/reset-reason.h | 2 ++
>> 2 files changed, 14 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
>> index 88165adee..49610bf08 100644
>> --- a/arch/arm/mach-imx/imx6.c
>> +++ b/arch/arm/mach-imx/imx6.c
>> @@ -19,6 +19,7 @@
>> #include <mach/imx6.h>
>> #include <mach/generic.h>
>> #include <mach/revision.h>
>> +#include <mach/reset-reason.h>
>> #include <mach/imx6-anadig.h>
>> #include <mach/imx6-regs.h>
>> #include <mach/generic.h>
>> @@ -173,10 +174,20 @@ int imx6_cpu_revision(void)
>> return soc_revision;
>> }
>>
>> +static const struct imx_reset_reason imx6_reset_reasons[] = {
>> + { IMX_SRC_SRSR_IPP_RESET, RESET_POR, 0 },
>> + { IMX_SRC_SRSR_WDOG1_RESET, RESET_WDG, 0 },
>> + { IMX_SRC_SRSR_JTAG_RESET, RESET_JTAG, 0 },
>> + { IMX_SRC_SRSR_JTAG_SW_RESET, RESET_JTAG, 0 },
>> + { IMX_SRC_SRSR_WARM_BOOT, RESET_RST, 0 },
>> + { /* sentinel */ }
>> +};
>> +
>> int imx6_init(void)
>> {
>> const char *cputypestr;
>> u32 mx6_silicon_revision;
>> + void __iomem *src = IOMEM(MX6_SRC_BASE_ADDR);
>>
>> imx6_init_lowlevel();
>>
>> @@ -221,7 +232,7 @@ int imx6_init(void)
>> }
>>
>> imx_set_silicon_revision(cputypestr, mx6_silicon_revision);
>> -
>> + imx_set_reset_reason(src + IMX6_SRC_SRSR,
>> imx6_reset_reasons);
>> imx6_setup_ipu_qos();
>> imx6ul_enet_clk_init();
>>
>> diff --git a/arch/arm/mach-imx/include/mach/reset-reason.h
>> b/arch/arm/mach-imx/include/mach/reset-reason.h
>> index 39afc4b28..f2544a303 100644
>> --- a/arch/arm/mach-imx/include/mach/reset-reason.h
>> +++ b/arch/arm/mach-imx/include/mach/reset-reason.h
>> @@ -14,6 +14,8 @@
>> #define IMX_SRC_SRSR_TEMPSENSE_RESET BIT(9)
>> #define IMX_SRC_SRSR_WARM_BOOT BIT(16)
>>
>> +#define IMX6_SRC_SRSR 0x008
>> +
>> struct imx_reset_reason {
>> uint32_t mask;
>> enum reset_src_type type;
> --
> Pengutronix e.K. | |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH v2 03/10] ARM: i.MX6: Record reset reason as a part of startup
2018-05-02 17:46 ` Andrey Smirnov
@ 2018-05-03 7:36 ` Jan Lübbe
0 siblings, 0 replies; 15+ messages in thread
From: Jan Lübbe @ 2018-05-03 7:36 UTC (permalink / raw)
To: Andrey Smirnov; +Cc: Barebox List
On Wed, 2018-05-02 at 10:46 -0700, Andrey Smirnov wrote:
> On Wed, May 2, 2018 at 7:42 AM, Jan Lübbe <jlu@pengutronix.de> wrote:
> > There is already code in drivers/watchdog/imxwd.c to handle this.
> > Is that obsolete now?
>
> AFAIK, watchdog IP block doesn't have as precise information about
> reset source as SRSR register on i.MX SoCs that have the latter.
> There, this code supersedes imxwd.c. OTHO SoCs that don't have SRSR
> (i.MX21, i.MX31, etc) still rely on code imxwd.c for reset source
> detection.
>
> Hope this answers your question.
Yes, thanks. I didn't realize that these were different registers.
Regards,
Jan
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 04/10] ARM: i.MX7: Record reset reason as a part of startup
2018-04-21 1:05 [PATCH v2 00/10] i.MX reset reason detection support Andrey Smirnov
` (2 preceding siblings ...)
2018-04-21 1:05 ` [PATCH v2 03/10] ARM: i.MX6: Record reset reason as a part of startup Andrey Smirnov
@ 2018-04-21 1:05 ` Andrey Smirnov
2018-04-21 1:05 ` [PATCH v2 05/10] common: reset_source: Introduce reset_source_name() Andrey Smirnov
` (6 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Andrey Smirnov @ 2018-04-21 1:05 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/imx7.c | 14 ++++++++++++++
arch/arm/mach-imx/include/mach/reset-reason.h | 1 +
2 files changed, 15 insertions(+)
diff --git a/arch/arm/mach-imx/imx7.c b/arch/arm/mach-imx/imx7.c
index 4eef99c87..5ad91c2d7 100644
--- a/arch/arm/mach-imx/imx7.c
+++ b/arch/arm/mach-imx/imx7.c
@@ -19,6 +19,7 @@
#include <mach/imx7.h>
#include <mach/generic.h>
#include <mach/revision.h>
+#include <mach/reset-reason.h>
#include <mach/imx7-regs.h>
void imx7_init_lowlevel(void)
@@ -167,10 +168,22 @@ static struct psci_ops imx7_psci_ops = {
.cpu_off = imx7_cpu_off,
};
+static const struct imx_reset_reason imx7_reset_reasons[] = {
+ { IMX_SRC_SRSR_IPP_RESET, RESET_POR, 0 },
+ { IMX_SRC_SRSR_WDOG1_RESET, RESET_WDG, 0 },
+ { IMX_SRC_SRSR_JTAG_RESET, RESET_JTAG, 0 },
+ { IMX_SRC_SRSR_JTAG_SW_RESET, RESET_JTAG, 0 },
+ { IMX_SRC_SRSR_WDOG3_RESET, RESET_WDG, 1 },
+ { IMX_SRC_SRSR_WDOG4_RESET, RESET_WDG, 2 },
+ { IMX_SRC_SRSR_TEMPSENSE_RESET, RESET_THERM, 0 },
+ { /* sentinel */ }
+};
+
int imx7_init(void)
{
const char *cputypestr;
u32 imx7_silicon_revision;
+ void __iomem *src = IOMEM(MX7_SRC_BASE_ADDR);
imx7_init_lowlevel();
@@ -197,6 +210,7 @@ int imx7_init(void)
}
imx_set_silicon_revision(cputypestr, imx7_silicon_revision);
+ imx_set_reset_reason(src + IMX7_SRC_SRSR, imx7_reset_reasons);
return 0;
}
diff --git a/arch/arm/mach-imx/include/mach/reset-reason.h b/arch/arm/mach-imx/include/mach/reset-reason.h
index f2544a303..96e52486c 100644
--- a/arch/arm/mach-imx/include/mach/reset-reason.h
+++ b/arch/arm/mach-imx/include/mach/reset-reason.h
@@ -15,6 +15,7 @@
#define IMX_SRC_SRSR_WARM_BOOT BIT(16)
#define IMX6_SRC_SRSR 0x008
+#define IMX7_SRC_SRSR 0x05c
struct imx_reset_reason {
uint32_t mask;
--
2.14.3
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^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v2 05/10] common: reset_source: Introduce reset_source_name()
2018-04-21 1:05 [PATCH v2 00/10] i.MX reset reason detection support Andrey Smirnov
` (3 preceding siblings ...)
2018-04-21 1:05 ` [PATCH v2 04/10] ARM: i.MX7: " Andrey Smirnov
@ 2018-04-21 1:05 ` Andrey Smirnov
2018-04-21 1:05 ` [PATCH v2 06/10] ARM: i.MX: Log detected reset reason Andrey Smirnov
` (5 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Andrey Smirnov @ 2018-04-21 1:05 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Introduce reset_source_name() to get string representation of current
reset source.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
common/reset_source.c | 6 ++++++
include/reset_source.h | 6 ++++++
2 files changed, 12 insertions(+)
diff --git a/common/reset_source.c b/common/reset_source.c
index 6a6c4f5da..b2985ee85 100644
--- a/common/reset_source.c
+++ b/common/reset_source.c
@@ -60,6 +60,12 @@ void reset_source_set_priority(enum reset_src_type st, unsigned int priority)
}
EXPORT_SYMBOL(reset_source_set_priority);
+const char *reset_source_name(void)
+{
+ return reset_src_names[reset_source];
+}
+EXPORT_SYMBOL(reset_source_name)
+
void reset_source_set_instance(enum reset_src_type type, int instance)
{
if (reset_source == type)
diff --git a/include/reset_source.h b/include/reset_source.h
index c9911c008..f9aed6a7a 100644
--- a/include/reset_source.h
+++ b/include/reset_source.h
@@ -30,6 +30,7 @@ enum reset_src_type reset_source_get(void);
void reset_source_set_instance(enum reset_src_type type, int instance);
int reset_source_get_instance(void);
unsigned int of_get_reset_source_priority(struct device_node *node);
+const char *reset_source_name(void);
#else
static inline void reset_source_set_priority(enum reset_src_type type,
unsigned int priority)
@@ -54,6 +55,11 @@ static inline unsigned int of_get_reset_source_priority(struct device_node *node
{
return 0;
}
+
+const char *reset_source_name(void)
+{
+ return "unknown";
+}
#endif
#define RESET_SOURCE_DEFAULT_PRIORITY 100
--
2.14.3
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^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v2 06/10] ARM: i.MX: Log detected reset reason
2018-04-21 1:05 [PATCH v2 00/10] i.MX reset reason detection support Andrey Smirnov
` (4 preceding siblings ...)
2018-04-21 1:05 ` [PATCH v2 05/10] common: reset_source: Introduce reset_source_name() Andrey Smirnov
@ 2018-04-21 1:05 ` Andrey Smirnov
2018-04-21 1:05 ` [PATCH v2 07/10] ARM: i.MX: Print "revision unknown" if that is the case Andrey Smirnov
` (4 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Andrey Smirnov @ 2018-04-21 1:05 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Log detected reset reason as well as raw value of SRSR for better
clarity.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/imx.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-imx/imx.c b/arch/arm/mach-imx/imx.c
index 29dad9a41..7dee1433b 100644
--- a/arch/arm/mach-imx/imx.c
+++ b/arch/arm/mach-imx/imx.c
@@ -179,4 +179,7 @@ void imx_set_reset_reason(void __iomem *srsr,
reset_source_set_priority(type,
RESET_SOURCE_DEFAULT_PRIORITY + 1);
reset_source_set_instance(type, instance);
+
+ pr_info("i.MX reset reason %s (SRSR: 0x%08x)\n",
+ reset_source_name(), reg);
}
--
2.14.3
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^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v2 07/10] ARM: i.MX: Print "revision unknown" if that is the case
2018-04-21 1:05 [PATCH v2 00/10] i.MX reset reason detection support Andrey Smirnov
` (5 preceding siblings ...)
2018-04-21 1:05 ` [PATCH v2 06/10] ARM: i.MX: Log detected reset reason Andrey Smirnov
@ 2018-04-21 1:05 ` Andrey Smirnov
2018-04-21 1:05 ` [PATCH v2 08/10] ARM: VFxxx: Add code to detect cpu variant Andrey Smirnov
` (3 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Andrey Smirnov @ 2018-04-21 1:05 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Printing "revision 16.16" if i.MX SoC's revision is unknown is a bit
confusing so modify the code to actually say "revision unknown" in
such a case.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/imx.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/imx.c b/arch/arm/mach-imx/imx.c
index 7dee1433b..32d8e11a7 100644
--- a/arch/arm/mach-imx/imx.c
+++ b/arch/arm/mach-imx/imx.c
@@ -30,7 +30,10 @@ void imx_set_silicon_revision(const char *soc, int revision)
{
__imx_silicon_revision = revision;
- pr_info("detected %s revision %d.%d\n", soc,
+ if (revision == IMX_CHIP_REV_UNKNOWN)
+ pr_info("detected %s revision unknown\n", soc);
+ else
+ pr_info("detected %s revision %d.%d\n", soc,
(revision >> 4) & 0xf,
revision & 0xf);
}
--
2.14.3
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^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v2 08/10] ARM: VFxxx: Add code to detect cpu variant
2018-04-21 1:05 [PATCH v2 00/10] i.MX reset reason detection support Andrey Smirnov
` (6 preceding siblings ...)
2018-04-21 1:05 ` [PATCH v2 07/10] ARM: i.MX: Print "revision unknown" if that is the case Andrey Smirnov
@ 2018-04-21 1:05 ` Andrey Smirnov
2018-04-21 1:05 ` [PATCH v2 09/10] ARM: VFxxx: Detect cpu variant on start Andrey Smirnov
` (2 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Andrey Smirnov @ 2018-04-21 1:05 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/include/mach/vf610-regs.h | 3 ++
arch/arm/mach-imx/include/mach/vf610.h | 51 +++++++++++++++++++++++++++++
2 files changed, 54 insertions(+)
create mode 100644 arch/arm/mach-imx/include/mach/vf610.h
diff --git a/arch/arm/mach-imx/include/mach/vf610-regs.h b/arch/arm/mach-imx/include/mach/vf610-regs.h
index 87772ee76..416b457af 100644
--- a/arch/arm/mach-imx/include/mach/vf610-regs.h
+++ b/arch/arm/mach-imx/include/mach/vf610-regs.h
@@ -109,4 +109,7 @@
#define VF610_MSCM_IRSPRC_CP0_EN 1
#define VF610_MSCM_IRSPRC_NUM 112
+#define VF610_MSCM_CPxCOUNT 0x00c
+#define VF610_MSCM_CPxCFG1 0x014
+
#endif
diff --git a/arch/arm/mach-imx/include/mach/vf610.h b/arch/arm/mach-imx/include/mach/vf610.h
new file mode 100644
index 000000000..6d00d2e45
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/vf610.h
@@ -0,0 +1,51 @@
+#ifndef __MACH_VF610_H
+#define __MACH_VF610_H
+
+#include <io.h>
+#include <mach/generic.h>
+#include <mach/vf610-regs.h>
+#include <mach/revision.h>
+
+#define VF610_CPUTYPE_VFx10 0x010
+
+#define VF610_CPUTYPE_VF610 0x610
+#define VF610_CPUTYPE_VF600 0x600
+#define VF610_CPUTYPE_VF510 0x510
+#define VF610_CPUTYPE_VF500 0x500
+
+#define VF610_ROM_VERSION_OFFSET 0x80
+
+static inline int __vf610_cpu_type(void)
+{
+ void __iomem *mscm = IOMEM(VF610_MSCM_BASE_ADDR);
+ const u32 cpxcount = readl(mscm + VF610_MSCM_CPxCOUNT);
+ const u32 cpxcfg1 = readl(mscm + VF610_MSCM_CPxCFG1);
+ int cpu_type;
+
+ cpu_type = cpxcount ? VF610_CPUTYPE_VF600 : VF610_CPUTYPE_VF500;
+
+ return cpxcfg1 ? cpu_type | VF610_CPUTYPE_VFx10 : cpu_type;
+}
+
+static inline int vf610_cpu_type(void)
+{
+ if (!cpu_is_vf610())
+ return 0;
+
+ return __vf610_cpu_type();
+}
+
+static inline int vf610_cpu_revision(void)
+{
+ if (!cpu_is_vf610())
+ return IMX_CHIP_REV_UNKNOWN;
+
+ /*
+ * There doesn't seem to be a documented way of retreiving
+ * silicon revision on VFxxx cpus, so we just report Mask ROM
+ * version instead
+ */
+ return readl(VF610_ROM_VERSION_OFFSET) & 0xff;
+}
+
+#endif
--
2.14.3
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^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v2 09/10] ARM: VFxxx: Detect cpu variant on start
2018-04-21 1:05 [PATCH v2 00/10] i.MX reset reason detection support Andrey Smirnov
` (7 preceding siblings ...)
2018-04-21 1:05 ` [PATCH v2 08/10] ARM: VFxxx: Add code to detect cpu variant Andrey Smirnov
@ 2018-04-21 1:05 ` Andrey Smirnov
2018-04-21 1:05 ` [PATCH v2 10/10] ARM: VFxxx: Record reset reason as a part of startup Andrey Smirnov
2018-04-26 12:54 ` [PATCH v2 00/10] i.MX reset reason detection support Sascha Hauer
10 siblings, 0 replies; 15+ messages in thread
From: Andrey Smirnov @ 2018-04-21 1:05 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/Makefile | 1 +
arch/arm/mach-imx/imx.c | 2 +-
arch/arm/mach-imx/include/mach/generic.h | 1 +
arch/arm/mach-imx/vf610.c | 47 ++++++++++++++++++++++++++++++++
4 files changed, 50 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/mach-imx/vf610.c
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 8ec846cce..160ed4b08 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_ARCH_IMX6) += imx6.o usb-imx6.o
CFLAGS_imx6.o := -march=armv7-a
lwl-$(CONFIG_ARCH_IMX6) += imx6-mmdc.o
obj-$(CONFIG_ARCH_IMX7) += imx7.o
+obj-$(CONFIG_ARCH_VF610) += vf610.o
obj-$(CONFIG_ARCH_IMX_XLOAD) += xload.o
obj-$(CONFIG_IMX_IIM) += iim.o
obj-$(CONFIG_IMX_OCOTP) += ocotp.o
diff --git a/arch/arm/mach-imx/imx.c b/arch/arm/mach-imx/imx.c
index 32d8e11a7..bf15f0b06 100644
--- a/arch/arm/mach-imx/imx.c
+++ b/arch/arm/mach-imx/imx.c
@@ -119,7 +119,7 @@ static int imx_init(void)
else if (cpu_is_mx7())
ret = imx7_init();
else if (cpu_is_vf610())
- ret = 0;
+ ret = vf610_init();
else
return -EINVAL;
diff --git a/arch/arm/mach-imx/include/mach/generic.h b/arch/arm/mach-imx/include/mach/generic.h
index dedb4bbf0..ad9d9cb02 100644
--- a/arch/arm/mach-imx/include/mach/generic.h
+++ b/arch/arm/mach-imx/include/mach/generic.h
@@ -36,6 +36,7 @@ int imx51_init(void);
int imx53_init(void);
int imx6_init(void);
int imx7_init(void);
+int vf610_init(void);
int imx1_devices_init(void);
int imx21_devices_init(void);
diff --git a/arch/arm/mach-imx/vf610.c b/arch/arm/mach-imx/vf610.c
new file mode 100644
index 000000000..c2d02632f
--- /dev/null
+++ b/arch/arm/mach-imx/vf610.c
@@ -0,0 +1,47 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <init.h>
+#include <common.h>
+#include <io.h>
+#include <linux/sizes.h>
+#include <mach/generic.h>
+#include <mach/revision.h>
+#include <mach/vf610.h>
+
+int vf610_init(void)
+{
+ const char *cputypestr;
+ void __iomem *src = IOMEM(VF610_SRC_BASE_ADDR);
+
+ switch (vf610_cpu_type()) {
+ case VF610_CPUTYPE_VF610:
+ cputypestr = "VF610";
+ break;
+ case VF610_CPUTYPE_VF600:
+ cputypestr = "VF600";
+ break;
+ case VF610_CPUTYPE_VF510:
+ cputypestr = "VF510";
+ break;
+ case VF610_CPUTYPE_VF500:
+ cputypestr = "VF500";
+ break;
+ default:
+ cputypestr = "unknown VFxxx";
+ break;
+ }
+
+ imx_set_silicon_revision(cputypestr, vf610_cpu_revision());
+ return 0;
+}
--
2.14.3
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^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v2 10/10] ARM: VFxxx: Record reset reason as a part of startup
2018-04-21 1:05 [PATCH v2 00/10] i.MX reset reason detection support Andrey Smirnov
` (8 preceding siblings ...)
2018-04-21 1:05 ` [PATCH v2 09/10] ARM: VFxxx: Detect cpu variant on start Andrey Smirnov
@ 2018-04-21 1:05 ` Andrey Smirnov
2018-04-26 12:54 ` [PATCH v2 00/10] i.MX reset reason detection support Sascha Hauer
10 siblings, 0 replies; 15+ messages in thread
From: Andrey Smirnov @ 2018-04-21 1:05 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/include/mach/reset-reason.h | 9 +++++++++
arch/arm/mach-imx/vf610.c | 12 ++++++++++++
2 files changed, 21 insertions(+)
diff --git a/arch/arm/mach-imx/include/mach/reset-reason.h b/arch/arm/mach-imx/include/mach/reset-reason.h
index 96e52486c..4919f68d5 100644
--- a/arch/arm/mach-imx/include/mach/reset-reason.h
+++ b/arch/arm/mach-imx/include/mach/reset-reason.h
@@ -16,6 +16,15 @@
#define IMX6_SRC_SRSR 0x008
#define IMX7_SRC_SRSR 0x05c
+#define VF610_SRC_SRSR 0x008
+
+
+#define VF610_SRC_SRSR_SW_RST BIT(18)
+#define VF610_SRC_SRSR_RESETB BIT(7)
+#define VF610_SRC_SRSR_JTAG_RST BIT(5)
+#define VF610_SRC_SRSR_WDOG_M4 BIT(4)
+#define VF610_SRC_SRSR_WDOG_A5 BIT(3)
+#define VF610_SRC_SRSR_POR_RST BIT(0)
struct imx_reset_reason {
uint32_t mask;
diff --git a/arch/arm/mach-imx/vf610.c b/arch/arm/mach-imx/vf610.c
index c2d02632f..df8cfcd6b 100644
--- a/arch/arm/mach-imx/vf610.c
+++ b/arch/arm/mach-imx/vf610.c
@@ -18,6 +18,17 @@
#include <mach/generic.h>
#include <mach/revision.h>
#include <mach/vf610.h>
+#include <mach/reset-reason.h>
+
+static const struct imx_reset_reason vf610_reset_reasons[] = {
+ { VF610_SRC_SRSR_POR_RST, RESET_POR, 0 },
+ { VF610_SRC_SRSR_WDOG_A5, RESET_WDG, 0 },
+ { VF610_SRC_SRSR_WDOG_M4, RESET_WDG, 1 },
+ { VF610_SRC_SRSR_JTAG_RST, RESET_JTAG, 0 },
+ { VF610_SRC_SRSR_RESETB, RESET_EXT, 0 },
+ { VF610_SRC_SRSR_SW_RST, RESET_RST, 0 },
+ { /* sentinel */ }
+};
int vf610_init(void)
{
@@ -43,5 +54,6 @@ int vf610_init(void)
}
imx_set_silicon_revision(cputypestr, vf610_cpu_revision());
+ imx_set_reset_reason(src + VF610_SRC_SRSR, vf610_reset_reasons);
return 0;
}
--
2.14.3
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^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH v2 00/10] i.MX reset reason detection support
2018-04-21 1:05 [PATCH v2 00/10] i.MX reset reason detection support Andrey Smirnov
` (9 preceding siblings ...)
2018-04-21 1:05 ` [PATCH v2 10/10] ARM: VFxxx: Record reset reason as a part of startup Andrey Smirnov
@ 2018-04-26 12:54 ` Sascha Hauer
10 siblings, 0 replies; 15+ messages in thread
From: Sascha Hauer @ 2018-04-26 12:54 UTC (permalink / raw)
To: Andrey Smirnov; +Cc: barebox
On Fri, Apr 20, 2018 at 06:05:28PM -0700, Andrey Smirnov wrote:
> Everyone:
>
> This patchset is the result of my work on adding support for detecting
> and reporting reset reason as can be obtained from System Reset
> Controller (to be more precise via SRSR register) on i.MX family of
> SoC.
>
> Currently list of supported SoC is as follows:
>
> - i.MX6 (tested on i.MX6Q)
> - i.MX7 (tested on i.MX7D)
> - VFxxx (tested on VF610)
>
>
> Changes since [v1]:
>
> - i.MX reset reason detection code was converted to do detect
> the source with bitmasking as opposed to having a switch
> statement, due to potential problems with the latter as was
> pointed out by Philipp in [thread1]
>
> - Change above also allowed to unify VFxxx and i.MX codepaths
> without the need to introduce a dedicated VFxxx centric
> function
>
> [v1] http://lists.infradead.org/pipermail/barebox/2018-April/032614.html
> [thread1] http://lists.infradead.org/pipermail/barebox/2018-April/032708.html
>
> Feedback is wellcome!
>
> Thanks,
> Andrey Smirnov
Applied, thanks
Sascha
>
> Andrey Smirnov (10):
> common: reset_source: Add the notion of "reset source instance"
> ARM: i.MX: Add infrastructure to record SoC reset reason
> ARM: i.MX6: Record reset reason as a part of startup
> ARM: i.MX7: Record reset reason as a part of startup
> common: reset_source: Introduce reset_source_name()
> ARM: i.MX: Log detected reset reason
> ARM: i.MX: Print "revision unknown" if that is the case
> ARM: VFxxx: Add code to detect cpu variant
> ARM: VFxxx: Detect cpu variant on start
> ARM: VFxxx: Record reset reason as a part of startup
>
> arch/arm/mach-imx/Makefile | 1 +
> arch/arm/mach-imx/imx.c | 43 ++++++++++++++++++-
> arch/arm/mach-imx/imx6.c | 13 +++++-
> arch/arm/mach-imx/imx7.c | 14 +++++++
> arch/arm/mach-imx/include/mach/generic.h | 1 +
> arch/arm/mach-imx/include/mach/reset-reason.h | 37 +++++++++++++++++
> arch/arm/mach-imx/include/mach/vf610-regs.h | 3 ++
> arch/arm/mach-imx/include/mach/vf610.h | 51 +++++++++++++++++++++++
> arch/arm/mach-imx/vf610.c | 59 +++++++++++++++++++++++++++
> common/reset_source.c | 23 +++++++++++
> include/reset_source.h | 17 ++++++++
> 11 files changed, 259 insertions(+), 3 deletions(-)
> create mode 100644 arch/arm/mach-imx/include/mach/reset-reason.h
> create mode 100644 arch/arm/mach-imx/include/mach/vf610.h
> create mode 100644 arch/arm/mach-imx/vf610.c
>
> --
> 2.14.3
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
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