* [PATCH 1/6] ARM: i.MX51: Replace expicit casts with IOMEM
2018-04-27 5:49 [PATCH 0/6] i.MX51, 53 reset reason detection support Andrey Smirnov
@ 2018-04-27 5:49 ` Andrey Smirnov
2018-04-27 5:49 ` [PATCH 2/6] ARM: i.MX: Fix incorrect IMX_SRC_SRSR_CSU_RESET Andrey Smirnov
` (5 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Andrey Smirnov @ 2018-04-27 5:49 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/imx51.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-imx/imx51.c b/arch/arm/mach-imx/imx51.c
index ffe6a7c65..13444ccdb 100644
--- a/arch/arm/mach-imx/imx51.c
+++ b/arch/arm/mach-imx/imx51.c
@@ -43,7 +43,7 @@ static int imx51_silicon_revision(void)
static void imx51_ipu_mipi_setup(void)
{
- void __iomem *hsc_addr = (void __iomem *)MX51_MIPI_HSC_BASE_ADDR;
+ void __iomem *hsc_addr = IOMEM(MX51_MIPI_HSC_BASE_ADDR);
u32 val;
/* setup MIPI module to legacy mode */
@@ -97,7 +97,7 @@ int imx51_devices_init(void)
*/
static void imx51_setup_pll800_bug(void)
{
- void __iomem *base = (void *)MX51_PLL1_BASE_ADDR;
+ void __iomem *base = IOMEM(MX51_PLL1_BASE_ADDR);
u32 dp_config;
volatile int i;
@@ -132,7 +132,7 @@ static void imx51_setup_pll800_bug(void)
void imx51_init_lowlevel(unsigned int cpufreq_mhz)
{
- void __iomem *ccm = (void __iomem *)MX51_CCM_BASE_ADDR;
+ void __iomem *ccm = IOMEM(MX51_CCM_BASE_ADDR);
u32 r;
int rev = imx51_silicon_revision();
@@ -167,30 +167,30 @@ void imx51_init_lowlevel(unsigned int cpufreq_mhz)
switch (cpufreq_mhz) {
case 600:
- imx5_setup_pll_600((void __iomem *)MX51_PLL1_BASE_ADDR);
+ imx5_setup_pll_600(IOMEM(MX51_PLL1_BASE_ADDR));
break;
default:
/* Default maximum 800MHz */
if (rev <= IMX_CHIP_REV_3_0)
imx51_setup_pll800_bug();
else
- imx5_setup_pll_800((void __iomem *)MX51_PLL1_BASE_ADDR);
+ imx5_setup_pll_800(IOMEM(MX51_PLL1_BASE_ADDR));
break;
}
- imx5_setup_pll_665((void __iomem *)MX51_PLL3_BASE_ADDR);
+ imx5_setup_pll_665(IOMEM(MX51_PLL3_BASE_ADDR));
/* Switch peripheral to PLL 3 */
writel(0x000010C0, ccm + MX5_CCM_CBCMR);
writel(0x13239145, ccm + MX5_CCM_CBCDR);
- imx5_setup_pll_665((void __iomem *)MX51_PLL2_BASE_ADDR);
+ imx5_setup_pll_665(IOMEM(MX51_PLL2_BASE_ADDR));
/* Switch peripheral to PLL2 */
writel(0x19239145, ccm + MX5_CCM_CBCDR);
writel(0x000020C0, ccm + MX5_CCM_CBCMR);
- imx5_setup_pll_216((void __iomem *)MX51_PLL3_BASE_ADDR);
+ imx5_setup_pll_216(IOMEM(MX51_PLL3_BASE_ADDR));
/* Set the platform clock dividers */
writel(0x00000125, MX51_ARM_BASE_ADDR + 0x14);
--
2.14.3
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^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 2/6] ARM: i.MX: Fix incorrect IMX_SRC_SRSR_CSU_RESET
2018-04-27 5:49 [PATCH 0/6] i.MX51, 53 reset reason detection support Andrey Smirnov
2018-04-27 5:49 ` [PATCH 1/6] ARM: i.MX51: Replace expicit casts with IOMEM Andrey Smirnov
@ 2018-04-27 5:49 ` Andrey Smirnov
2018-04-27 5:49 ` [PATCH 3/6] ARM: i.MX: Make imx6_reset_reasons global Andrey Smirnov
` (4 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Andrey Smirnov @ 2018-04-27 5:49 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
IMX_SRC_SRSR_CSU_RESET is bit 2, not 1.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/include/mach/reset-reason.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/include/mach/reset-reason.h b/arch/arm/mach-imx/include/mach/reset-reason.h
index 4919f68d5..23e73d3b5 100644
--- a/arch/arm/mach-imx/include/mach/reset-reason.h
+++ b/arch/arm/mach-imx/include/mach/reset-reason.h
@@ -4,7 +4,7 @@
#include <reset_source.h>
#define IMX_SRC_SRSR_IPP_RESET BIT(0)
-#define IMX_SRC_SRSR_CSU_RESET BIT(1)
+#define IMX_SRC_SRSR_CSU_RESET BIT(2)
#define IMX_SRC_SRSR_IPP_USER_RESET BIT(3)
#define IMX_SRC_SRSR_WDOG1_RESET BIT(4)
#define IMX_SRC_SRSR_JTAG_RESET BIT(5)
--
2.14.3
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^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 3/6] ARM: i.MX: Make imx6_reset_reasons global
2018-04-27 5:49 [PATCH 0/6] i.MX51, 53 reset reason detection support Andrey Smirnov
2018-04-27 5:49 ` [PATCH 1/6] ARM: i.MX51: Replace expicit casts with IOMEM Andrey Smirnov
2018-04-27 5:49 ` [PATCH 2/6] ARM: i.MX: Fix incorrect IMX_SRC_SRSR_CSU_RESET Andrey Smirnov
@ 2018-04-27 5:49 ` Andrey Smirnov
2018-04-27 5:49 ` [PATCH 4/6] ARM: i.MX: Introduce IMX_SRC_SRSR Andrey Smirnov
` (3 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Andrey Smirnov @ 2018-04-27 5:49 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Both i.MX51 and i.MX53 have exactly the same reset source mapping, so
rename imx6_reset_reasons to imx_reset_reasons and make it a globally
visible constant so it could be shared.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/imx.c | 9 +++++++++
arch/arm/mach-imx/imx6.c | 11 +----------
arch/arm/mach-imx/include/mach/reset-reason.h | 2 ++
3 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-imx/imx.c b/arch/arm/mach-imx/imx.c
index bf15f0b06..1b4c1b3df 100644
--- a/arch/arm/mach-imx/imx.c
+++ b/arch/arm/mach-imx/imx.c
@@ -153,6 +153,15 @@ static int imx_init(void)
}
postcore_initcall(imx_init);
+const struct imx_reset_reason imx_reset_reasons[] = {
+ { IMX_SRC_SRSR_IPP_RESET, RESET_POR, 0 },
+ { IMX_SRC_SRSR_WDOG1_RESET, RESET_WDG, 0 },
+ { IMX_SRC_SRSR_JTAG_RESET, RESET_JTAG, 0 },
+ { IMX_SRC_SRSR_JTAG_SW_RESET, RESET_JTAG, 0 },
+ { IMX_SRC_SRSR_WARM_BOOT, RESET_RST, 0 },
+ { /* sentinel */ }
+};
+
void imx_set_reset_reason(void __iomem *srsr,
const struct imx_reset_reason *reasons)
{
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index 49610bf08..dc09088ab 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -174,15 +174,6 @@ int imx6_cpu_revision(void)
return soc_revision;
}
-static const struct imx_reset_reason imx6_reset_reasons[] = {
- { IMX_SRC_SRSR_IPP_RESET, RESET_POR, 0 },
- { IMX_SRC_SRSR_WDOG1_RESET, RESET_WDG, 0 },
- { IMX_SRC_SRSR_JTAG_RESET, RESET_JTAG, 0 },
- { IMX_SRC_SRSR_JTAG_SW_RESET, RESET_JTAG, 0 },
- { IMX_SRC_SRSR_WARM_BOOT, RESET_RST, 0 },
- { /* sentinel */ }
-};
-
int imx6_init(void)
{
const char *cputypestr;
@@ -232,7 +223,7 @@ int imx6_init(void)
}
imx_set_silicon_revision(cputypestr, mx6_silicon_revision);
- imx_set_reset_reason(src + IMX6_SRC_SRSR, imx6_reset_reasons);
+ imx_set_reset_reason(src + IMX6_SRC_SRSR, imx_reset_reasons);
imx6_setup_ipu_qos();
imx6ul_enet_clk_init();
diff --git a/arch/arm/mach-imx/include/mach/reset-reason.h b/arch/arm/mach-imx/include/mach/reset-reason.h
index 23e73d3b5..0894b95ab 100644
--- a/arch/arm/mach-imx/include/mach/reset-reason.h
+++ b/arch/arm/mach-imx/include/mach/reset-reason.h
@@ -34,4 +34,6 @@ struct imx_reset_reason {
void imx_set_reset_reason(void __iomem *, const struct imx_reset_reason *);
+extern const struct imx_reset_reason imx_reset_reasons[];
+
#endif /* __MACH_RESET_REASON_H__ */
--
2.14.3
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^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 4/6] ARM: i.MX: Introduce IMX_SRC_SRSR
2018-04-27 5:49 [PATCH 0/6] i.MX51, 53 reset reason detection support Andrey Smirnov
` (2 preceding siblings ...)
2018-04-27 5:49 ` [PATCH 3/6] ARM: i.MX: Make imx6_reset_reasons global Andrey Smirnov
@ 2018-04-27 5:49 ` Andrey Smirnov
2018-04-27 5:49 ` [PATCH 5/6] ARM: i.MX53: Record reset reason as a part of startup Andrey Smirnov
` (2 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Andrey Smirnov @ 2018-04-27 5:49 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Offset for SRSR register in SRC IP block for i.MX51, i.MX53, i.MX6 and
VFxxx is exactly the same so define a single constant for that and
replace all of the SoC specific definitions.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/imx6.c | 2 +-
arch/arm/mach-imx/include/mach/reset-reason.h | 4 +---
arch/arm/mach-imx/vf610.c | 2 +-
3 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index dc09088ab..dfa861d38 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -223,7 +223,7 @@ int imx6_init(void)
}
imx_set_silicon_revision(cputypestr, mx6_silicon_revision);
- imx_set_reset_reason(src + IMX6_SRC_SRSR, imx_reset_reasons);
+ imx_set_reset_reason(src + IMX_SRC_SRSR, imx_reset_reasons);
imx6_setup_ipu_qos();
imx6ul_enet_clk_init();
diff --git a/arch/arm/mach-imx/include/mach/reset-reason.h b/arch/arm/mach-imx/include/mach/reset-reason.h
index 0894b95ab..0f644a8c1 100644
--- a/arch/arm/mach-imx/include/mach/reset-reason.h
+++ b/arch/arm/mach-imx/include/mach/reset-reason.h
@@ -14,10 +14,8 @@
#define IMX_SRC_SRSR_TEMPSENSE_RESET BIT(9)
#define IMX_SRC_SRSR_WARM_BOOT BIT(16)
-#define IMX6_SRC_SRSR 0x008
+#define IMX_SRC_SRSR 0x008
#define IMX7_SRC_SRSR 0x05c
-#define VF610_SRC_SRSR 0x008
-
#define VF610_SRC_SRSR_SW_RST BIT(18)
#define VF610_SRC_SRSR_RESETB BIT(7)
diff --git a/arch/arm/mach-imx/vf610.c b/arch/arm/mach-imx/vf610.c
index 3ac7c356f..b548cbcb5 100644
--- a/arch/arm/mach-imx/vf610.c
+++ b/arch/arm/mach-imx/vf610.c
@@ -56,6 +56,6 @@ int vf610_init(void)
}
imx_set_silicon_revision(cputypestr, vf610_cpu_revision());
- imx_set_reset_reason(src + VF610_SRC_SRSR, vf610_reset_reasons);
+ imx_set_reset_reason(src + IMX_SRC_SRSR, vf610_reset_reasons);
return 0;
}
--
2.14.3
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^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 5/6] ARM: i.MX53: Record reset reason as a part of startup
2018-04-27 5:49 [PATCH 0/6] i.MX51, 53 reset reason detection support Andrey Smirnov
` (3 preceding siblings ...)
2018-04-27 5:49 ` [PATCH 4/6] ARM: i.MX: Introduce IMX_SRC_SRSR Andrey Smirnov
@ 2018-04-27 5:49 ` Andrey Smirnov
2018-04-27 5:49 ` [PATCH 6/6] ARM: i.MX51: " Andrey Smirnov
2018-05-02 10:32 ` [PATCH 0/6] i.MX51, 53 reset reason detection support Sascha Hauer
6 siblings, 0 replies; 8+ messages in thread
From: Andrey Smirnov @ 2018-04-27 5:49 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/imx53.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-imx/imx53.c b/arch/arm/mach-imx/imx53.c
index 2758f1bbc..56f1bda75 100644
--- a/arch/arm/mach-imx/imx53.c
+++ b/arch/arm/mach-imx/imx53.c
@@ -21,6 +21,7 @@
#include <mach/revision.h>
#include <mach/clock-imx51_53.h>
#include <mach/generic.h>
+#include <mach/reset-reason.h>
#define SI_REV 0x48
@@ -52,7 +53,10 @@ static int imx53_silicon_revision(void)
int imx53_init(void)
{
+ void __iomem *src = IOMEM(MX53_SRC_BASE_ADDR);
+
imx53_silicon_revision();
+ imx_set_reset_reason(src + IMX_SRC_SRSR, imx_reset_reasons);
imx53_boot_save_loc();
add_generic_device("imx53-esdctl", 0, NULL, MX53_ESDCTL_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
--
2.14.3
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^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 6/6] ARM: i.MX51: Record reset reason as a part of startup
2018-04-27 5:49 [PATCH 0/6] i.MX51, 53 reset reason detection support Andrey Smirnov
` (4 preceding siblings ...)
2018-04-27 5:49 ` [PATCH 5/6] ARM: i.MX53: Record reset reason as a part of startup Andrey Smirnov
@ 2018-04-27 5:49 ` Andrey Smirnov
2018-05-02 10:32 ` [PATCH 0/6] i.MX51, 53 reset reason detection support Sascha Hauer
6 siblings, 0 replies; 8+ messages in thread
From: Andrey Smirnov @ 2018-04-27 5:49 UTC (permalink / raw)
To: barebox; +Cc: Andrey Smirnov
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/imx51.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-imx/imx51.c b/arch/arm/mach-imx/imx51.c
index 13444ccdb..ec8cdd868 100644
--- a/arch/arm/mach-imx/imx51.c
+++ b/arch/arm/mach-imx/imx51.c
@@ -21,6 +21,7 @@
#include <mach/revision.h>
#include <mach/clock-imx51_53.h>
#include <mach/generic.h>
+#include <mach/reset-reason.h>
#define IIM_SREV 0x24
@@ -57,7 +58,10 @@ static void imx51_ipu_mipi_setup(void)
int imx51_init(void)
{
+ void __iomem *src = IOMEM(MX51_SRC_BASE_ADDR);
+
imx_set_silicon_revision("i.MX51", imx51_silicon_revision());
+ imx_set_reset_reason(src + IMX_SRC_SRSR, imx_reset_reasons);
imx51_boot_save_loc();
add_generic_device("imx51-esdctl", 0, NULL, MX51_ESDCTL_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
imx51_ipu_mipi_setup();
--
2.14.3
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^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH 0/6] i.MX51, 53 reset reason detection support
2018-04-27 5:49 [PATCH 0/6] i.MX51, 53 reset reason detection support Andrey Smirnov
` (5 preceding siblings ...)
2018-04-27 5:49 ` [PATCH 6/6] ARM: i.MX51: " Andrey Smirnov
@ 2018-05-02 10:32 ` Sascha Hauer
6 siblings, 0 replies; 8+ messages in thread
From: Sascha Hauer @ 2018-05-02 10:32 UTC (permalink / raw)
To: Andrey Smirnov; +Cc: barebox
On Thu, Apr 26, 2018 at 10:49:40PM -0700, Andrey Smirnov wrote:
> Everyone:
>
> This patchset is a followup to "i.MX reset reason detection support"
> series I submited a couple of days ago. Mostly bits and pieces needed
> for i.MX51 and i.MX53 integration with the rest of reset reason code.
>
> Feedback is wellcome!
>
> Sascha:
>
> Let me know if you want me to squash these patches back into original
> "i.MX reset reason detection support" series and re-submit it.
Applied, thanks. No need to squash the patches.
Sascha
>
> Thanks,
> Andrey Smirnov
>
> Andrey Smirnov (6):
> ARM: i.MX51: Replace expicit casts with IOMEM
> ARM: i.MX: Fix incorrect IMX_SRC_SRSR_CSU_RESET
> ARM: i.MX: Make imx6_reset_reasons global
> ARM: i.MX: Introduce IMX_SRC_SRSR
> ARM: i.MX53: Record reset reason as a part of startup
> ARM: i.MX51: Record reset reason as a part of startup
>
> arch/arm/mach-imx/imx.c | 9 +++++++++
> arch/arm/mach-imx/imx51.c | 20 ++++++++++++--------
> arch/arm/mach-imx/imx53.c | 4 ++++
> arch/arm/mach-imx/imx6.c | 11 +----------
> arch/arm/mach-imx/include/mach/reset-reason.h | 8 ++++----
> arch/arm/mach-imx/vf610.c | 2 +-
> 6 files changed, 31 insertions(+), 23 deletions(-)
>
> --
> 2.14.3
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
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^ permalink raw reply [flat|nested] 8+ messages in thread