[PATCH 1/2] clk: add clk-gpio driver

[PATCH 1/2] clk: add clk-gpio driver

[Nikita Yushchenko]

This implements support for gpio-gate-clock device tree nodes, that
define clocks that can be enabled or disabled via GPIO line.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
---
 drivers/clk/Makefile   |   2 +-
 drivers/clk/clk-gpio.c | 130 +++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 131 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/clk-gpio.c

diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 55ac9535a..cd4026c94 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -1,7 +1,7 @@
 obj-$(CONFIG_COMMON_CLK)	+= clk.o clk-fixed.o clk-divider.o clk-fixed-factor.o \
 				clk-mux.o clk-gate.o clk-composite.o \
 				clk-fractional-divider.o clk-conf.o \
-				clk-gate-shared.o
+				clk-gate-shared.o clk-gpio.o
 obj-$(CONFIG_CLKDEV_LOOKUP)	+= clkdev.o
 
 obj-$(CONFIG_ARCH_MVEBU)	+= mvebu/
diff --git a/drivers/clk/clk-gpio.c b/drivers/clk/clk-gpio.c
new file mode 100644
index 000000000..352c85dfe
--- /dev/null
+++ b/drivers/clk/clk-gpio.c
@@ -0,0 +1,130 @@
+/*
+ * clk-gpio.c - clock that can be enabled and disabled via GPIO output
+ * Based on Linux clk support
+ *
+ * Copyright (c) 2018 Nikita Yushchenko <nikita.yoush@cogentembedded.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#include <common.h>
+#include <malloc.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <gpio.h>
+#include <of_gpio.h>
+#include <init.h>
+
+struct clk_gpio {
+	struct clk clk;
+	const char *parent;
+	int gpio;
+};
+#define to_clk_gpio(_clk) container_of(_clk, struct clk_gpio, clk)
+
+static int clk_gpio_enable(struct clk *clk)
+{
+	struct clk_gpio *clk_gpio = to_clk_gpio(clk);
+
+	gpio_set_active(clk_gpio->gpio, true);
+	return 0;
+}
+
+static void clk_gpio_disable(struct clk *clk)
+{
+	struct clk_gpio *clk_gpio = to_clk_gpio(clk);
+
+	gpio_set_active(clk_gpio->gpio, false);
+}
+
+static int clk_gpio_is_enabled(struct clk *clk)
+{
+	struct clk_gpio *clk_gpio = to_clk_gpio(clk);
+
+	return gpio_is_active(clk_gpio->gpio);
+}
+
+static struct clk_ops clk_gpio_ops = {
+	.set_rate = clk_parent_set_rate,
+	.round_rate = clk_parent_round_rate,
+	.enable = clk_gpio_enable,
+	.disable = clk_gpio_disable,
+	.is_enabled = clk_gpio_is_enabled,
+};
+
+static int of_gpio_clk_setup(struct device_node *node)
+{
+	struct clk_gpio *clk_gpio;
+	enum of_gpio_flags of_flags;
+	unsigned long flags;
+	int ret;
+
+	clk_gpio = xzalloc(sizeof(*clk_gpio));
+	if (!clk_gpio)
+		return -ENOMEM;
+
+	clk_gpio->parent = of_clk_get_parent_name(node, 0);
+	if (!clk_gpio->parent) {
+		ret = -EINVAL;
+		goto no_parent;
+	}
+
+	clk_gpio->clk.ops = &clk_gpio_ops;
+	clk_gpio->clk.parent_names = &clk_gpio->parent;
+	clk_gpio->clk.num_parents = 1;
+
+	clk_gpio->clk.name = node->name;
+	of_property_read_string(node, "clock-output-names",
+			&clk_gpio->clk.name);
+
+	ret = of_get_named_gpio_flags(node, "enable-gpios", 0,
+			&of_flags);
+	if (ret >= 0 && !gpio_is_valid(ret))
+		ret = -EINVAL;
+	if (ret < 0)
+		goto no_gpio;
+	clk_gpio->gpio = ret;
+
+	flags = GPIOF_OUT_INIT_ACTIVE;
+	if (of_flags & OF_GPIO_ACTIVE_LOW)
+		flags |= GPIOF_ACTIVE_LOW;
+	ret = gpio_request_one(clk_gpio->gpio, flags, clk_gpio->clk.name);
+	if (ret)
+		goto no_request;
+
+	ret = clk_register(&clk_gpio->clk);
+	if (ret)
+		goto no_register;
+
+	return of_clk_add_provider(node, of_clk_src_simple_get, &clk_gpio->clk);
+
+no_register:
+	gpio_free(clk_gpio->gpio);
+no_request:
+no_gpio:
+no_parent:
+	free(clk_gpio);
+	return ret;
+}
+
+/* Can't use OF_CLK_DECLARE due to need to run after GPIOcontrollers have
+ * registrered */
+
+static const struct of_device_id clk_gpio_device_id[] = {
+	{ .compatible = "gpio-gate-clock", .data = of_gpio_clk_setup, },
+	{}
+};
+
+static int clk_gpio_init(void)
+{
+	return of_clk_init(NULL, clk_gpio_device_id);
+}
+coredevice_initcall(clk_gpio_init);
-- 
2.11.0


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[PATCH 2/2] clk: support pinmux configuration in clock provider nodes

[Nikita Yushchenko]

Some device trees use pinctrl-* settings inside device tree nodes for
clock providers.

Barebox does not threat clock providers (such as fixed-clock or
gpio-gate-clock) as conventional devices, thus setting default
pinctrl configuration in driver binding code does not happen for
clock providers.

This patch adds setting default pinctrl configuration to of_clk_init(),
just before calling clock provider's probe routine.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
---
 drivers/clk/clk.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 5bb147eee..24759b45b 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -22,6 +22,7 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/clk/clk-conf.h>
+#include <pinctrl.h>
 
 static LIST_HEAD(clks);
 
@@ -596,10 +597,12 @@ int of_clk_init(struct device_node *root, const struct of_device_id *matches)
 		list_for_each_entry_safe(clk_provider, next,
 					 &clk_provider_list, node) {
 
-			if (force || parent_ready(clk_provider->np)) {
+			struct device_node *np = clk_provider->np;
+			if (force || parent_ready(np)) {
 
-				clk_provider->clk_init_cb(clk_provider->np);
-				of_clk_set_defaults(clk_provider->np, true);
+				of_pinctrl_select_state_default(np);
+				clk_provider->clk_init_cb(np);
+				of_clk_set_defaults(np, true);
 
 				list_del(&clk_provider->node);
 				free(clk_provider);
-- 
2.11.0


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Re: [PATCH 1/2] clk: add clk-gpio driver

[Sascha Hauer]

On Thu, May 10, 2018 at 06:20:18PM +0300, Nikita Yushchenko wrote:
> This implements support for gpio-gate-clock device tree nodes, that
> define clocks that can be enabled or disabled via GPIO line.
> 
> Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
> ---
>  drivers/clk/Makefile   |   2 +-
>  drivers/clk/clk-gpio.c | 130 +++++++++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 131 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/clk/clk-gpio.c

Applied, thanks

Sascha

> 
> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
> index 55ac9535a..cd4026c94 100644
> --- a/drivers/clk/Makefile
> +++ b/drivers/clk/Makefile
> @@ -1,7 +1,7 @@
>  obj-$(CONFIG_COMMON_CLK)	+= clk.o clk-fixed.o clk-divider.o clk-fixed-factor.o \
>  				clk-mux.o clk-gate.o clk-composite.o \
>  				clk-fractional-divider.o clk-conf.o \
> -				clk-gate-shared.o
> +				clk-gate-shared.o clk-gpio.o
>  obj-$(CONFIG_CLKDEV_LOOKUP)	+= clkdev.o
>  
>  obj-$(CONFIG_ARCH_MVEBU)	+= mvebu/
> diff --git a/drivers/clk/clk-gpio.c b/drivers/clk/clk-gpio.c
> new file mode 100644
> index 000000000..352c85dfe
> --- /dev/null
> +++ b/drivers/clk/clk-gpio.c
> @@ -0,0 +1,130 @@
> +/*
> + * clk-gpio.c - clock that can be enabled and disabled via GPIO output
> + * Based on Linux clk support
> + *
> + * Copyright (c) 2018 Nikita Yushchenko <nikita.yoush@cogentembedded.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + */
> +#include <common.h>
> +#include <malloc.h>
> +#include <linux/clk.h>
> +#include <linux/err.h>
> +#include <gpio.h>
> +#include <of_gpio.h>
> +#include <init.h>
> +
> +struct clk_gpio {
> +	struct clk clk;
> +	const char *parent;
> +	int gpio;
> +};
> +#define to_clk_gpio(_clk) container_of(_clk, struct clk_gpio, clk)
> +
> +static int clk_gpio_enable(struct clk *clk)
> +{
> +	struct clk_gpio *clk_gpio = to_clk_gpio(clk);
> +
> +	gpio_set_active(clk_gpio->gpio, true);
> +	return 0;
> +}
> +
> +static void clk_gpio_disable(struct clk *clk)
> +{
> +	struct clk_gpio *clk_gpio = to_clk_gpio(clk);
> +
> +	gpio_set_active(clk_gpio->gpio, false);
> +}
> +
> +static int clk_gpio_is_enabled(struct clk *clk)
> +{
> +	struct clk_gpio *clk_gpio = to_clk_gpio(clk);
> +
> +	return gpio_is_active(clk_gpio->gpio);
> +}
> +
> +static struct clk_ops clk_gpio_ops = {
> +	.set_rate = clk_parent_set_rate,
> +	.round_rate = clk_parent_round_rate,
> +	.enable = clk_gpio_enable,
> +	.disable = clk_gpio_disable,
> +	.is_enabled = clk_gpio_is_enabled,
> +};
> +
> +static int of_gpio_clk_setup(struct device_node *node)
> +{
> +	struct clk_gpio *clk_gpio;
> +	enum of_gpio_flags of_flags;
> +	unsigned long flags;
> +	int ret;
> +
> +	clk_gpio = xzalloc(sizeof(*clk_gpio));
> +	if (!clk_gpio)
> +		return -ENOMEM;
> +
> +	clk_gpio->parent = of_clk_get_parent_name(node, 0);
> +	if (!clk_gpio->parent) {
> +		ret = -EINVAL;
> +		goto no_parent;
> +	}
> +
> +	clk_gpio->clk.ops = &clk_gpio_ops;
> +	clk_gpio->clk.parent_names = &clk_gpio->parent;
> +	clk_gpio->clk.num_parents = 1;
> +
> +	clk_gpio->clk.name = node->name;
> +	of_property_read_string(node, "clock-output-names",
> +			&clk_gpio->clk.name);
> +
> +	ret = of_get_named_gpio_flags(node, "enable-gpios", 0,
> +			&of_flags);
> +	if (ret >= 0 && !gpio_is_valid(ret))
> +		ret = -EINVAL;
> +	if (ret < 0)
> +		goto no_gpio;
> +	clk_gpio->gpio = ret;
> +
> +	flags = GPIOF_OUT_INIT_ACTIVE;
> +	if (of_flags & OF_GPIO_ACTIVE_LOW)
> +		flags |= GPIOF_ACTIVE_LOW;
> +	ret = gpio_request_one(clk_gpio->gpio, flags, clk_gpio->clk.name);
> +	if (ret)
> +		goto no_request;
> +
> +	ret = clk_register(&clk_gpio->clk);
> +	if (ret)
> +		goto no_register;
> +
> +	return of_clk_add_provider(node, of_clk_src_simple_get, &clk_gpio->clk);
> +
> +no_register:
> +	gpio_free(clk_gpio->gpio);
> +no_request:
> +no_gpio:
> +no_parent:
> +	free(clk_gpio);
> +	return ret;
> +}
> +
> +/* Can't use OF_CLK_DECLARE due to need to run after GPIOcontrollers have
> + * registrered */
> +
> +static const struct of_device_id clk_gpio_device_id[] = {
> +	{ .compatible = "gpio-gate-clock", .data = of_gpio_clk_setup, },
> +	{}
> +};
> +
> +static int clk_gpio_init(void)
> +{
> +	return of_clk_init(NULL, clk_gpio_device_id);
> +}
> +coredevice_initcall(clk_gpio_init);
> -- 
> 2.11.0
> 
> 

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