[PATCH v2 00/12] various fixes for MIPS64

[PATCH v2 00/12] various fixes for MIPS64

[Peter Mamonov]

Hi,

Here is a second revision of the patchset which fixes various issues with 64 bit 
barebox, primarily MIPS related. IMHO all of these patches are ready for 
application.

Regards,
Peter

Peter Mamonov (12):
  resource: fix iomem root resource for 64 bit
  fs: fix memory access for 64bit MIPS
  mtd: cfi-flash: fix write_buff() for 64BIT
  i2c/muxes/i2c-mux-pca954x: fix private data retrieval for 64bit mode
  MIPS: import 64-bit address conversion macros
  common.h: fix IOMEM() for MIPS64
  mips: fix copy_to_link_location for 64 bit mode
  MIPS: use CKSEG1 instead of KSEG1
  mips: fix warnings from CPHYSADDR() macro
  mips: add PHYS_ADDR_T_64BIT option
  mips: 64BIT selects PHYS_ADDR_T_64BIT
  fixup! MIPS: import optimized string functions from Linux

 arch/mips/Kconfig                   |  6 ++++++
 arch/mips/boot/dtb.c                |  4 ++--
 arch/mips/include/asm/addrspace.h   | 25 +++++++++++++++++++++++++
 arch/mips/include/asm/pbl_macros.h  | 21 +++++++++++----------
 arch/mips/lib/c-r4k.c               |  8 ++++----
 common/resource.c                   |  2 +-
 drivers/i2c/muxes/i2c-mux-pca954x.c |  4 +++-
 drivers/mtd/nor/cfi_flash.c         |  2 +-
 fs/fs.c                             |  4 ++--
 include/common.h                    |  4 ++++
 10 files changed, 59 insertions(+), 21 deletions(-)

-- 
2.17.0


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[PATCH v2 01/12] resource: fix iomem root resource for 64 bit

[Peter Mamonov]

Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 common/resource.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/resource.c b/common/resource.c
index e4bbe15fd..abc0814d2 100644
--- a/common/resource.c
+++ b/common/resource.c
@@ -114,7 +114,7 @@ int release_region(struct resource *res)
 /* The root resource for the whole memory-mapped io space */
 struct resource iomem_resource = {
 	.start = 0,
-	.end = 0xffffffff,
+	.end = ~(resource_size_t)0,
 	.name = "iomem",
 	.children = LIST_HEAD_INIT(iomem_resource.children),
 };
-- 
2.17.0


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Re: [PATCH v2 01/12] resource: fix iomem root resource for 64 bit

[Andrey Smirnov]

On Mon, May 21, 2018 at 4:54 AM, Peter Mamonov <pmamonov@gmail.com> wrote:
> Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>

IMHO, Signed-off-by is a bit of an overkill for this. I am perfectly
fine not getting credit for trivial suggestions as was this one in
general, but if we must, Suggested-by seems like a better fit.

Thanks,
Andrey Smirnov

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[PATCH v2 02/12] fs: fix memory access for 64bit MIPS

[Peter Mamonov]

Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
---
 fs/fs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/fs/fs.c b/fs/fs.c
index b66cc9b17..4322d307d 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -962,7 +962,7 @@ loff_t lseek(int fildes, loff_t offset, int whence)
 	case SEEK_SET:
 		if (f->size != FILE_SIZE_STREAM && offset > f->size)
 			goto out;
-		if (offset < 0)
+		if (IS_ERR(offset))
 			goto out;
 		pos = offset;
 		break;
@@ -981,7 +981,7 @@ loff_t lseek(int fildes, loff_t offset, int whence)
 	}
 
 	pos = fsdrv->lseek(&f->fsdev->dev, f, pos);
-	if (pos < 0) {
+	if (IS_ERR(pos)) {
 		errno = -pos;
 		return -1;
 	}
-- 
2.17.0


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[PATCH v2 03/12] mtd: cfi-flash: fix write_buff() for 64BIT

[Peter Mamonov]

Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
---
 drivers/mtd/nor/cfi_flash.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nor/cfi_flash.c b/drivers/mtd/nor/cfi_flash.c
index 5bdcccae1..01ab1aa27 100644
--- a/drivers/mtd/nor/cfi_flash.c
+++ b/drivers/mtd/nor/cfi_flash.c
@@ -515,7 +515,7 @@ static int write_buff(struct flash_info *info, const u8 *src,
 	int buffered_size;
 #endif
 	/* get lower aligned address */
-	wp = addr & ~(info->portwidth - 1);
+	wp = addr & ~((unsigned long)info->portwidth - 1);
 
 	/* handle unaligned start */
 	aln = addr - wp;
-- 
2.17.0


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[PATCH v2 04/12] i2c/muxes/i2c-mux-pca954x: fix private data retrieval for 64bit mode

[Peter Mamonov]

Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
---
 drivers/i2c/muxes/i2c-mux-pca954x.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c b/drivers/i2c/muxes/i2c-mux-pca954x.c
index 0d5515b71..395254cdc 100644
--- a/drivers/i2c/muxes/i2c-mux-pca954x.c
+++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
@@ -180,6 +180,7 @@ static int pca954x_probe(struct device_d *dev)
 	struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
 	int num, force;
 	struct pca954x *data;
+	uintptr_t tmp;
 	int ret = -ENODEV;
 	int gpio;
 
@@ -203,7 +204,8 @@ static int pca954x_probe(struct device_d *dev)
 		goto exit_free;
 	}
 
-	ret = dev_get_drvdata(dev, (const void **)&data->type);
+	ret = dev_get_drvdata(dev, (const void **)&tmp);
+	data->type = tmp;
 	if (ret)
 		goto exit_free;
 
-- 
2.17.0


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[PATCH v2 05/12] MIPS: import 64-bit address conversion macros

[Peter Mamonov]

Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
---
 arch/mips/include/asm/addrspace.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/mips/include/asm/addrspace.h b/arch/mips/include/asm/addrspace.h
index 17d480d08..dc44d7f79 100644
--- a/arch/mips/include/asm/addrspace.h
+++ b/arch/mips/include/asm/addrspace.h
@@ -73,6 +73,26 @@
 #define CKSEG2ADDR(a)		(CPHYSADDR(a) | CKSEG2)
 #define CKSEG3ADDR(a)		(CPHYSADDR(a) | CKSEG3)
 
+/*
+ * Cache modes for XKPHYS address conversion macros
+ */
+#define K_CALG_COH_EXCL1_NOL2	0
+#define K_CALG_COH_SHRL1_NOL2	1
+#define K_CALG_UNCACHED		2
+#define K_CALG_NONCOHERENT	3
+#define K_CALG_COH_EXCL		4
+#define K_CALG_COH_SHAREABLE	5
+#define K_CALG_NOTUSED		6
+#define K_CALG_UNCACHED_ACCEL	7
+
+/*
+ * 64-bit address conversions
+ */
+#define PHYS_TO_XKSEG_UNCACHED(p)	PHYS_TO_XKPHYS(K_CALG_UNCACHED, (p))
+#define PHYS_TO_XKSEG_CACHED(p)		PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p))
+#define XKPHYS_TO_PHYS(p)		((p) & TO_PHYS_MASK)
+#define PHYS_TO_XKPHYS(cm, a)		(XKPHYS | (_ACAST64_(cm) << 59) | (a))
+
 #else
 
 #define CKSEG0ADDR(a)		(CPHYSADDR(a) | KSEG0)
-- 
2.17.0


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[PATCH v2 06/12] common.h: fix IOMEM() for MIPS64

[Peter Mamonov]

Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
---
 include/common.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/common.h b/include/common.h
index 60e5005b8..4b3bcae40 100644
--- a/include/common.h
+++ b/include/common.h
@@ -142,7 +142,11 @@ void barebox_set_hostname_no_overwrite(const char *);
 #if defined(CONFIG_MIPS)
 #include <asm/addrspace.h>
 
+#ifdef CONFIG_64BIT
+#define IOMEM(addr)	((void __force __iomem *)PHYS_TO_XKSEG_UNCACHED(addr))
+#else
 #define IOMEM(addr)	((void __force __iomem *)CKSEG1ADDR(addr))
+#endif
 #else
 #define IOMEM(addr)	((void __force __iomem *)(addr))
 #endif
-- 
2.17.0


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Re: [PATCH v2 06/12] common.h: fix IOMEM() for MIPS64

[Sam Ravnborg]

On Mon, May 21, 2018 at 02:54:32PM +0300, Peter Mamonov wrote:
> Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
> ---
>  include/common.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/include/common.h b/include/common.h
> index 60e5005b8..4b3bcae40 100644
> --- a/include/common.h
> +++ b/include/common.h
> @@ -142,7 +142,11 @@ void barebox_set_hostname_no_overwrite(const char *);
>  #if defined(CONFIG_MIPS)
>  #include <asm/addrspace.h>
>  
> +#ifdef CONFIG_64BIT
> +#define IOMEM(addr)	((void __force __iomem *)PHYS_TO_XKSEG_UNCACHED(addr))
> +#else
>  #define IOMEM(addr)	((void __force __iomem *)CKSEG1ADDR(addr))
> +#endif
>  #else
>  #define IOMEM(addr)	((void __force __iomem *)(addr))
>  #endif

Another way to handle this would be to move the definition of IOMEM to asm/common.h
and then in this file define IOMEM only if not already defined.

Then we could avoid this MIPS specific stuff in the middle of a common file.

	Sam

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Re: [PATCH v2 06/12] common.h: fix IOMEM() for MIPS64

[Oleksij Rempel]

[-- Attachment #1.1.1: Type: text/plain, Size: 1264 bytes --]

Am 21.05.2018 um 17:04 schrieb Sam Ravnborg:
> On Mon, May 21, 2018 at 02:54:32PM +0300, Peter Mamonov wrote:
>> Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
>> ---
>>  include/common.h | 4 ++++
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/include/common.h b/include/common.h
>> index 60e5005b8..4b3bcae40 100644
>> --- a/include/common.h
>> +++ b/include/common.h
>> @@ -142,7 +142,11 @@ void barebox_set_hostname_no_overwrite(const char *);
>>  #if defined(CONFIG_MIPS)
>>  #include <asm/addrspace.h>
>>  
>> +#ifdef CONFIG_64BIT
>> +#define IOMEM(addr)	((void __force __iomem *)PHYS_TO_XKSEG_UNCACHED(addr))
>> +#else
>>  #define IOMEM(addr)	((void __force __iomem *)CKSEG1ADDR(addr))
>> +#endif
>>  #else
>>  #define IOMEM(addr)	((void __force __iomem *)(addr))
>>  #endif
> 
> Another way to handle this would be to move the definition of IOMEM to asm/common.h
> and then in this file define IOMEM only if not already defined.
> 
> Then we could avoid this MIPS specific stuff in the middle of a common file.

I would prefer
arch/mips/include/asm/io.h

for example in kernel we have:
arch/arm/include/asm/io.h:165:#define IOMEM(x)
arch/hexagon/include/asm/io.h:38:#define IOMEM(x)

-- 
Regards,
Oleksij


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Re: [PATCH v2 06/12] common.h: fix IOMEM() for MIPS64

[Sam Ravnborg]

On Mon, May 21, 2018 at 05:26:25PM +0200, Oleksij Rempel wrote:
> Am 21.05.2018 um 17:04 schrieb Sam Ravnborg:
> > On Mon, May 21, 2018 at 02:54:32PM +0300, Peter Mamonov wrote:
> >> Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
> >> ---
> >>  include/common.h | 4 ++++
> >>  1 file changed, 4 insertions(+)
> >>
> >> diff --git a/include/common.h b/include/common.h
> >> index 60e5005b8..4b3bcae40 100644
> >> --- a/include/common.h
> >> +++ b/include/common.h
> >> @@ -142,7 +142,11 @@ void barebox_set_hostname_no_overwrite(const char *);
> >>  #if defined(CONFIG_MIPS)
> >>  #include <asm/addrspace.h>
> >>  
> >> +#ifdef CONFIG_64BIT
> >> +#define IOMEM(addr)	((void __force __iomem *)PHYS_TO_XKSEG_UNCACHED(addr))
> >> +#else
> >>  #define IOMEM(addr)	((void __force __iomem *)CKSEG1ADDR(addr))
> >> +#endif
> >>  #else
> >>  #define IOMEM(addr)	((void __force __iomem *)(addr))
> >>  #endif
> > 
> > Another way to handle this would be to move the definition of IOMEM to asm/common.h
> > and then in this file define IOMEM only if not already defined.
> > 
> > Then we could avoid this MIPS specific stuff in the middle of a common file.
> 
> I would prefer
> arch/mips/include/asm/io.h
Agreed, much better place.

	Sam

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Re: [PATCH v2 06/12] common.h: fix IOMEM() for MIPS64

[Peter Mamonov]

On Mon, May 21, 2018 at 06:01:51PM +0200, Sam Ravnborg wrote:
> On Mon, May 21, 2018 at 05:26:25PM +0200, Oleksij Rempel wrote:
> > Am 21.05.2018 um 17:04 schrieb Sam Ravnborg:
> > > On Mon, May 21, 2018 at 02:54:32PM +0300, Peter Mamonov wrote:
> > >> Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
> > >> ---
> > >>  include/common.h | 4 ++++
> > >>  1 file changed, 4 insertions(+)
> > >>
> > >> diff --git a/include/common.h b/include/common.h
> > >> index 60e5005b8..4b3bcae40 100644
> > >> --- a/include/common.h
> > >> +++ b/include/common.h
> > >> @@ -142,7 +142,11 @@ void barebox_set_hostname_no_overwrite(const char *);
> > >>  #if defined(CONFIG_MIPS)
> > >>  #include <asm/addrspace.h>
> > >>  
> > >> +#ifdef CONFIG_64BIT
> > >> +#define IOMEM(addr)	((void __force __iomem *)PHYS_TO_XKSEG_UNCACHED(addr))
> > >> +#else
> > >>  #define IOMEM(addr)	((void __force __iomem *)CKSEG1ADDR(addr))
> > >> +#endif
> > >>  #else
> > >>  #define IOMEM(addr)	((void __force __iomem *)(addr))
> > >>  #endif
> > > 
> > > Another way to handle this would be to move the definition of IOMEM to asm/common.h
> > > and then in this file define IOMEM only if not already defined.
> > > 
> > > Then we could avoid this MIPS specific stuff in the middle of a common file.
> > 
> > I would prefer
> > arch/mips/include/asm/io.h
> Agreed, much better place.

Got it.

Regards,
Peter

> 
> 	Sam
> 
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[PATCH v2 07/12] mips: fix copy_to_link_location for 64 bit mode

[Peter Mamonov]

Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
---
 arch/mips/include/asm/pbl_macros.h | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h
index 37b150ac2..18115c848 100644
--- a/arch/mips/include/asm/pbl_macros.h
+++ b/arch/mips/include/asm/pbl_macros.h
@@ -134,21 +134,22 @@
 	subu	t2, t1, t0	/* t2 <- size of pbl */
 	addu	a2, a0, t2	/* a2 <- source end address */
 
+#define WSIZE	4
 copy_loop:
 	/* copy from source address [a0] */
-	lw	t4, LONGSIZE * 0(a0)
-	lw	t5, LONGSIZE * 1(a0)
-	lw	t6, LONGSIZE * 2(a0)
-	lw	t7, LONGSIZE * 3(a0)
+	lw	t4, WSIZE * 0(a0)
+	lw	t5, WSIZE * 1(a0)
+	lw	t6, WSIZE * 2(a0)
+	lw	t7, WSIZE * 3(a0)
 	/* copy to target address [a1] */
-	sw	t4, LONGSIZE * 0(a1)
-	sw	t5, LONGSIZE * 1(a1)
-	sw	t6, LONGSIZE * 2(a1)
-	sw	t7, LONGSIZE * 3(a1)
-	addi	a0, LONGSIZE * 4
+	sw	t4, WSIZE * 0(a1)
+	sw	t5, WSIZE * 1(a1)
+	sw	t6, WSIZE * 2(a1)
+	sw	t7, WSIZE * 3(a1)
+	addi	a0, WSIZE * 4
 	subu	t3, a0, a2
 	blez	t3, copy_loop
-	 addi	a1, LONGSIZE * 4
+	 addi	a1, WSIZE * 4
 
 copy_loop_exit:
 
-- 
2.17.0


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[PATCH v2 08/12] MIPS: use CKSEG1 instead of KSEG1

[Peter Mamonov]

Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
---
 arch/mips/boot/dtb.c  | 4 ++--
 arch/mips/lib/c-r4k.c | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/mips/boot/dtb.c b/arch/mips/boot/dtb.c
index e7633a5af..3f7f46641 100644
--- a/arch/mips/boot/dtb.c
+++ b/arch/mips/boot/dtb.c
@@ -30,10 +30,10 @@ void of_add_memory_bank(struct device_node *node, bool dump, int r,
 
 	if (IS_ENABLED(CONFIG_MMU)) {
 		sprintf(str, "kseg0_ram%d", r);
-		barebox_add_memory_bank(str, KSEG0 | base, size);
+		barebox_add_memory_bank(str, CKSEG0 | base, size);
 	} else {
 		sprintf(str, "kseg1_ram%d", r);
-		barebox_add_memory_bank(str, KSEG1 | base, size);
+		barebox_add_memory_bank(str, CKSEG1 | base, size);
 	}
 
 	if (dump)
diff --git a/arch/mips/lib/c-r4k.c b/arch/mips/lib/c-r4k.c
index 150205840..cb0544a53 100644
--- a/arch/mips/lib/c-r4k.c
+++ b/arch/mips/lib/c-r4k.c
@@ -58,14 +58,14 @@ void flush_cache_all(void)
 
 	dcache_size = c->dcache.waysize * c->dcache.ways;
 	lsize = c->dcache.linesz;
-	aend = (KSEG0 + dcache_size - 1) & ~(lsize - 1);
-	for (addr = KSEG0; addr <= aend; addr += lsize)
+	aend = (CKSEG0 + dcache_size - 1) & ~(lsize - 1);
+	for (addr = CKSEG0; addr <= aend; addr += lsize)
 		cache_op(Index_Writeback_Inv_D, addr);
 
 	icache_size = c->icache.waysize * c->icache.ways;
 	lsize = c->icache.linesz;
-	aend = (KSEG0 + icache_size - 1) & ~(lsize - 1);
-	for (addr = KSEG0; addr <= aend; addr += lsize)
+	aend = (CKSEG0 + icache_size - 1) & ~(lsize - 1);
+	for (addr = CKSEG0; addr <= aend; addr += lsize)
 		cache_op(Index_Invalidate_I, addr);
 
 	/* secondatory cache skipped */
-- 
2.17.0


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Re: [PATCH v2 08/12] MIPS: use CKSEG1 instead of KSEG1

[Sam Ravnborg]

Hi Peter.

On Mon, May 21, 2018 at 02:54:34PM +0300, Peter Mamonov wrote:
> Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
> ---

Can you elaborate a little over this change?
Earlier IOMEM was fixed to use KSEG1 and not CKSEG1

And now something else moves the other way.

For readers like me that has no clue what KSEG0 and CKSEG0
is the change looks like noise.
It may be perfectly fine, but there is no backgrond info to tell why

	Sam

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Re: [PATCH v2 08/12] MIPS: use CKSEG1 instead of KSEG1

[Peter Mamonov]

Hi, Sam,

On Mon, May 21, 2018 at 05:08:03PM +0200, Sam Ravnborg wrote:
> Hi Peter.
> 
> On Mon, May 21, 2018 at 02:54:34PM +0300, Peter Mamonov wrote:
> > Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
> > ---
> 
> Can you elaborate a little over this change?
> Earlier IOMEM was fixed to use KSEG1 and not CKSEG1
>
> And now something else moves the other way.

Well, before patch 6 of this patch series IOMEM for MIPS was defined using 
CKSEG1ADDR() macro.  Patch 6 introduced a new definition for MIPS64 using 
PHYS_TO_XKSEG_UNCACHED macro. I can't see any use of KSEG1 in IOMEM definition 
for MIPS...

> > For readers like me that has no clue what KSEG0 and CKSEG0
> is the change looks like noise.
> It may be perfectly fine, but there is no backgrond info to tell why

Anyway, here is the story. MIPS virtual address space is partitioned into 
several segments.  Here is an excerpt from the "See MIPS run (Linux)" book 
which describes KSEG0 and KSEG1:

	kseg0 0x8000.0000 – 9FFF.FFFF (512MB): These addresses are translated
		into physical addresses by merely stripping off the top bit and 
		mapping them contiguously into the low 512 MB of physical 
		memory. [...] Addresses in this region are almost always 
		accessed through the cache, so they may not be used until the 
		caches are properly initialized. They will be used for most 
		programs and data in systems not using the MMU and will be used 
		for the OS kernel for systems that do use the MMU.

	kseg1 0xA000.0000 – BFFF.FFFF (512MB): These addresses are mapped
		into physical addresses by stripping off the leading 3 bits, 
		giving a duplicate mapping of the low 512 MB of physical 
		memory. But this time, access will not use the cache. The kseg1 
		region is the only chunk of the memory map that is guaranteed 
		to behave properly from system reset; that’s why the 		
		after-reset starting point ( 0xBFC0.0000 ) lies within it.

Now, after introduction of MIPS64 these segments were preserved for 
compatibility reasons, and its 64bit equivalents are located at  
0xffffffff80000000 and 0xffffffffa0000000 respectively.

As you can see from the arch/mips/include/asm/addrspace.h KSEG0/1 are defined 
for 32 bits only:

	#ifdef CONFIG_64BIT
	...
	#else
	...
	#define KSEG0                   0x80000000
	#define KSEG1                   0xa0000000
	...
	#endif

While CKSEG0/1 are defined for both 64 and 32 bits:

	#ifdef CONFIG_64BIT
	...
	#define CKSEG0                  _CONST64_(0xffffffff80000000)
	#define CKSEG1                  _CONST64_(0xffffffffa0000000)
	...
	#else
	...
	#define CKSEG0                   0x80000000
	#define CKSEG1                   0xa0000000
	...
	#endif

Linux defines these constants in the same way. I belive the "C" prefix to 
contants names stands for Compatible.

Anyway, if you try to compile 64 bit barebox and use KSEG1 in your code, 
compilation will fail.

Regards,
Peter

> 
> 	Sam

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[PATCH v2 09/12] mips: fix warnings from CPHYSADDR() macro

[Peter Mamonov]

Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
---
 arch/mips/include/asm/addrspace.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/mips/include/asm/addrspace.h b/arch/mips/include/asm/addrspace.h
index dc44d7f79..688620472 100644
--- a/arch/mips/include/asm/addrspace.h
+++ b/arch/mips/include/asm/addrspace.h
@@ -48,7 +48,12 @@
 /*
  * Returns the physical address of a CKSEGx / XKPHYS address
  */
+#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
+#define CPHYSADDR(a)		((_ACAST64_(a)) & 0x1fffffff)
+#else
 #define CPHYSADDR(a)		((_ACAST32_(a)) & 0x1fffffff)
+#endif
+
 #define XPHYSADDR(a)            ((_ACAST64_(a)) &			\
 				 _CONST64_(0x000000ffffffffff))
 
-- 
2.17.0


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Re: [PATCH v2 09/12] mips: fix warnings from CPHYSADDR() macro

[Sam Ravnborg]

On Mon, May 21, 2018 at 02:54:35PM +0300, Peter Mamonov wrote:
> Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
> ---
>  arch/mips/include/asm/addrspace.h | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/mips/include/asm/addrspace.h b/arch/mips/include/asm/addrspace.h
> index dc44d7f79..688620472 100644
> --- a/arch/mips/include/asm/addrspace.h
> +++ b/arch/mips/include/asm/addrspace.h
> @@ -48,7 +48,12 @@
>  /*
>   * Returns the physical address of a CKSEGx / XKPHYS address
>   */
> +#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
> +#define CPHYSADDR(a)		((_ACAST64_(a)) & 0x1fffffff)
> +#else
>  #define CPHYSADDR(a)		((_ACAST32_(a)) & 0x1fffffff)
> +#endif
> +
>  #define XPHYSADDR(a)            ((_ACAST64_(a)) &			\
>  				 _CONST64_(0x000000ffffffffff))

If the above cast to phys_addr_t then no ifdef is required?

	Sam

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Re: [PATCH v2 09/12] mips: fix warnings from CPHYSADDR() macro

[Peter Mamonov]

On Mon, May 21, 2018 at 05:11:09PM +0200, Sam Ravnborg wrote:
> On Mon, May 21, 2018 at 02:54:35PM +0300, Peter Mamonov wrote:
> > Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
> > ---
> >  arch/mips/include/asm/addrspace.h | 5 +++++
> >  1 file changed, 5 insertions(+)
> > 
> > diff --git a/arch/mips/include/asm/addrspace.h b/arch/mips/include/asm/addrspace.h
> > index dc44d7f79..688620472 100644
> > --- a/arch/mips/include/asm/addrspace.h
> > +++ b/arch/mips/include/asm/addrspace.h
> > @@ -48,7 +48,12 @@
> >  /*
> >   * Returns the physical address of a CKSEGx / XKPHYS address
> >   */
> > +#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
> > +#define CPHYSADDR(a)		((_ACAST64_(a)) & 0x1fffffff)
> > +#else
> >  #define CPHYSADDR(a)		((_ACAST32_(a)) & 0x1fffffff)
> > +#endif
> > +
> >  #define XPHYSADDR(a)            ((_ACAST64_(a)) &			\
> >  				 _CONST64_(0x000000ffffffffff))
> 
> If the above cast to phys_addr_t then no ifdef is required?

Probably, yet Linux uses those _ACAST*_ macros... I have to dig a little bit to
find why and how. Let's skip this this patch for a while since it just fixes a
warning and there are much more of them when you build for 64 bit MIPS...

Regards,
Peter

> 
> 	Sam

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[PATCH v2 10/12] mips: add PHYS_ADDR_T_64BIT option

[Peter Mamonov]

Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
---
 arch/mips/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index c2c555dc3..433d914c2 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -25,6 +25,10 @@ config GENERIC_LINKER_SCRIPT
 config HAS_NO_BOARD_HL_CODE
 	bool
 
+config PHYS_ADDR_T_64BIT
+	bool
+	default n
+
 menu "Machine selection"
 
 config BUILTIN_DTB
-- 
2.17.0


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Re: [PATCH v2 10/12] mips: add PHYS_ADDR_T_64BIT option

[Sascha Hauer]

On Mon, May 21, 2018 at 02:54:36PM +0300, Peter Mamonov wrote:
> Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
> ---
>  arch/mips/Kconfig | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index c2c555dc3..433d914c2 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -25,6 +25,10 @@ config GENERIC_LINKER_SCRIPT
>  config HAS_NO_BOARD_HL_CODE
>  	bool
>  
> +config PHYS_ADDR_T_64BIT
> +	bool
> +	default n

'n' is the default already. You can skip this line.

Sascha

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Pengutronix e.K.                           |                             |
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[PATCH v2 11/12] mips: 64BIT selects PHYS_ADDR_T_64BIT

[Peter Mamonov]

Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
---
 arch/mips/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 433d914c2..ef23837f4 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -279,6 +279,7 @@ config 64BIT
 	bool "64-bit barebox"
 	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
 	select ARCH_DMA_ADDR_T_64BIT
+	select PHYS_ADDR_T_64BIT
 	help
 	  Select this option if you want to build a 64-bit barebox.
 
-- 
2.17.0


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[PATCH v2 12/12] fixup! MIPS: import optimized string functions from Linux

[Peter Mamonov]

Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
---
 arch/mips/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index ef23837f4..ce63ec1ae 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -342,6 +342,7 @@ config NMON_HELP
 
 config MIPS_OPTIMIZED_STRING_FUNCTIONS
 	bool "use assembler optimized string functions"
+	depends on !64BIT
 	default y
 	help
 	  Say yes here to use assembler optimized memcpy / memset functions.
-- 
2.17.0


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Re: [PATCH v2 12/12] fixup! MIPS: import optimized string functions from Linux

[Oleksij Rempel]

[-- Attachment #1.1.1: Type: text/plain, Size: 651 bytes --]

Please, no fixup in master log.

Am 21.05.2018 um 13:54 schrieb Peter Mamonov:
> Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
> ---
>  arch/mips/Kconfig | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index ef23837f4..ce63ec1ae 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -342,6 +342,7 @@ config NMON_HELP
>  
>  config MIPS_OPTIMIZED_STRING_FUNCTIONS
>  	bool "use assembler optimized string functions"
> +	depends on !64BIT
>  	default y
>  	help
>  	  Say yes here to use assembler optimized memcpy / memset functions.
> 


-- 
Regards,
Oleksij


[-- Attachment #1.2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[-- Attachment #2: Type: text/plain, Size: 149 bytes --]

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Re: [PATCH v2 12/12] fixup! MIPS: import optimized string functions from Linux

[Peter Mamonov]

On Mon, May 21, 2018 at 05:50:55PM +0200, Oleksij Rempel wrote:
> Please, no fixup in master log.

Ok, will fix it in the upcoming revision of the patch series.

Regards,
Peter

> 
> Am 21.05.2018 um 13:54 schrieb Peter Mamonov:
> > Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
> > ---
> >  arch/mips/Kconfig | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> > index ef23837f4..ce63ec1ae 100644
> > --- a/arch/mips/Kconfig
> > +++ b/arch/mips/Kconfig
> > @@ -342,6 +342,7 @@ config NMON_HELP
> >  
> >  config MIPS_OPTIMIZED_STRING_FUNCTIONS
> >  	bool "use assembler optimized string functions"
> > +	depends on !64BIT
> >  	default y
> >  	help
> >  	  Say yes here to use assembler optimized memcpy / memset functions.
> > 
> 
> 
> -- 
> Regards,
> Oleksij
> 




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Re: [PATCH v2 00/12] various fixes for MIPS64

[Andrey Smirnov]

On Mon, May 21, 2018 at 4:54 AM, Peter Mamonov <pmamonov@gmail.com> wrote:
> Hi,
>
> Here is a second revision of the patchset which fixes various issues with 64 bit
> barebox, primarily MIPS related. IMHO all of these patches are ready for
> application.
>

Don't  think I've seen any comments on:
http://lists.infradead.org/pipermail/barebox/2018-May/032985.html
Right now it's not clear if that thread just slipped though the cracks
or you decided to keep the code as is. Latter is fine with me, I just
want to make sure it is not the former.

Thanks,
Andrey Smirnov

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Re: [PATCH v2 00/12] various fixes for MIPS64

[Peter Mamonov]

Hi, Andrey,

On Mon, May 21, 2018 at 11:39:26AM -0700, Andrey Smirnov wrote:
> On Mon, May 21, 2018 at 4:54 AM, Peter Mamonov <pmamonov@gmail.com> wrote:
> > Hi,
> >
> > Here is a second revision of the patchset which fixes various issues with 64 bit
> > barebox, primarily MIPS related. IMHO all of these patches are ready for
> > application.
> >
> 
> Don't  think I've seen any comments on:
> http://lists.infradead.org/pipermail/barebox/2018-May/032985.html
> Right now it's not clear if that thread just slipped though the cracks
> or you decided to keep the code as is. Latter is fine with me, I just
> want to make sure it is not the former.

Sorry for lack of feedback on your proposal. Your solution is actually the 
proper one. Yet I've decided to keep this change trivial for two reasons:
 
 - to make it easier for Sascha to accept it (i.e. no change in driver logic, 
 just fix the problem)

 - to make this patch self explaining, since it demonstrates the source of the 
 problem: get_drv_data(..., &data->type) overwrites memory beyond data->type 
 member due to mismatch of sizeof(enum pca_type) and sizeof(void *); using 
 argument of a proper type and size fixes the problem.


Regards,
Peter

> 
> Thanks,
> Andrey Smirnov

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Re: [PATCH v2 00/12] various fixes for MIPS64

[Sascha Hauer]

Hi Peter,

On Mon, May 21, 2018 at 02:54:26PM +0300, Peter Mamonov wrote:
> Hi,
> 
> Here is a second revision of the patchset which fixes various issues with 64 bit 
> barebox, primarily MIPS related. IMHO all of these patches are ready for 
> application.

Overall the commit messages in this series could be better. At least for
the non trivial changes they should answer the question why a particular
change has been made. You'll be glad having added proper commit messages
once a 'git blame' run points to your own code ;)

Sascha

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Re: [PATCH v2 00/12] various fixes for MIPS64

[Peter Mamonov]

Hi, Sascha,

On Tue, May 22, 2018 at 09:11:11AM +0200, Sascha Hauer wrote:
> Hi Peter,
> 
> On Mon, May 21, 2018 at 02:54:26PM +0300, Peter Mamonov wrote:
> > Hi,
> > 
> > Here is a second revision of the patchset which fixes various issues with 64 bit 
> > barebox, primarily MIPS related. IMHO all of these patches are ready for 
> > application.
> 
> Overall the commit messages in this series could be better. At least for
> the non trivial changes they should answer the question why a particular
> change has been made. You'll be glad having added proper commit messages
> once a 'git blame' run points to your own code ;)

Ok, I will work on that in the next version of the series.

Regards,
Peter

> 
> Sascha
> 
> -- 
> Pengutronix e.K.                           |                             |
> Industrial Linux Solutions                 | http://www.pengutronix.de/  |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
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