From: Peter Mamonov <pmamonov@gmail.com>
To: Sam Ravnborg <sam@ravnborg.org>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH v2 08/12] MIPS: use CKSEG1 instead of KSEG1
Date: Mon, 21 May 2018 21:17:08 +0300 [thread overview]
Message-ID: <20180521181707.gk5e6uo6eknkksd6@localhost.localdomain> (raw)
In-Reply-To: <20180521150803.GB12008@ravnborg.org>
Hi, Sam,
On Mon, May 21, 2018 at 05:08:03PM +0200, Sam Ravnborg wrote:
> Hi Peter.
>
> On Mon, May 21, 2018 at 02:54:34PM +0300, Peter Mamonov wrote:
> > Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
> > ---
>
> Can you elaborate a little over this change?
> Earlier IOMEM was fixed to use KSEG1 and not CKSEG1
>
> And now something else moves the other way.
Well, before patch 6 of this patch series IOMEM for MIPS was defined using
CKSEG1ADDR() macro. Patch 6 introduced a new definition for MIPS64 using
PHYS_TO_XKSEG_UNCACHED macro. I can't see any use of KSEG1 in IOMEM definition
for MIPS...
> > For readers like me that has no clue what KSEG0 and CKSEG0
> is the change looks like noise.
> It may be perfectly fine, but there is no backgrond info to tell why
Anyway, here is the story. MIPS virtual address space is partitioned into
several segments. Here is an excerpt from the "See MIPS run (Linux)" book
which describes KSEG0 and KSEG1:
kseg0 0x8000.0000 – 9FFF.FFFF (512MB): These addresses are translated
into physical addresses by merely stripping off the top bit and
mapping them contiguously into the low 512 MB of physical
memory. [...] Addresses in this region are almost always
accessed through the cache, so they may not be used until the
caches are properly initialized. They will be used for most
programs and data in systems not using the MMU and will be used
for the OS kernel for systems that do use the MMU.
kseg1 0xA000.0000 – BFFF.FFFF (512MB): These addresses are mapped
into physical addresses by stripping off the leading 3 bits,
giving a duplicate mapping of the low 512 MB of physical
memory. But this time, access will not use the cache. The kseg1
region is the only chunk of the memory map that is guaranteed
to behave properly from system reset; that’s why the
after-reset starting point ( 0xBFC0.0000 ) lies within it.
Now, after introduction of MIPS64 these segments were preserved for
compatibility reasons, and its 64bit equivalents are located at
0xffffffff80000000 and 0xffffffffa0000000 respectively.
As you can see from the arch/mips/include/asm/addrspace.h KSEG0/1 are defined
for 32 bits only:
#ifdef CONFIG_64BIT
...
#else
...
#define KSEG0 0x80000000
#define KSEG1 0xa0000000
...
#endif
While CKSEG0/1 are defined for both 64 and 32 bits:
#ifdef CONFIG_64BIT
...
#define CKSEG0 _CONST64_(0xffffffff80000000)
#define CKSEG1 _CONST64_(0xffffffffa0000000)
...
#else
...
#define CKSEG0 0x80000000
#define CKSEG1 0xa0000000
...
#endif
Linux defines these constants in the same way. I belive the "C" prefix to
contants names stands for Compatible.
Anyway, if you try to compile 64 bit barebox and use KSEG1 in your code,
compilation will fail.
Regards,
Peter
>
> Sam
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next prev parent reply other threads:[~2018-05-21 18:17 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-21 11:54 [PATCH v2 00/12] various fixes for MIPS64 Peter Mamonov
2018-05-21 11:54 ` [PATCH v2 01/12] resource: fix iomem root resource for 64 bit Peter Mamonov
2018-05-21 18:44 ` Andrey Smirnov
2018-05-21 11:54 ` [PATCH v2 02/12] fs: fix memory access for 64bit MIPS Peter Mamonov
2018-05-21 11:54 ` [PATCH v2 03/12] mtd: cfi-flash: fix write_buff() for 64BIT Peter Mamonov
2018-05-21 11:54 ` [PATCH v2 04/12] i2c/muxes/i2c-mux-pca954x: fix private data retrieval for 64bit mode Peter Mamonov
2018-05-21 11:54 ` [PATCH v2 05/12] MIPS: import 64-bit address conversion macros Peter Mamonov
2018-05-21 11:54 ` [PATCH v2 06/12] common.h: fix IOMEM() for MIPS64 Peter Mamonov
2018-05-21 15:04 ` Sam Ravnborg
2018-05-21 15:26 ` Oleksij Rempel
2018-05-21 16:01 ` Sam Ravnborg
2018-05-22 15:00 ` Peter Mamonov
2018-05-21 11:54 ` [PATCH v2 07/12] mips: fix copy_to_link_location for 64 bit mode Peter Mamonov
2018-05-21 11:54 ` [PATCH v2 08/12] MIPS: use CKSEG1 instead of KSEG1 Peter Mamonov
2018-05-21 15:08 ` Sam Ravnborg
2018-05-21 18:17 ` Peter Mamonov [this message]
2018-05-21 11:54 ` [PATCH v2 09/12] mips: fix warnings from CPHYSADDR() macro Peter Mamonov
2018-05-21 15:11 ` Sam Ravnborg
2018-05-22 15:05 ` Peter Mamonov
2018-05-21 11:54 ` [PATCH v2 10/12] mips: add PHYS_ADDR_T_64BIT option Peter Mamonov
2018-05-22 6:59 ` Sascha Hauer
2018-05-21 11:54 ` [PATCH v2 11/12] mips: 64BIT selects PHYS_ADDR_T_64BIT Peter Mamonov
2018-05-21 11:54 ` [PATCH v2 12/12] fixup! MIPS: import optimized string functions from Linux Peter Mamonov
2018-05-21 15:50 ` Oleksij Rempel
2018-05-22 14:58 ` Peter Mamonov
2018-05-21 18:39 ` [PATCH v2 00/12] various fixes for MIPS64 Andrey Smirnov
2018-05-21 21:07 ` Peter Mamonov
2018-05-22 7:11 ` Sascha Hauer
2018-05-22 8:17 ` Peter Mamonov
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