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From: Andrey Smirnov <andrew.smirnov@gmail.com>
To: barebox@lists.infradead.org
Cc: Andrey Smirnov <andrew.smirnov@gmail.com>
Subject: [PATCH v4 06/29] ARM: mmu: Share code for create_sections()
Date: Mon, 21 May 2018 20:14:47 -0700	[thread overview]
Message-ID: <20180522031510.25505-7-andrew.smirnov@gmail.com> (raw)
In-Reply-To: <20180522031510.25505-1-andrew.smirnov@gmail.com>

Regular MMU code never creates anything but 1:1 mapping, and barring
that plus the call to __mmu_cache_flush(), early MMU code version of
the function is pretty much identical. To avoid code duplication, move
it to mmu.h and convert both regular and early MMU code to use it.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/cpu/mmu-early.c | 14 ++------------
 arch/arm/cpu/mmu.c       | 27 ++++++++-------------------
 arch/arm/cpu/mmu.h       | 10 ++++++++++
 3 files changed, 20 insertions(+), 31 deletions(-)

diff --git a/arch/arm/cpu/mmu-early.c b/arch/arm/cpu/mmu-early.c
index f75cc7e4a..70ece0d2f 100644
--- a/arch/arm/cpu/mmu-early.c
+++ b/arch/arm/cpu/mmu-early.c
@@ -11,22 +11,12 @@
 
 static uint32_t *ttb;
 
-static void create_sections(unsigned long addr, int size_m, unsigned int flags)
-{
-	int i;
-
-	addr >>= 20;
-
-	for (i = size_m; i > 0; i--, addr++)
-		ttb[addr] = (addr << 20) | flags;
-}
-
 static void map_cachable(unsigned long start, unsigned long size)
 {
 	start = ALIGN_DOWN(start, SZ_1M);
 	size  = ALIGN(size, SZ_1M);
 
-	create_sections(start, size >> 20, PMD_SECT_AP_WRITE |
+	create_sections(ttb, start, size >> 20, PMD_SECT_AP_WRITE |
 			PMD_SECT_AP_READ | PMD_TYPE_SECT | PMD_SECT_WB);
 }
 
@@ -40,7 +30,7 @@ void mmu_early_enable(unsigned long membase, unsigned long memsize,
 	set_ttbr(ttb);
 	set_domain(DOMAIN_MANAGER);
 
-	create_sections(0, 4096, PMD_SECT_AP_WRITE |
+	create_sections(ttb, 0, 4096, PMD_SECT_AP_WRITE |
 			PMD_SECT_AP_READ | PMD_TYPE_SECT);
 
 	map_cachable(membase, memsize);
diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index 7e087d08f..2289a19c5 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -37,21 +37,7 @@
 #define PMD_SECT_DEF_UNCACHED (PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT)
 #define PMD_SECT_DEF_CACHED (PMD_SECT_WB | PMD_SECT_DEF_UNCACHED)
 
-static unsigned long *ttb;
-
-static void create_sections(unsigned long virt, unsigned long phys, int size_m,
-		unsigned int flags)
-{
-	int i;
-
-	phys >>= 20;
-	virt >>= 20;
-
-	for (i = size_m; i > 0; i--, virt++, phys++)
-		ttb[virt] = (phys << 20) | flags;
-
-	__mmu_cache_flush();
-}
+static uint32_t *ttb;
 
 /*
  * Do it the simple way for now and invalidate the entire
@@ -452,7 +438,7 @@ static int mmu_init(void)
 		asm volatile ("mrc  p15,0,%0,c2,c0,0" : "=r"(ttb));
 
 		/* Clear unpredictable bits [13:0] */
-		ttb = (unsigned long *)((unsigned long)ttb & ~0x3fff);
+		ttb = (uint32_t *)((unsigned long)ttb & ~0x3fff);
 
 		if (!request_sdram_region("ttb", (unsigned long)ttb, SZ_16K))
 			/*
@@ -474,8 +460,9 @@ static int mmu_init(void)
 	set_domain(DOMAIN_MANAGER);
 
 	/* create a flat mapping using 1MiB sections */
-	create_sections(0, 0, PAGE_SIZE, PMD_SECT_AP_WRITE | PMD_SECT_AP_READ |
+	create_sections(ttb, 0, PAGE_SIZE, PMD_SECT_AP_WRITE | PMD_SECT_AP_READ |
 			PMD_TYPE_SECT);
+	__mmu_cache_flush();
 
 	vectors_init();
 
@@ -484,9 +471,11 @@ static int mmu_init(void)
 	 * This is to speed up the generation of 2nd level page tables
 	 * below
 	 */
-	for_each_memory_bank(bank)
-		create_sections(bank->start, bank->start, bank->size >> 20,
+	for_each_memory_bank(bank) {
+		create_sections(ttb, bank->start, bank->size >> 20,
 				PMD_SECT_DEF_CACHED);
+		__mmu_cache_flush();
+	}
 
 	__mmu_cache_on();
 
diff --git a/arch/arm/cpu/mmu.h b/arch/arm/cpu/mmu.h
index e71ff8e9a..af429edbc 100644
--- a/arch/arm/cpu/mmu.h
+++ b/arch/arm/cpu/mmu.h
@@ -24,5 +24,15 @@ static inline void set_domain(unsigned val)
 	asm volatile ("mcr  p15,0,%0,c3,c0,0" : : "r"(val) /*:*/);
 }
 
+static inline void
+create_sections(uint32_t *ttb, unsigned long addr,
+		int size_m, unsigned int flags)
+{
+	unsigned int i;
+
+	for (i = 0, addr >>= 20; i < size_m; i++, addr++)
+		ttb[addr] = (addr << 20) | flags;
+}
+
 
 #endif /* __ARM_MMU_H */
-- 
2.17.0


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  parent reply	other threads:[~2018-05-22  3:15 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-22  3:14 [PATCH v4 00/29] ARM MMU code improvements and on-demand PTE allocation Andrey Smirnov
2018-05-22  3:14 ` [PATCH v4 01/29] ARM: mmu: Remove unused ARM_VECTORS_SIZE Andrey Smirnov
2018-05-22  3:14 ` [PATCH v4 02/29] ARM: mmu: Make use of IS_ALIGNED in arm_mmu_remap_sdram() Andrey Smirnov
2018-05-22  3:14 ` [PATCH v4 03/29] ARM: mmu: Use ALIGN and ALIGN_DOWN in map_cachable() Andrey Smirnov
2018-05-22  3:14 ` [PATCH v4 04/29] ARM: mmu: Introduce set_ttbr() Andrey Smirnov
2018-05-22  3:14 ` [PATCH v4 05/29] ARM: mmu: Introduce set_domain() Andrey Smirnov
2018-05-22  3:14 ` Andrey Smirnov [this message]
2018-05-22  3:14 ` [PATCH v4 07/29] ARM: mmu: Separate index and address in create_sections() Andrey Smirnov
2018-05-22  3:14 ` [PATCH v4 08/29] sizes.h: Sync with Linux 4.16 Andrey Smirnov
2018-05-22  3:14 ` [PATCH v4 09/29] ARM: mmu: Specify size in bytes in create_sections() Andrey Smirnov
2018-05-22  3:14 ` [PATCH v4 10/29] ARM: mmu: Share code for initial flat mapping creation Andrey Smirnov
2018-05-22  3:14 ` [PATCH v4 11/29] ARM: mmu: Share PMD_SECT_DEF_CACHED Andrey Smirnov
2018-05-22  3:14 ` [PATCH v4 12/29] ARM: mmu: Drop needless shifting in map_io_sections() Andrey Smirnov
2018-05-22  3:14 ` [PATCH v4 13/29] ARM: mmu: Replace hardcoded shifts with pgd_index() from Linux Andrey Smirnov
2018-05-22  3:14 ` [PATCH v4 14/29] ARM: mmu: Trivial simplification in arm_mmu_remap_sdram() Andrey Smirnov
2018-05-22  3:14 ` [PATCH v4 15/29] ARM: mmu: Replace various SZ_1M with PGDIR_SIZE Andrey Smirnov
2018-05-22  3:14 ` [PATCH v4 16/29] ARM: mmu: Use PAGE_SIZE when specifying size of one page Andrey Smirnov
2018-05-22  3:14 ` [PATCH v4 17/29] ARM: mmu: Define and use PTRS_PER_PTE Andrey Smirnov
2018-05-22  3:14 ` [PATCH v4 18/29] ARM: mmu: Use PAGE_SIZE instead of magic right shift by 12 Andrey Smirnov
2018-05-22  3:15 ` [PATCH v4 19/29] ARM: mmu: Use xmemalign in arm_create_pte() Andrey Smirnov
2018-05-22  3:15 ` [PATCH v4 20/29] ARM: mmu: Use xmemalign in mmu_init() Andrey Smirnov
2018-05-22  3:15 ` [PATCH v4 21/29] ARM: mmu: Share code between dma_alloc_*() functions Andrey Smirnov
2018-05-22  3:15 ` [PATCH v4 22/29] ARM: mmu: Pass PTE flags a parameter to arm_create_pte() Andrey Smirnov
2018-05-22  3:15 ` [PATCH v4 23/29] ARM: mmu: Make sure that address is 1M aligned in arm_create_pte() Andrey Smirnov
2018-05-22  3:15 ` [PATCH v4 24/29] ARM: mmu: Use find_pte() to find PTE in create_vector_table() Andrey Smirnov
2018-05-22  3:15 ` [PATCH v4 25/29] ARM: mmu: Use dma_inv_range() in dma_sync_single_for_cpu() Andrey Smirnov
2018-05-22  3:15 ` [PATCH v4 26/29] ARM: mmu: Simplify the use of dma_flush_range() Andrey Smirnov
2018-05-22  3:15 ` [PATCH v4 27/29] ARM: mmu: Implement on-demand PTE allocation Andrey Smirnov
2018-05-22  3:15 ` [PATCH v4 28/29] ARM: mmu: Introduce ARM_TTB_SIZE Andrey Smirnov
2018-05-22  3:15 ` [PATCH v4 29/29] ARM: mmu: Do not try to pick early TTB up Andrey Smirnov
2018-05-22  7:16 ` [PATCH v4 00/29] ARM MMU code improvements and on-demand PTE allocation Sascha Hauer
2018-05-22 18:37   ` Andrey Smirnov

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