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From: Andrey Smirnov <andrew.smirnov@gmail.com>
To: barebox@lists.infradead.org
Subject: [RESEND v3 06/52] mci: imx-esdhc: use dma mapping functions
Date: Thu,  7 Jun 2018 06:00:22 -0700	[thread overview]
Message-ID: <20180607130108.5339-7-andrew.smirnov@gmail.com> (raw)
In-Reply-To: <20180607130108.5339-1-andrew.smirnov@gmail.com>

From: Sascha Hauer <s.hauer@pengutronix.de>

Rather than relying on the fact that addresses can be just casted
into DMA addresses use proper DMA mapping functions.

This fixes compiler warnings when we do DMA on this 32bit only device
on aarch64 SoCs.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 drivers/mci/imx-esdhc.c | 53 ++++++++++++++++++++---------------------
 1 file changed, 26 insertions(+), 27 deletions(-)

diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c
index b91f94b99..8929901d4 100644
--- a/drivers/mci/imx-esdhc.c
+++ b/drivers/mci/imx-esdhc.c
@@ -211,18 +211,14 @@ esdhc_pio_read_write(struct mci_host *mci, struct mci_data *data)
 	return 0;
 }
 
-static int esdhc_setup_data(struct mci_host *mci, struct mci_data *data)
+static int esdhc_setup_data(struct mci_host *mci, struct mci_data *data,
+			    dma_addr_t dma)
 {
 	struct fsl_esdhc_host *host = to_fsl_esdhc(mci);
 	void __iomem *regs = host->regs;
 	u32 wml_value;
 
-	if (IS_ENABLED(CONFIG_MCI_IMX_ESDHC_PIO)) {
-		if (!(data->flags & MMC_DATA_READ))
-			esdhc_write32(regs + SDHCI_DMA_ADDRESS, (u32)data->src);
-		else
-			esdhc_write32(regs + SDHCI_DMA_ADDRESS, (u32)data->dest);
-	} else {
+	if (!IS_ENABLED(CONFIG_MCI_IMX_ESDHC_PIO)) {
 		wml_value = data->blocksize/4;
 
 		if (data->flags & MMC_DATA_READ) {
@@ -230,15 +226,14 @@ static int esdhc_setup_data(struct mci_host *mci, struct mci_data *data)
 				wml_value = 0x10;
 
 			esdhc_clrsetbits32(regs + IMX_SDHCI_WML, WML_RD_WML_MASK, wml_value);
-			esdhc_write32(regs + SDHCI_DMA_ADDRESS, (u32)data->dest);
 		} else {
 			if (wml_value > 0x80)
 				wml_value = 0x80;
 
 			esdhc_clrsetbits32(regs + IMX_SDHCI_WML, WML_WR_WML_MASK,
 						wml_value << 16);
-			esdhc_write32(regs + SDHCI_DMA_ADDRESS, (u32)data->src);
 		}
+		esdhc_write32(regs + SDHCI_DMA_ADDRESS, dma);
 	}
 
 	esdhc_write32(regs + SDHCI_BLOCK_SIZE__BLOCK_COUNT, data->blocks << 16 | data->blocksize);
@@ -250,7 +245,6 @@ static int esdhc_do_data(struct mci_host *mci, struct mci_data *data)
 {
 	struct fsl_esdhc_host *host = to_fsl_esdhc(mci);
 	void __iomem *regs = host->regs;
-	unsigned int num_bytes = data->blocks * data->blocksize;
 	u32 irqstat;
 
 	if (IS_ENABLED(CONFIG_MCI_IMX_ESDHC_PIO))
@@ -267,13 +261,6 @@ static int esdhc_do_data(struct mci_host *mci, struct mci_data *data)
 	} while (!(irqstat & IRQSTAT_TC) &&
 		(esdhc_read32(regs + SDHCI_PRESENT_STATE) & PRSSTAT_DLA));
 
-	if (data->flags & MMC_DATA_WRITE)
-		dma_sync_single_for_cpu((unsigned long)data->src,
-					num_bytes, DMA_TO_DEVICE);
-	else
-		dma_sync_single_for_cpu((unsigned long)data->dest,
-					num_bytes, DMA_FROM_DEVICE);
-
 	return 0;
 }
 
@@ -290,6 +277,9 @@ esdhc_send_cmd(struct mci_host *mci, struct mci_cmd *cmd, struct mci_data *data)
 	void __iomem *regs = host->regs;
 	unsigned int num_bytes = 0;
 	int ret;
+	void *ptr;
+	enum dma_data_direction dir = 0;
+	dma_addr_t dma = 0;
 
 	esdhc_write32(regs + SDHCI_INT_STATUS, -1);
 
@@ -300,19 +290,25 @@ esdhc_send_cmd(struct mci_host *mci, struct mci_cmd *cmd, struct mci_data *data)
 	if (data) {
 		int err;
 
-		err = esdhc_setup_data(mci, data);
-		if(err)
-			return err;
+		if (!IS_ENABLED(CONFIG_MCI_IMX_ESDHC_PIO)) {
+			num_bytes = data->blocks * data->blocksize;
 
-		num_bytes = data->blocks * data->blocksize;
+			if (data->flags & MMC_DATA_WRITE) {
+				ptr = (void *)data->src;
+				dir = DMA_TO_DEVICE;
+			} else {
+				ptr = data->dest;
+				dir = DMA_FROM_DEVICE;
+			}
 
-		if (data->flags & MMC_DATA_WRITE)
-			dma_sync_single_for_device((unsigned long)data->src,
-						   num_bytes, DMA_TO_DEVICE);
-		else
-			dma_sync_single_for_device((unsigned long)data->dest,
-						   num_bytes, DMA_FROM_DEVICE);
+			dma = dma_map_single(host->dev, ptr, num_bytes, dir);
+			if (dma_mapping_error(host->dev, dma))
+				return -EIO;
+		}
 
+		err = esdhc_setup_data(mci, data, dma);
+		if(err)
+			return err;
 	}
 
 	/* Figure out the transfer arguments */
@@ -383,6 +379,9 @@ esdhc_send_cmd(struct mci_host *mci, struct mci_cmd *cmd, struct mci_data *data)
 		ret = esdhc_do_data(mci, data);
 		if (ret)
 			return ret;
+
+		if (!IS_ENABLED(CONFIG_MCI_IMX_ESDHC_PIO))
+			dma_unmap_single(host->dev, dma, num_bytes, dir);
 	}
 
 	esdhc_write32(regs + SDHCI_INT_STATUS, -1);
-- 
2.17.0


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  parent reply	other threads:[~2018-06-07 13:01 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-07 13:00 [RESEND v3 00/52] ARM: i.MX8MQ and EVK support Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 01/52] ARM: i.MX: xload: Fix compiler warning Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 02/52] ARM: i.MX: compile arm32 specific errata only for CPU32 Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 03/52] ARM: Add i.MX8 support Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 04/52] aarch64: Add i.MX8 debug UART support Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 05/52] Include our own include/dt-bindings Andrey Smirnov
2018-06-07 13:00 ` Andrey Smirnov [this message]
2018-06-07 13:00 ` [RESEND v3 07/52] net: fec_imx: remove unnecessary DMA sync ops Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 08/52] net: fec_imx: Use dma mapping functions Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 09/52] net: fec_imx: Make use of IS_ALIGNED Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 10/52] clock: Add i.MX8MQ clock driver Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 11/52] serial: i.MX: Add i.MX8 support Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 12/52] mmc: i.MX esdhc: " Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 13/52] gpio: i.MX: Add i.MX8mq support Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 14/52] ARM: i.MX: ocotp: Add i.MX8MQ support Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 15/52] ARM: i.MX: Split shared CCM code into a separate file Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 16/52] ARM: i.MX: Add IOMUX pad constants for i.MX8 Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 17/52] ARM: i.MX: Add basic CCM " Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 18/52] ARM: Add constants and helpers for system counter interface Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 19/52] clocksource: armv8-timer: Convert explicit assembly into helpers Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 20/52] ARM: i.MX8: Initialize system counter Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 21/52] ARM: i.MX: boot: Fix address casting on 64-bit platforms Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 22/52] ARM: boot: Add trivial i.MX8 support Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 23/52] ARM: i.MX: xload-esdhc: Rework to make code be less i.MX6-specific Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 24/52] ARM: i.MX: xload-esdhc: Allow custom buffer address, device offset Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 25/52] ARM: i.MX: xload-esdhc: Add support for i.MX8 Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 26/52] pinctrl: i.MX: " Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 27/52] Documentation: imx: Change block size for 'dd' to 1024 Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 28/52] Documentation: i.MX: Add missing <soctype> Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 29/52] clocksource: armv8-timer: Make armv8_clocksource_read() static Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 30/52] clocksource: armv8-timer: Make use of postcore_platform_driver() Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 31/52] Port <linux/iopoll.h> from U-Boot Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 32/52] common/clock: Move delay and timeout functions to clock.h Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 33/52] clock: Use udelay() to implement mdelay() Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 34/52] ARM: i.MX8: Add DDRC PHY and DDR CTL base addresses Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 35/52] Kbuild: Add $(quote) Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 36/52] Add builtin firmware support Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 37/52] ARM: i.MX8: Add DDRC PHY support code Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 38/52] ARM: Specify HAVE_PBL_IMAGE for CPU_64 Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 39/52] ARM: lib64: Make string functions aware of MMU configuration Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 40/52] ARM: mmu: Make use of dsb() and isb() helpers Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 41/52] ARM: cache: Remove unused cache ops struct Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 42/52] ARM: no-mmu: Disable building for ARMv8 Andrey Smirnov
2018-06-07 13:00 ` [RESEND v3 43/52] ARM: interrupts64: Include ESR value in exception traceback Andrey Smirnov
2018-06-07 13:01 ` [RESEND v3 44/52] ARM: mmu64: Trivial code simplification Andrey Smirnov
2018-06-07 13:01 ` [RESEND v3 45/52] ARM: mmu64: Make use of create_table() Andrey Smirnov
2018-06-07 13:01 ` [RESEND v3 46/52] ARM: mmu64: Convert flags in arch_remap_range() Andrey Smirnov
2018-06-07 13:01 ` [RESEND v3 47/52] ARM: include: dma: Add missing no-MMU stubs Andrey Smirnov
2018-06-07 13:01 ` [RESEND v3 48/52] scripts: imx-image: Drop error return from write_dcd() Andrey Smirnov
2018-06-07 13:01 ` [RESEND v3 49/52] scripts: imx-image: Limit v2 header size to HEADER_LEN Andrey Smirnov
2018-06-07 13:01 ` [RESEND v3 50/52] scripts: imx-image: Share the code to write barebox header Andrey Smirnov
2018-06-07 13:01 ` [RESEND v3 51/52] scripts: imx-image: Add i.MX8MQ support Andrey Smirnov
2018-06-07 13:01 ` [RESEND v3 52/52] ARM: i.MX8: Add i.MX8mq EVK support Andrey Smirnov
2018-06-08  6:46 ` [RESEND v3 00/52] ARM: i.MX8MQ and " Sascha Hauer
2018-06-11 17:56   ` Andrey Smirnov

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