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From: Antony Pavlov <antonynpavlov@gmail.com>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH v2 03/12] Add initial RISC-V architecture support
Date: Fri, 29 Jun 2018 13:27:10 +0300	[thread overview]
Message-ID: <20180629132710.88b512ddb6c8331d3655afa3@gmail.com> (raw)
In-Reply-To: <20180629072908.4z66au6jdyyehmwf@pengutronix.de>

On Fri, 29 Jun 2018 09:29:08 +0200
Sascha Hauer <s.hauer@pengutronix.de> wrote:

> On Thu, Jun 28, 2018 at 10:39:44AM +0300, Antony Pavlov wrote:
> > Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
> > ---
> > +++ b/arch/riscv/lib/barebox.lds.S
> > @@ -0,0 +1,89 @@
> > +/*
> > + * Copyright (C) 2016 Antony Pavlov <antonynpavlov@gmail.com>
> > + *
> > + * This file is part of barebox.
> > + * See file CREDITS for list of people who contributed to this project.
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2
> > + * as published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + *
> > + */
> > +
> > +#include <asm-generic/barebox.lds.h>
> > +
> > +OUTPUT_ARCH(riscv)
> > +ENTRY(_start)
> > +SECTIONS
> > +{
> > +	. = TEXT_BASE;
> > +
> > +	. = ALIGN(8);
> > +	.text      :
> > +	{
> > +		_stext = .;
> > +		_start = .;
> > +		KEEP(*(.text_entry*))
> > +		_text = .;
> > +		__bare_init_start = .;
> > +		*(.text_bare_init*)
> > +		__bare_init_end = .;
> > +		*(.text*)
> > +	}
> > +	BAREBOX_BARE_INIT_SIZE
> 
> Do you need these __bare_init* stuff? If not I would prefer to remove
> it.


Hmmm. You are right! I have not realized PBL for RISC-V yet so it's better
to drop all these bare_inits.


> > +
> > +	PRE_IMAGE
> 
> Same here.
> 
> > +static int of_riscv_init(void)
> > +{
> > +	struct device_node *root;
> > +
> > +	root = of_get_root_node();
> > +	if (root)
> > +		return 0;
> > +
> > +	root = of_unflatten_dtb(__dtb_start);
> > +	if (!IS_ERR(root)) {
> > +		pr_debug("using internal DTB\n");
> > +		of_set_root_node(root);
> > +		if (IS_ENABLED(CONFIG_OFDEVICE))
> > +			of_probe();
> > +	}
> 
> Can we just call of_unflatten_dtb()/of_set_root_node() from the board
> code and use obj-dtb-y to include the dtb?
> 
> That way a board can specify the dtb and not the config.

Good idea! MIPS code lacks this feature at the moment.

Can I use of_arm_init() as a reference?

-- 
Best regards,
  Antony Pavlov

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  reply	other threads:[~2018-06-29 10:26 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-28  7:39 [PATCH v2 00/12] " Antony Pavlov
2018-06-28  7:39 ` [PATCH v2 01/12] lib: Add shared copies of some GCC library routines Antony Pavlov
2018-06-28  7:39 ` [PATCH v2 02/12] MIPS: Use generic GCC library routines from lib/ Antony Pavlov
2018-06-28  7:39 ` [PATCH v2 03/12] Add initial RISC-V architecture support Antony Pavlov
2018-06-29  7:29   ` Sascha Hauer
2018-06-29 10:27     ` Antony Pavlov [this message]
2018-06-29 11:32       ` Sascha Hauer
2018-06-29 13:17         ` Antony Pavlov
2018-06-28  7:39 ` [PATCH v2 04/12] RISC-V: add Erizo SoC support Antony Pavlov
2018-06-28  7:39 ` [PATCH v2 05/12] RISC-V: add low-level debug macros for ns16550 Antony Pavlov
2018-06-28  7:39 ` [PATCH v2 06/12] RISC-V: add nmon nano-monitor Antony Pavlov
2018-06-28  7:39 ` [PATCH v2 07/12] RISC-V: erizo: add DEBUG_LL support Antony Pavlov
2018-06-28  7:39 ` [PATCH v2 08/12] RISC-V: erizo: enable nmon Antony Pavlov
2018-06-28  7:39 ` [PATCH v2 09/12] RISC-V: erizo: add nmon image creation Antony Pavlov
2018-06-28  7:39 ` [PATCH v2 10/12] RISC-V: add erizo_generic_defconfig Antony Pavlov
2018-06-28  7:39 ` [PATCH v2 11/12] scripts: add nmon-loader Antony Pavlov
2018-06-28  7:39 ` [PATCH v2 12/12] Documentation: add RISC-V docs Antony Pavlov
2018-06-29  7:30 ` [PATCH v2 00/12] Add initial RISC-V architecture support Sascha Hauer

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