* [PATCH v1 1/2] phylib: add Davicom support
2018-08-07 21:14 [PATCH v1 0/2] Add Davicom phy + reset-gpios Sam Ravnborg
@ 2018-08-07 21:16 ` Sam Ravnborg
2018-08-07 21:17 ` [PATCH v1 2/2] phylib: add support for reset-gpios Sam Ravnborg
1 sibling, 0 replies; 4+ messages in thread
From: Sam Ravnborg @ 2018-08-07 21:16 UTC (permalink / raw)
To: barebox
Based on driver from Linux kernel 4.18-rc4
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
---
drivers/net/phy/Kconfig | 5 ++
drivers/net/phy/Makefile | 1 +
drivers/net/phy/davicom.c | 140 ++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 146 insertions(+)
create mode 100644 drivers/net/phy/davicom.c
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index cda752b65..79fb917ee 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -18,6 +18,11 @@ config AT803X_PHY
---help---
Currently supports the AT8030, AT8031 and AT8035 PHYs.
+config DAVICOM_PHY
+ bool "Driver for Davicom PHYs"
+ ---help---
+ Currently supports dm9161e and dm9131
+
config LXT_PHY
bool "Driver for the Intel LXT PHYs"
---help---
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 30b20f8ee..4424054d9 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -1,6 +1,7 @@
obj-y += phy.o mdio_bus.o
obj-$(CONFIG_AR8327N_PHY) += ar8327.o
obj-$(CONFIG_AT803X_PHY) += at803x.o
+obj-$(CONFIG_DAVICOM_PHY) += davicom.o
obj-$(CONFIG_LXT_PHY) += lxt.o
obj-$(CONFIG_MARVELL_PHY) += marvell.o
obj-$(CONFIG_MICREL_PHY) += micrel.o
diff --git a/drivers/net/phy/davicom.c b/drivers/net/phy/davicom.c
new file mode 100644
index 000000000..8a784b1e5
--- /dev/null
+++ b/drivers/net/phy/davicom.c
@@ -0,0 +1,140 @@
+/*
+ * drivers/net/phy/davicom.c
+ *
+ * Driver for Davicom PHYs
+ *
+ * Author: Andy Fleming
+ *
+ * Copyright (c) 2004 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <linux/mii.h>
+#include <linux/ethtool.h>
+#include <linux/phy.h>
+
+#define MII_DM9161_SCR 0x10
+#define MII_DM9161_SCR_INIT 0x0610
+#define MII_DM9161_SCR_RMII 0x0100
+
+/* DM9161 Interrupt Register */
+#define MII_DM9161_INTR 0x15
+#define MII_DM9161_INTR_PEND 0x8000
+#define MII_DM9161_INTR_DPLX_MASK 0x0800
+#define MII_DM9161_INTR_SPD_MASK 0x0400
+#define MII_DM9161_INTR_LINK_MASK 0x0200
+#define MII_DM9161_INTR_MASK 0x0100
+#define MII_DM9161_INTR_DPLX_CHANGE 0x0010
+#define MII_DM9161_INTR_SPD_CHANGE 0x0008
+#define MII_DM9161_INTR_LINK_CHANGE 0x0004
+#define MII_DM9161_INTR_INIT 0x0000
+#define MII_DM9161_INTR_STOP \
+(MII_DM9161_INTR_DPLX_MASK | MII_DM9161_INTR_SPD_MASK \
+ | MII_DM9161_INTR_LINK_MASK | MII_DM9161_INTR_MASK)
+
+/* DM9161 10BT Configuration/Status */
+#define MII_DM9161_10BTCSR 0x12
+#define MII_DM9161_10BTCSR_INIT 0x7800
+
+MODULE_DESCRIPTION("Davicom PHY driver");
+MODULE_AUTHOR("Andy Fleming");
+MODULE_LICENSE("GPL");
+
+
+static int dm9161_config_aneg(struct phy_device *phydev)
+{
+ int err;
+
+ /* Isolate the PHY */
+ err = phy_write(phydev, MII_BMCR, BMCR_ISOLATE);
+
+ if (err < 0)
+ return err;
+
+ /* Configure the new settings */
+ err = genphy_config_aneg(phydev);
+
+ if (err < 0)
+ return err;
+
+ return 0;
+}
+
+static int dm9161_config_init(struct phy_device *phydev)
+{
+ int err, temp;
+
+ /* Isolate the PHY */
+ err = phy_write(phydev, MII_BMCR, BMCR_ISOLATE);
+
+ if (err < 0)
+ return err;
+
+ switch (phydev->interface) {
+ case PHY_INTERFACE_MODE_MII:
+ temp = MII_DM9161_SCR_INIT;
+ break;
+ case PHY_INTERFACE_MODE_RMII:
+ temp = MII_DM9161_SCR_INIT | MII_DM9161_SCR_RMII;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ /* Do not bypass the scrambler/descrambler */
+ err = phy_write(phydev, MII_DM9161_SCR, temp);
+ if (err < 0)
+ return err;
+
+ /* Clear 10BTCSR to default */
+ err = phy_write(phydev, MII_DM9161_10BTCSR, MII_DM9161_10BTCSR_INIT);
+
+ if (err < 0)
+ return err;
+
+ /* Reconnect the PHY, and enable Autonegotiation */
+ return phy_write(phydev, MII_BMCR, BMCR_ANENABLE);
+}
+
+static struct phy_driver dm91xx_driver[] = {
+{
+ .phy_id = 0x0181b880,
+ .drv.name = "Davicom DM9161E",
+ .phy_id_mask = 0x0ffffff0,
+ .features = PHY_BASIC_FEATURES,
+ .config_init = dm9161_config_init,
+ .config_aneg = dm9161_config_aneg,
+}, {
+ .phy_id = 0x0181b8b0,
+ .drv.name = "Davicom DM9161B/C",
+ .phy_id_mask = 0x0ffffff0,
+ .features = PHY_BASIC_FEATURES,
+ .config_init = dm9161_config_init,
+ .config_aneg = dm9161_config_aneg,
+}, {
+ .phy_id = 0x0181b8a0,
+ .drv.name = "Davicom DM9161A",
+ .phy_id_mask = 0x0ffffff0,
+ .features = PHY_BASIC_FEATURES,
+ .config_init = dm9161_config_init,
+ .config_aneg = dm9161_config_aneg,
+}, {
+ .phy_id = 0x00181b80,
+ .drv.name = "Davicom DM9131",
+ .phy_id_mask = 0x0ffffff0,
+ .features = PHY_BASIC_FEATURES,
+} };
+
+static int dm9161_init(void)
+{
+ return phy_drivers_register(dm91xx_driver,
+ ARRAY_SIZE(dm91xx_driver));
+}
+fs_initcall(dm9161_init);
--
2.12.0
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* [PATCH v1 2/2] phylib: add support for reset-gpios
2018-08-07 21:14 [PATCH v1 0/2] Add Davicom phy + reset-gpios Sam Ravnborg
2018-08-07 21:16 ` [PATCH v1 1/2] phylib: add Davicom support Sam Ravnborg
@ 2018-08-07 21:17 ` Sam Ravnborg
2018-08-08 4:51 ` Sam Ravnborg
1 sibling, 1 reply; 4+ messages in thread
From: Sam Ravnborg @ 2018-08-07 21:17 UTC (permalink / raw)
To: barebox
Add minimal support for reset-gpios.
Example DT that uses this:
mdio {
#address-cells = <1>;
#size-cells = <0>;
reset-gpios = <&pioE 17 GPIO_ACTIVE_LOW>;
reset-delay-us = <1000>;
ethphy0: ethernet-phy@1 {
reg = <3>;
};
};
This was required to get the Davicom PHY operational on
my proprietary board.
I added the minimal mdiobus_reset() calls.
Linux kernel will take care that the PHY is reset upon removal etc.
Another options was to use a bus reset, but then a macb (the
driver used on my board) would be required.
The reset-gpios solution is general and matches phy-bindings-txt
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
---
drivers/net/phy/mdio_bus.c | 58 +++++++++++++++++++++++++++++++++++++++++++---
include/linux/phy.h | 5 ++++
2 files changed, 60 insertions(+), 3 deletions(-)
diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c
index d209716a1..85deca869 100644
--- a/drivers/net/phy/mdio_bus.c
+++ b/drivers/net/phy/mdio_bus.c
@@ -17,6 +17,8 @@
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <common.h>
+#include <of_gpio.h>
+#include <gpio.h>
#include <driver.h>
#include <init.h>
#include <clock.h>
@@ -25,6 +27,8 @@
#include <linux/phy.h>
#include <linux/err.h>
+#define DEFAULT_GPIO_RESET_DELAY 10 /* us */
+
LIST_HEAD(mii_bus_list);
int mdiobus_detect(struct device_d *dev)
@@ -83,6 +87,42 @@ static int of_mdiobus_register_phy(struct mii_bus *mdio, struct device_node *chi
}
/**
+ * of_mdioibus_register_reset - register optional reset-gpios
+ * @mdio: pointer to mii_bus structure
+ * @np: pointer to device_node of MDIO bus.
+ *
+ * Read optional reset-gpios from mido node in DT
+ */
+static void of_mdiobus_register_reset(struct mii_bus *mdio,
+ struct device_node *np)
+{
+ enum of_gpio_flags of_flags;
+ u32 reset_delay;
+ int gpio;
+
+ reset_delay = DEFAULT_GPIO_RESET_DELAY;
+ of_property_read_u32(np, "reset-delay-us", &reset_delay);
+
+ gpio = of_get_named_gpio_flags(np, "reset-gpios", 0, &of_flags);
+ if (gpio_is_valid(gpio)) {
+ unsigned long flags;
+ char *name;
+
+ name = basprintf("%s-reset", dev_name(&mdio->dev));
+ flags = GPIOF_OUT_INIT_INACTIVE;
+
+ if (of_flags & OF_GPIO_ACTIVE_LOW)
+ flags |= GPIOF_ACTIVE_LOW;
+
+ if (gpio_request_one(gpio, flags, name) >= 0) {
+ mdio->reset_gpio = gpio;
+ mdio->reset_delay = reset_delay;
+ }
+ }
+
+}
+
+/**
* of_mdiobus_register - Register mii_bus and create PHYs from the device tree
* @mdio: pointer to mii_bus structure
* @np: pointer to device_node of MDIO bus.
@@ -96,6 +136,8 @@ static int of_mdiobus_register(struct mii_bus *mdio, struct device_node *np)
u32 addr;
int ret;
+ of_mdiobus_register_reset(mdio, np);
+
/* Loop over the child nodes and register a phy_device for each one */
for_each_available_child_of_node(np, child) {
ret = of_property_read_u32(child, "reg", &addr);
@@ -147,9 +189,6 @@ int mdiobus_register(struct mii_bus *bus)
return -EINVAL;
}
- if (bus->reset)
- bus->reset(bus);
-
list_add_tail(&bus->list, &mii_bus_list);
pr_info("%s: probed\n", dev_name(&bus->dev));
@@ -157,6 +196,10 @@ int mdiobus_register(struct mii_bus *bus)
if (bus->dev.device_node)
of_mdiobus_register(bus, bus->dev.device_node);
+ mdiobus_reset(bus);
+ if (bus->reset)
+ bus->reset(bus);
+
return 0;
}
EXPORT_SYMBOL(mdiobus_register);
@@ -190,6 +233,15 @@ struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr)
}
EXPORT_SYMBOL(mdiobus_scan);
+void mdiobus_reset(const struct mii_bus *bus)
+{
+ if (bus->reset_gpio) {
+ gpio_set_active(bus->reset_gpio, 1);
+ udelay(bus->reset_delay);
+ gpio_set_active(bus->reset_gpio, 0);
+ }
+}
+EXPORT_SYMBOL(mdiobus_reset);
/**
*
diff --git a/include/linux/phy.h b/include/linux/phy.h
index ac750f5c3..d5b153d25 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -99,6 +99,10 @@ struct mii_bus {
/* PHY addresses to be ignored when probing */
u32 phy_mask;
+ /* Optional reset of all PHY's on the bus */
+ int reset_gpio;
+ int reset_delay;
+
struct list_head list;
bool is_multiplexed;
@@ -108,6 +112,7 @@ struct mii_bus {
int mdiobus_register(struct mii_bus *bus);
void mdiobus_unregister(struct mii_bus *bus);
struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
+void mdiobus_reset(const struct mii_bus *bus);
extern struct list_head mii_bus_list;
--
2.12.0
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