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From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH] ARM: MMU: fix wrong dma_flush_range in arm_create_pte()
Date: Wed, 15 Aug 2018 15:46:59 +0200	[thread overview]
Message-ID: <20180815134659.32553-1-s.hauer@pengutronix.de> (raw)

Since 7ba0f2d299 arm_create_pte() flushes the page table entries itself
and it's no longer done in arch_remap_range(). Unfortunately it does
not flush the modified 1st level page table entry, but instead the base
of the page table. Fix it up.

Fixes: 7ba0f2d299 ARM: mmu: fix cache flushing when replacing a section with a PTE

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/cpu/mmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index 88ee11cb48..f6c44e3e25 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -151,7 +151,7 @@ static u32 *arm_create_pte(unsigned long virt, uint32_t flags)
 	dma_flush_range(table, PTRS_PER_PTE * sizeof(u32));
 
 	ttb[ttb_idx] = (unsigned long)table | PMD_TYPE_TABLE;
-	dma_flush_range(ttb, sizeof(u32));
+	dma_flush_range(&ttb[ttb_idx], sizeof(u32));
 
 	return table;
 }
-- 
2.18.0


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             reply	other threads:[~2018-08-15 13:47 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-15 13:46 Sascha Hauer [this message]
2018-08-15 13:49 ` Sascha Hauer
2018-08-15 16:55   ` Andrey Smirnov
2018-08-16  7:21     ` Sascha Hauer
2018-08-16 21:30     ` Giorgio Dal Molin

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