[PATCH 1/2] ARM: imx: add fusemap entries for i.MX6SDL silicon revision >=1.4

[PATCH 1/2] ARM: imx: add fusemap entries for i.MX6SDL silicon revision >=1.4

[Bastian Stender]

Signed-off-by: Bastian Stender <bst@pengutronix.de>
---
 arch/arm/mach-imx/include/mach/ocotp-fusemap.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/mach-imx/include/mach/ocotp-fusemap.h b/arch/arm/mach-imx/include/mach/ocotp-fusemap.h
index 44b58ca6e8..aec50dbf8a 100644
--- a/arch/arm/mach-imx/include/mach/ocotp-fusemap.h
+++ b/arch/arm/mach-imx/include/mach/ocotp-fusemap.h
@@ -23,7 +23,11 @@
 #define OCOTP_BOOT_CFG2			(OCOTP_WORD(0x450) | OCOTP_BIT(8) | OCOTP_WIDTH(8))
 #define OCOTP_BOOT_CFG3			(OCOTP_WORD(0x450) | OCOTP_BIT(16) | OCOTP_WIDTH(8))
 #define OCOTP_BOOT_CFG4			(OCOTP_WORD(0x450) | OCOTP_BIT(24) | OCOTP_WIDTH(8))
+/* available on i.MX6SDL silicon revision >=1.4, "reserved" elsewhere */
+#define OCOTP_SDP_DISABLE		(OCOTP_WORD(0x460) | OCOTP_BIT(0) | OCOTP_WIDTH(1))
 #define OCOTP_SEC_CONFIG_1		(OCOTP_WORD(0x460) | OCOTP_BIT(1) | OCOTP_WIDTH(1))
+/* available on i.MX6SDL silicon revision >=1.4, "reserved" elsewhere */
+#define OCOTP_SDP_READ_DISABLE		(OCOTP_WORD(0x460) | OCOTP_BIT(2) | OCOTP_WIDTH(1))
 #define OCOTP_DIR_BT_DIS		(OCOTP_WORD(0x460) | OCOTP_BIT(3) | OCOTP_WIDTH(1))
 #define OCOTP_BT_FUSE_SEL		(OCOTP_WORD(0x460) | OCOTP_BIT(4) | OCOTP_WIDTH(1))
 #define OCOTP_SJC_DISABLE		(OCOTP_WORD(0x460) | OCOTP_BIT(20) | OCOTP_WIDTH(1))
@@ -31,6 +35,8 @@
 #define OCOTP_JTAG_SMODE		(OCOTP_WORD(0x460) | OCOTP_BIT(22) | OCOTP_WIDTH(2))
 #define OCOTP_KTE			(OCOTP_WORD(0x460) | OCOTP_BIT(26) | OCOTP_WIDTH(1))
 #define OCOTP_JTAG_HEO			(OCOTP_WORD(0x460) | OCOTP_BIT(27) | OCOTP_WIDTH(1))
+/* available on i.MX6SDL silicon revision >=1.4, "reserved" elsewhere */
+#define OCOTP_FORCE_INTERNAL_BOOT	(OCOTP_WORD(0x460) | OCOTP_BIT(31) | OCOTP_WIDTH(1))
 #define OCOTP_NAND_READ_CMD_CODE1	(OCOTP_WORD(0x470) | OCOTP_BIT(0) | OCOTP_WIDTH(8))
 #define OCOTP_NAND_READ_CMD_CODE2	(OCOTP_WORD(0x470) | OCOTP_BIT(8) | OCOTP_WIDTH(8))
 #define OCOTP_TEMP_SENSE		(OCOTP_WORD(0x4e0) | OCOTP_BIT(0) | OCOTP_WIDTH(32))
-- 
2.18.0


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[PATCH 2/2] HAB: fuse recommended OCOTP_DIR_BT_DIS

[Bastian Stender]

This is now recommended for all systems. Especially for the HAB usecase
disallowing alternative boot selection after WDOG reset is essential.

Signed-off-by: Bastian Stender <bst@pengutronix.de>
---
 drivers/hab/hab.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/hab/hab.c b/drivers/hab/hab.c
index 0d71f5bf26..423f69e5b1 100644
--- a/drivers/hab/hab.c
+++ b/drivers/hab/hab.c
@@ -161,7 +161,14 @@ static int imx_hab_permanent_write_enable_ocotp(int enable)
 
 static int imx_hab_lockdown_device_ocotp(void)
 {
+	int ret;
+
+	ret = imx_ocotp_write_field(OCOTP_DIR_BT_DIS, 1);
+	if (ret < 0)
+		return ret;
+
 	return imx_ocotp_write_field(OCOTP_SEC_CONFIG_1, 1);
+
 }
 
 static int imx_hab_device_locked_down_ocotp(void)
-- 
2.18.0


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Re: [PATCH 1/2] ARM: imx: add fusemap entries for i.MX6SDL silicon revision >=1.4

[Sascha Hauer]

On Fri, Aug 10, 2018 at 12:42:19PM +0200, Bastian Stender wrote:
> Signed-off-by: Bastian Stender <bst@pengutronix.de>
> ---
>  arch/arm/mach-imx/include/mach/ocotp-fusemap.h | 6 ++++++
>  1 file changed, 6 insertions(+)

Applied (this patch and 2/2 from v2 sent separately), thanks.

Sascha

> 
> diff --git a/arch/arm/mach-imx/include/mach/ocotp-fusemap.h b/arch/arm/mach-imx/include/mach/ocotp-fusemap.h
> index 44b58ca6e8..aec50dbf8a 100644
> --- a/arch/arm/mach-imx/include/mach/ocotp-fusemap.h
> +++ b/arch/arm/mach-imx/include/mach/ocotp-fusemap.h
> @@ -23,7 +23,11 @@
>  #define OCOTP_BOOT_CFG2			(OCOTP_WORD(0x450) | OCOTP_BIT(8) | OCOTP_WIDTH(8))
>  #define OCOTP_BOOT_CFG3			(OCOTP_WORD(0x450) | OCOTP_BIT(16) | OCOTP_WIDTH(8))
>  #define OCOTP_BOOT_CFG4			(OCOTP_WORD(0x450) | OCOTP_BIT(24) | OCOTP_WIDTH(8))
> +/* available on i.MX6SDL silicon revision >=1.4, "reserved" elsewhere */
> +#define OCOTP_SDP_DISABLE		(OCOTP_WORD(0x460) | OCOTP_BIT(0) | OCOTP_WIDTH(1))
>  #define OCOTP_SEC_CONFIG_1		(OCOTP_WORD(0x460) | OCOTP_BIT(1) | OCOTP_WIDTH(1))
> +/* available on i.MX6SDL silicon revision >=1.4, "reserved" elsewhere */
> +#define OCOTP_SDP_READ_DISABLE		(OCOTP_WORD(0x460) | OCOTP_BIT(2) | OCOTP_WIDTH(1))
>  #define OCOTP_DIR_BT_DIS		(OCOTP_WORD(0x460) | OCOTP_BIT(3) | OCOTP_WIDTH(1))
>  #define OCOTP_BT_FUSE_SEL		(OCOTP_WORD(0x460) | OCOTP_BIT(4) | OCOTP_WIDTH(1))
>  #define OCOTP_SJC_DISABLE		(OCOTP_WORD(0x460) | OCOTP_BIT(20) | OCOTP_WIDTH(1))
> @@ -31,6 +35,8 @@
>  #define OCOTP_JTAG_SMODE		(OCOTP_WORD(0x460) | OCOTP_BIT(22) | OCOTP_WIDTH(2))
>  #define OCOTP_KTE			(OCOTP_WORD(0x460) | OCOTP_BIT(26) | OCOTP_WIDTH(1))
>  #define OCOTP_JTAG_HEO			(OCOTP_WORD(0x460) | OCOTP_BIT(27) | OCOTP_WIDTH(1))
> +/* available on i.MX6SDL silicon revision >=1.4, "reserved" elsewhere */
> +#define OCOTP_FORCE_INTERNAL_BOOT	(OCOTP_WORD(0x460) | OCOTP_BIT(31) | OCOTP_WIDTH(1))
>  #define OCOTP_NAND_READ_CMD_CODE1	(OCOTP_WORD(0x470) | OCOTP_BIT(0) | OCOTP_WIDTH(8))
>  #define OCOTP_NAND_READ_CMD_CODE2	(OCOTP_WORD(0x470) | OCOTP_BIT(8) | OCOTP_WIDTH(8))
>  #define OCOTP_TEMP_SENSE		(OCOTP_WORD(0x4e0) | OCOTP_BIT(0) | OCOTP_WIDTH(32))
> -- 
> 2.18.0
> 
> 
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